From 9ca388ea7b6f8f9c02ed56cb8029982fa7fdd589 Mon Sep 17 00:00:00 2001 From: Russell King Date: Mon, 12 Nov 2007 21:55:12 +0000 Subject: [PATCH] --- yaml --- r: 77505 b: refs/heads/master c: d142b6e77d394a4fcc0a42381b03852bd9c4e263 h: refs/heads/master i: 77503: 5a9cc99ac2c357d979b4635bd5cb04c0fd77c388 v: v3 --- [refs] | 2 +- trunk/arch/arm/Kconfig | 1 + trunk/arch/arm/mach-s3c2410/mach-bast.c | 3 +- trunk/arch/arm/mach-s3c2410/mach-vr1000.c | 1 + trunk/arch/arm/mach-s3c2412/Kconfig | 1 - trunk/arch/arm/mach-s3c2412/Makefile | 3 +- trunk/arch/arm/mach-s3c2412/clock.c | 54 +--- trunk/arch/arm/mach-s3c2412/dma.c | 48 +--- trunk/arch/arm/mach-s3c2412/gpio.c | 60 ----- trunk/arch/arm/mach-s3c2412/irq.c | 24 -- trunk/arch/arm/mach-s3c2412/pm.c | 18 +- trunk/arch/arm/mach-s3c2412/s3c2412.c | 2 - trunk/arch/arm/mach-s3c2412/sleep.S | 68 ----- trunk/arch/arm/mach-s3c2440/clock.c | 22 +- trunk/arch/arm/mach-s3c2442/clock.c | 22 +- trunk/arch/arm/mach-sa1100/time.c | 38 +-- trunk/arch/arm/plat-s3c24xx/Makefile | 1 - trunk/arch/arm/plat-s3c24xx/clock.c | 19 -- trunk/arch/arm/plat-s3c24xx/dma.c | 47 +--- trunk/arch/arm/plat-s3c24xx/gpio.c | 29 -- trunk/arch/arm/plat-s3c24xx/irq.c | 2 +- trunk/arch/arm/plat-s3c24xx/pm.c | 247 +++--------------- trunk/arch/arm/plat-s3c24xx/s3c244x-clock.c | 137 ---------- .../asm-arm/arch-s3c2410/debug-macro.S | 2 + trunk/include/asm-arm/arch-s3c2410/dma.h | 1 - trunk/include/asm-arm/arch-s3c2410/hardware.h | 28 -- trunk/include/asm-arm/arch-s3c2410/irqs.h | 3 - .../include/asm-arm/arch-s3c2410/regs-clock.h | 2 - trunk/include/asm-arm/arch-s3c2410/regs-dsc.h | 2 +- .../include/asm-arm/arch-s3c2410/regs-gpio.h | 6 +- trunk/include/asm-arm/arch-s3c2410/regs-mem.h | 6 - .../include/asm-arm/arch-s3c2410/regs-power.h | 3 +- trunk/include/asm-arm/arch-s3c2410/system.h | 20 +- trunk/include/asm-arm/plat-s3c24xx/dma.h | 5 - trunk/include/asm-arm/plat-s3c24xx/irq.h | 2 - .../asm-arm/plat-s3c24xx/regs-s3c2412-iis.h | 72 ----- trunk/include/asm-arm/plat-s3c24xx/regs-spi.h | 32 +-- 37 files changed, 141 insertions(+), 892 deletions(-) delete mode 100644 trunk/arch/arm/mach-s3c2412/gpio.c delete mode 100644 trunk/arch/arm/mach-s3c2412/sleep.S delete mode 100644 trunk/arch/arm/plat-s3c24xx/s3c244x-clock.c delete mode 100644 trunk/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h diff --git a/[refs] b/[refs] index ee67749071a2..904a4f7a191e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 06dbbd69f94e97751782ef6f1a9bb19da60efd1c +refs/heads/master: d142b6e77d394a4fcc0a42381b03852bd9c4e263 diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index a04f507e7f2c..742527957048 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -366,6 +366,7 @@ config ARCH_SA1100 select ARCH_DISCONTIGMEM_ENABLE select ARCH_MTD_XIP select GENERIC_GPIO + select GENERIC_TIME help Support for StrongARM 11x0 based boards. diff --git a/trunk/arch/arm/mach-s3c2410/mach-bast.c b/trunk/arch/arm/mach-s3c2410/mach-bast.c index 66175471fff3..587864fe25fb 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-bast.c +++ b/trunk/arch/arm/mach-s3c2410/mach-bast.c @@ -530,7 +530,7 @@ static struct s3c2410fb_mach_info __initdata bast_fb_info = { .displays = bast_lcd_info, .num_displays = ARRAY_SIZE(bast_lcd_info), - .default_display = 1, + .default_display = 4, }; /* Standard BAST devices */ @@ -540,6 +540,7 @@ static struct platform_device *bast_devices[] __initdata = { &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c, + &s3c_device_iis, &s3c_device_rtc, &s3c_device_nand, &bast_device_nor, diff --git a/trunk/arch/arm/mach-s3c2410/mach-vr1000.c b/trunk/arch/arm/mach-s3c2410/mach-vr1000.c index 3aade7b78fe5..9f43f3f124f5 100644 --- a/trunk/arch/arm/mach-s3c2410/mach-vr1000.c +++ b/trunk/arch/arm/mach-s3c2410/mach-vr1000.c @@ -365,6 +365,7 @@ static struct platform_device *vr1000_devices[] __initdata = { &s3c_device_lcd, &s3c_device_wdt, &s3c_device_i2c, + &s3c_device_iis, &s3c_device_adc, &serial_device, &vr1000_nor, diff --git a/trunk/arch/arm/mach-s3c2412/Kconfig b/trunk/arch/arm/mach-s3c2412/Kconfig index 0b43431d4b75..8e8fe48ea47f 100644 --- a/trunk/arch/arm/mach-s3c2412/Kconfig +++ b/trunk/arch/arm/mach-s3c2412/Kconfig @@ -10,7 +10,6 @@ config CPU_S3C2412 select CPU_LLSERIAL_S3C2440 select S3C2412_PM if PM select S3C2412_DMA if S3C2410_DMA - select S3C2410_GPIO help Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line diff --git a/trunk/arch/arm/mach-s3c2412/Makefile b/trunk/arch/arm/mach-s3c2412/Makefile index 267f3348301e..f8e011691b31 100644 --- a/trunk/arch/arm/mach-s3c2412/Makefile +++ b/trunk/arch/arm/mach-s3c2412/Makefile @@ -12,9 +12,8 @@ obj- := obj-$(CONFIG_CPU_S3C2412) += s3c2412.o obj-$(CONFIG_CPU_S3C2412) += irq.o obj-$(CONFIG_CPU_S3C2412) += clock.o -obj-$(CONFIG_CPU_S3C2412) += gpio.o obj-$(CONFIG_S3C2412_DMA) += dma.o -obj-$(CONFIG_S3C2412_PM) += pm.o sleep.o +obj-$(CONFIG_S3C2412_PM) += pm.o # Machine support diff --git a/trunk/arch/arm/mach-s3c2412/clock.c b/trunk/arch/arm/mach-s3c2412/clock.c index 2697a65ba727..458993601897 100644 --- a/trunk/arch/arm/mach-s3c2412/clock.c +++ b/trunk/arch/arm/mach-s3c2412/clock.c @@ -217,7 +217,7 @@ static int s3c2412_setparent_msysclk(struct clk *clk, struct clk *parent) if (parent == &clk_mdivclk) clksrc &= ~S3C2412_CLKSRC_MSYSCLK_MPLL; - else if (parent == &clk_mpll) + else if (parent == &clk_upll) clksrc |= S3C2412_CLKSRC_MSYSCLK_MPLL; else return -EINVAL; @@ -234,45 +234,6 @@ static struct clk clk_msysclk = { .set_parent = s3c2412_setparent_msysclk, }; -static int s3c2412_setparent_armclk(struct clk *clk, struct clk *parent) -{ - unsigned long flags; - unsigned long clkdiv; - unsigned long dvs; - - /* Note, we current equate fclk andf msysclk for S3C2412 */ - - if (parent == &clk_msysclk || parent == &clk_f) - dvs = 0; - else if (parent == &clk_h) - dvs = S3C2412_CLKDIVN_DVSEN; - else - return -EINVAL; - - clk->parent = parent; - - /* update this under irq lockdown, clkdivn is not protected - * by the clock system. */ - - local_irq_save(flags); - - clkdiv = __raw_readl(S3C2410_CLKDIVN); - clkdiv &= ~S3C2412_CLKDIVN_DVSEN; - clkdiv |= dvs; - __raw_writel(clkdiv, S3C2410_CLKDIVN); - - local_irq_restore(flags); - - return 0; -} - -static struct clk clk_armclk = { - .name = "armclk", - .id = -1, - .parent = &clk_msysclk, - .set_parent = s3c2412_setparent_armclk, -}; - /* these next clocks have an divider immediately after them, * so we can register them with their divider and leave out the * intermediate clock stage @@ -669,13 +630,11 @@ static struct clk *clks[] __initdata = { &clk_erefclk, &clk_urefclk, &clk_mrefclk, - &clk_armclk, }; int __init s3c2412_baseclk_add(void) { unsigned long clkcon = __raw_readl(S3C2410_CLKCON); - unsigned int dvs; struct clk *clkp; int ret; int ptr; @@ -684,8 +643,6 @@ int __init s3c2412_baseclk_add(void) clk_usb_bus.parent = &clk_usbsrc; clk_usb_bus.rate = 0x0; - clk_f.parent = &clk_msysclk; - s3c2412_clk_initparents(); for (ptr = 0; ptr < ARRAY_SIZE(clks); ptr++) { @@ -698,15 +655,6 @@ int __init s3c2412_baseclk_add(void) } } - /* set the dvs state according to what we got at boot time */ - - dvs = __raw_readl(S3C2410_CLKDIVN) & S3C2412_CLKDIVN_DVSEN; - - if (dvs) - clk_armclk.parent = &clk_h; - - printk(KERN_INFO "S3C2412: DVS is %s\n", dvs ? "on" : "off"); - /* ensure usb bus clock is within correct rate of 48MHz */ if (clk_get_rate(&clk_usb_bus) != (48 * 1000 * 1000)) { diff --git a/trunk/arch/arm/mach-s3c2412/dma.c b/trunk/arch/arm/mach-s3c2412/dma.c index 1dd864993566..53c1d5bbce19 100644 --- a/trunk/arch/arm/mach-s3c2412/dma.c +++ b/trunk/arch/arm/mach-s3c2412/dma.c @@ -30,7 +30,6 @@ #include #include #include -#include #include #include @@ -40,141 +39,106 @@ static struct s3c24xx_dma_map __initdata s3c2412_dma_mappings[] = { [DMACH_XD0] = { .name = "xdreq0", .channels = MAP(S3C2412_DMAREQSEL_XDREQ0), - .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ0), }, [DMACH_XD1] = { .name = "xdreq1", .channels = MAP(S3C2412_DMAREQSEL_XDREQ1), - .channels_rx = MAP(S3C2412_DMAREQSEL_XDREQ1), }, [DMACH_SDI] = { .name = "sdi", .channels = MAP(S3C2412_DMAREQSEL_SDI), - .channels_rx = MAP(S3C2412_DMAREQSEL_SDI), - .hw_addr.to = S3C2410_PA_SDI + S3C2410_SDIDATA, - .hw_addr.from = S3C2410_PA_SDI + S3C2410_SDIDATA, + .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, + .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, }, [DMACH_SPI0] = { .name = "spi0", .channels = MAP(S3C2412_DMAREQSEL_SPI0TX), - .channels_rx = MAP(S3C2412_DMAREQSEL_SPI0RX), .hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT, .hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT, }, [DMACH_SPI1] = { .name = "spi1", .channels = MAP(S3C2412_DMAREQSEL_SPI1TX), - .channels_rx = MAP(S3C2412_DMAREQSEL_SPI1RX), .hw_addr.to = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPTDAT, .hw_addr.from = S3C2410_PA_SPI + S3C2412_SPI1 + S3C2410_SPRDAT, }, [DMACH_UART0] = { .name = "uart0", .channels = MAP(S3C2412_DMAREQSEL_UART0_0), - .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_0), .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, }, [DMACH_UART1] = { .name = "uart1", .channels = MAP(S3C2412_DMAREQSEL_UART1_0), - .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_0), .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, }, [DMACH_UART2] = { .name = "uart2", .channels = MAP(S3C2412_DMAREQSEL_UART2_0), - .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_0), .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, }, [DMACH_UART0_SRC2] = { .name = "uart0", .channels = MAP(S3C2412_DMAREQSEL_UART0_1), - .channels_rx = MAP(S3C2412_DMAREQSEL_UART0_1), .hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH, }, [DMACH_UART1_SRC2] = { .name = "uart1", .channels = MAP(S3C2412_DMAREQSEL_UART1_1), - .channels_rx = MAP(S3C2412_DMAREQSEL_UART1_1), .hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH, }, [DMACH_UART2_SRC2] = { .name = "uart2", .channels = MAP(S3C2412_DMAREQSEL_UART2_1), - .channels_rx = MAP(S3C2412_DMAREQSEL_UART2_1), .hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH, .hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH, }, [DMACH_TIMER] = { .name = "timer", .channels = MAP(S3C2412_DMAREQSEL_TIMER), - .channels_rx = MAP(S3C2412_DMAREQSEL_TIMER), }, [DMACH_I2S_IN] = { .name = "i2s-sdi", .channels = MAP(S3C2412_DMAREQSEL_I2SRX), - .channels_rx = MAP(S3C2412_DMAREQSEL_I2SRX), - .hw_addr.from = S3C2410_PA_IIS + S3C2412_IISRXD, + .hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO, }, [DMACH_I2S_OUT] = { .name = "i2s-sdo", .channels = MAP(S3C2412_DMAREQSEL_I2STX), - .channels_rx = MAP(S3C2412_DMAREQSEL_I2STX), - .hw_addr.to = S3C2410_PA_IIS + S3C2412_IISTXD, + .hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO, }, [DMACH_USB_EP1] = { .name = "usb-ep1", .channels = MAP(S3C2412_DMAREQSEL_USBEP1), - .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP1), }, [DMACH_USB_EP2] = { .name = "usb-ep2", .channels = MAP(S3C2412_DMAREQSEL_USBEP2), - .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP2), }, [DMACH_USB_EP3] = { .name = "usb-ep3", .channels = MAP(S3C2412_DMAREQSEL_USBEP3), - .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP3), }, [DMACH_USB_EP4] = { .name = "usb-ep4", .channels = MAP(S3C2412_DMAREQSEL_USBEP4), - .channels_rx = MAP(S3C2412_DMAREQSEL_USBEP4), }, }; -static void s3c2412_dma_direction(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map, - enum s3c2410_dmasrc dir) -{ - unsigned long chsel; - - if (dir == S3C2410_DMASRC_HW) - chsel = map->channels_rx[0]; - else - chsel = map->channels[0]; - - chsel &= ~DMA_CH_VALID; - chsel |= S3C2412_DMAREQSEL_HW; - - writel(chsel, chan->regs + S3C2412_DMA_DMAREQSEL); -} - static void s3c2412_dma_select(struct s3c2410_dma_chan *chan, struct s3c24xx_dma_map *map) { - s3c2412_dma_direction(chan, map, chan->source); + writel(map->channels[0] | S3C2412_DMAREQSEL_HW, + chan->regs + S3C2412_DMA_DMAREQSEL); } static struct s3c24xx_dma_selection __initdata s3c2412_dma_sel = { .select = s3c2412_dma_select, - .direction = s3c2412_dma_direction, .dcon_mask = 0, .map = s3c2412_dma_mappings, .map_size = ARRAY_SIZE(s3c2412_dma_mappings), diff --git a/trunk/arch/arm/mach-s3c2412/gpio.c b/trunk/arch/arm/mach-s3c2412/gpio.c deleted file mode 100644 index 8e55c3a2eab8..000000000000 --- a/trunk/arch/arm/mach-s3c2412/gpio.c +++ /dev/null @@ -1,60 +0,0 @@ -/* linux/arch/arm/mach-s3c2412/gpio.c - * - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks - * - * http://armlinux.simtec.co.uk/. - * - * S3C2412/S3C2413 specific GPIO support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include - -#include -#include - -#include - -#include - -int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state) -{ - void __iomem *base = S3C24XX_GPIO_BASE(pin); - unsigned long offs = S3C2410_GPIO_OFFSET(pin); - unsigned long flags; - unsigned long slpcon; - - offs *= 2; - - if (pin < S3C2410_GPIO_BANKB) - return -EINVAL; - - if (pin >= S3C2410_GPIO_BANKF && - pin <= S3C2410_GPIO_BANKG) - return -EINVAL; - - if (pin > (S3C2410_GPIO_BANKH + 32)) - return -EINVAL; - - local_irq_save(flags); - - slpcon = __raw_readl(base + 0x0C); - - slpcon &= ~(3 << offs); - slpcon |= state << offs; - - __raw_writel(slpcon, base + 0x0C); - - local_irq_restore(flags); - - return 0; -} - -EXPORT_SYMBOL(s3c2412_gpio_set_sleepcfg); diff --git a/trunk/arch/arm/mach-s3c2412/irq.c b/trunk/arch/arm/mach-s3c2412/irq.c index cc1917bf952a..e9d0c769f5da 100644 --- a/trunk/arch/arm/mach-s3c2412/irq.c +++ b/trunk/arch/arm/mach-s3c2412/irq.c @@ -33,7 +33,6 @@ #include #include -#include #include #include @@ -154,22 +153,6 @@ static struct irq_chip s3c2412_irq_cfsdi = { .unmask = s3c2412_irq_cfsdi_unmask, }; -static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state) -{ - unsigned long pwrcfg; - - pwrcfg = __raw_readl(S3C2412_PWRCFG); - if (state) - pwrcfg &= ~S3C2412_PWRCFG_RTC_MASKIRQ; - else - pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ; - __raw_writel(pwrcfg, S3C2412_PWRCFG); - - return s3c_irq_chip.set_wake(irqno, state); -} - -static struct irq_chip s3c2412_irq_rtc_chip; - static int s3c2412_irq_add(struct sys_device *sysdev) { unsigned int irqno; @@ -190,13 +173,6 @@ static int s3c2412_irq_add(struct sys_device *sysdev) set_irq_flags(irqno, IRQF_VALID); } - /* change RTC IRQ's set wake method */ - - s3c2412_irq_rtc_chip = s3c_irq_chip; - s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake; - - set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip); - return 0; } diff --git a/trunk/arch/arm/mach-s3c2412/pm.c b/trunk/arch/arm/mach-s3c2412/pm.c index d4ffb2d98076..8988dac388a9 100644 --- a/trunk/arch/arm/mach-s3c2412/pm.c +++ b/trunk/arch/arm/mach-s3c2412/pm.c @@ -33,8 +33,6 @@ #include -extern void s3c2412_sleep_enter(void); - static void s3c2412_cpu_suspend(void) { unsigned long tmp; @@ -45,7 +43,20 @@ static void s3c2412_cpu_suspend(void) tmp |= S3C2412_PWRCFG_STANDBYWFI_SLEEP; __raw_writel(tmp, S3C2412_PWRCFG); - s3c2412_sleep_enter(); + /* issue the standby signal into the pm unit. Note, we + * issue a write-buffer drain just in case */ + + tmp = 0; + + asm("b 1f\n\t" + ".align 5\n\t" + "1:\n\t" + "mcr p15, 0, %0, c7, c10, 4\n\t" + "mcr p15, 0, %0, c7, c0, 4" :: "r" (tmp)); + + /* we should never get past here */ + + panic("sleep resumed to originator?"); } static void s3c2412_pm_prepare(void) @@ -77,6 +88,7 @@ static struct sleep_save s3c2412_sleep[] = { SAVE_ITEM(S3C2412_GPBSLPCON), SAVE_ITEM(S3C2412_GPCSLPCON), SAVE_ITEM(S3C2412_GPDSLPCON), + SAVE_ITEM(S3C2412_GPESLPCON), SAVE_ITEM(S3C2412_GPFSLPCON), SAVE_ITEM(S3C2412_GPGSLPCON), SAVE_ITEM(S3C2412_GPHSLPCON), diff --git a/trunk/arch/arm/mach-s3c2412/s3c2412.c b/trunk/arch/arm/mach-s3c2412/s3c2412.c index abf1599c9f97..265cd3f567a3 100644 --- a/trunk/arch/arm/mach-s3c2412/s3c2412.c +++ b/trunk/arch/arm/mach-s3c2412/s3c2412.c @@ -168,8 +168,6 @@ void __init s3c2412_init_clocks(int xtal) fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2); - clk_mpll.rate = fclk; - tmp = __raw_readl(S3C2410_CLKDIVN); /* work out clock scalings */ diff --git a/trunk/arch/arm/mach-s3c2412/sleep.S b/trunk/arch/arm/mach-s3c2412/sleep.S deleted file mode 100644 index db32cac4199a..000000000000 --- a/trunk/arch/arm/mach-s3c2412/sleep.S +++ /dev/null @@ -1,68 +0,0 @@ -/* linux/arch/arm/mach-s3c2412/sleep.S - * - * Copyright (c) 2007 Simtec Electronics - * Ben Dooks - * - * S3C2412 Power Manager low-level sleep support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include -#include -#include -#include - -#include - - .text - - .global s3c2412_sleep_enter - -s3c2412_sleep_enter: - mov r0, #0 /* argument for coprocessors */ - ldr r1, =S3C2410_INTPND - ldr r2, =S3C2410_SRCPND - ldr r3, =S3C2410_EINTPEND - - teq r0, r0 - bl s3c2412_sleep_enter1 - teq pc, r0 - bl s3c2412_sleep_enter1 - - .align 5 - - /* this is called twice, first with the Z flag to ensure that the - * instructions have been loaded into the cache, and the second - * time to try and suspend the system. - */ -s3c2412_sleep_enter1: - mcr p15, 0, r0, c7, c10, 4 - mcrne p15, 0, r0, c7, c0, 4 - - /* if we return from here, it is because an interrupt was - * active when we tried to shutdown. Try and ack the IRQ and - * retry, as simply returning causes the system to lock. - */ - - ldrne r9, [ r1 ] - strne r9, [ r1 ] - ldrne r9, [ r2 ] - strne r9, [ r2 ] - ldrne r9, [ r3 ] - strne r9, [ r3 ] - bne s3c2412_sleep_enter1 - - mov pc, r14 diff --git a/trunk/arch/arm/mach-s3c2440/clock.c b/trunk/arch/arm/mach-s3c2440/clock.c index 184d804934c9..79e2ea4adaf3 100644 --- a/trunk/arch/arm/mach-s3c2440/clock.c +++ b/trunk/arch/arm/mach-s3c2440/clock.c @@ -111,9 +111,14 @@ static struct clk s3c2440_clk_ac97 = { static int s3c2440_clk_add(struct sys_device *sysdev) { - struct clk *clock_upll; + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + unsigned long clkdivn; struct clk *clock_h; struct clk *clock_p; + struct clk *clock_upll; + + printk("S3C2440: Clock Support, DVS %s\n", + (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); clock_p = clk_get(NULL, "pclk"); clock_h = clk_get(NULL, "hclk"); @@ -124,6 +129,21 @@ static int s3c2440_clk_add(struct sys_device *sysdev) return -EINVAL; } + /* check rate of UPLL, and if it is near 96MHz, then change + * to using half the UPLL rate for the system */ + + if (clk_get_rate(clock_upll) > (94 * MHZ)) { + clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; + + mutex_lock(&clocks_mutex); + + clkdivn = __raw_readl(S3C2410_CLKDIVN); + clkdivn |= S3C2440_CLKDIVN_UCLK; + __raw_writel(clkdivn, S3C2410_CLKDIVN); + + mutex_unlock(&clocks_mutex); + } + s3c2440_clk_cam.parent = clock_h; s3c2440_clk_ac97.parent = clock_p; s3c2440_clk_cam_upll.parent = clock_upll; diff --git a/trunk/arch/arm/mach-s3c2442/clock.c b/trunk/arch/arm/mach-s3c2442/clock.c index 2d030d439fe9..5b9e830ac4d3 100644 --- a/trunk/arch/arm/mach-s3c2442/clock.c +++ b/trunk/arch/arm/mach-s3c2442/clock.c @@ -115,9 +115,14 @@ static struct clk s3c2442_clk_cam_upll = { static int s3c2442_clk_add(struct sys_device *sysdev) { - struct clk *clock_upll; + unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); + unsigned long clkdivn; struct clk *clock_h; struct clk *clock_p; + struct clk *clock_upll; + + printk("S3C2442: Clock Support, DVS %s\n", + (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); clock_p = clk_get(NULL, "pclk"); clock_h = clk_get(NULL, "hclk"); @@ -128,6 +133,21 @@ static int s3c2442_clk_add(struct sys_device *sysdev) return -EINVAL; } + /* check rate of UPLL, and if it is near 96MHz, then change + * to using half the UPLL rate for the system */ + + if (clk_get_rate(clock_upll) > (94 * MHZ)) { + clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; + + mutex_lock(&clocks_mutex); + + clkdivn = __raw_readl(S3C2410_CLKDIVN); + clkdivn |= S3C2440_CLKDIVN_UCLK; + __raw_writel(clkdivn, S3C2410_CLKDIVN); + + mutex_unlock(&clocks_mutex); + } + s3c2442_clk_cam.parent = clock_h; s3c2442_clk_cam_upll.parent = clock_upll; diff --git a/trunk/arch/arm/mach-sa1100/time.c b/trunk/arch/arm/mach-sa1100/time.c index fdf7b016e7ad..72984354a247 100644 --- a/trunk/arch/arm/mach-sa1100/time.c +++ b/trunk/arch/arm/mach-sa1100/time.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include @@ -35,23 +36,6 @@ static int sa1100_set_rtc(void) return 0; } -/* IRQs are disabled before entering here from do_gettimeofday() */ -static unsigned long sa1100_gettimeoffset (void) -{ - unsigned long ticks_to_match, elapsed, usec; - - /* Get ticks before next timer match */ - ticks_to_match = OSMR0 - OSCR; - - /* We need elapsed ticks since last match */ - elapsed = LATCH - ticks_to_match; - - /* Now convert them to usec */ - usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; - - return usec; -} - #ifdef CONFIG_NO_IDLE_HZ static unsigned long initial_match; static int match_posponed; @@ -96,6 +80,20 @@ static struct irqaction sa1100_timer_irq = { .handler = sa1100_timer_interrupt, }; +static cycle_t sa1100_read_oscr(void) +{ + return OSCR; +} + +static struct clocksource cksrc_sa1100_oscr = { + .name = "oscr", + .rating = 200, + .read = sa1100_read_oscr, + .mask = CLOCKSOURCE_MASK(32), + .shift = 20, + .flags = CLOCK_SOURCE_IS_CONTINUOUS, +}; + static void __init sa1100_timer_init(void) { unsigned long flags; @@ -109,6 +107,11 @@ static void __init sa1100_timer_init(void) OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ OSMR0 = OSCR + LATCH; /* set initial match */ local_irq_restore(flags); + + cksrc_sa1100_oscr.mult = + clocksource_hz2mult(CLOCK_TICK_RATE, cksrc_sa1100_oscr.shift); + + clocksource_register(&cksrc_sa1100_oscr); } #ifdef CONFIG_NO_IDLE_HZ @@ -182,7 +185,6 @@ struct sys_timer sa1100_timer = { .init = sa1100_timer_init, .suspend = sa1100_timer_suspend, .resume = sa1100_timer_resume, - .offset = sa1100_gettimeoffset, #ifdef CONFIG_NO_IDLE_HZ .dyn_tick = &sa1100_dyn_tick, #endif diff --git a/trunk/arch/arm/plat-s3c24xx/Makefile b/trunk/arch/arm/plat-s3c24xx/Makefile index 131d20237dd7..8e5ccaa1f03c 100644 --- a/trunk/arch/arm/plat-s3c24xx/Makefile +++ b/trunk/arch/arm/plat-s3c24xx/Makefile @@ -23,7 +23,6 @@ obj-y += clock.o obj-$(CONFIG_CPU_S3C244X) += s3c244x.o obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o -obj-$(CONFIG_CPU_S3C244X) += s3c244x-clock.o obj-$(CONFIG_PM_SIMTEC) += pm-simtec.o obj-$(CONFIG_PM) += pm.o obj-$(CONFIG_PM) += sleep.o diff --git a/trunk/arch/arm/plat-s3c24xx/clock.c b/trunk/arch/arm/plat-s3c24xx/clock.c index 99a44746f8f2..79cda0faec86 100644 --- a/trunk/arch/arm/plat-s3c24xx/clock.c +++ b/trunk/arch/arm/plat-s3c24xx/clock.c @@ -172,15 +172,6 @@ int clk_set_rate(struct clk *clk, unsigned long rate) if (IS_ERR(clk)) return -EINVAL; - /* We do not default just do a clk->rate = rate as - * the clock may have been made this way by choice. - */ - - WARN_ON(clk->set_rate == NULL); - - if (clk->set_rate == NULL) - return -EINVAL; - mutex_lock(&clocks_mutex); ret = (clk->set_rate)(clk, rate); mutex_unlock(&clocks_mutex); @@ -222,12 +213,6 @@ EXPORT_SYMBOL(clk_set_parent); /* base clocks */ -static int clk_default_setrate(struct clk *clk, unsigned long rate) -{ - clk->rate = rate; - return 0; -} - struct clk clk_xtal = { .name = "xtal", .id = -1, @@ -239,7 +224,6 @@ struct clk clk_xtal = { struct clk clk_mpll = { .name = "mpll", .id = -1, - .set_rate = clk_default_setrate, }; struct clk clk_upll = { @@ -255,7 +239,6 @@ struct clk clk_f = { .rate = 0, .parent = &clk_mpll, .ctrlbit = 0, - .set_rate = clk_default_setrate, }; struct clk clk_h = { @@ -264,7 +247,6 @@ struct clk clk_h = { .rate = 0, .parent = NULL, .ctrlbit = 0, - .set_rate = clk_default_setrate, }; struct clk clk_p = { @@ -273,7 +255,6 @@ struct clk clk_p = { .rate = 0, .parent = NULL, .ctrlbit = 0, - .set_rate = clk_default_setrate, }; struct clk clk_usb_bus = { diff --git a/trunk/arch/arm/plat-s3c24xx/dma.c b/trunk/arch/arm/plat-s3c24xx/dma.c index ac9ff1666fcc..aae1b9cbaf44 100644 --- a/trunk/arch/arm/plat-s3c24xx/dma.c +++ b/trunk/arch/arm/plat-s3c24xx/dma.c @@ -525,8 +525,7 @@ int s3c2410_dma_enqueue(unsigned int channel, void *id, } } else if (chan->state == S3C2410_DMA_IDLE) { if (chan->flags & S3C2410_DMAF_AUTOSTART) { - s3c2410_dma_ctrl(chan->number | DMACH_LOW_LEVEL, - S3C2410_DMAOP_START); + s3c2410_dma_ctrl(chan->number, S3C2410_DMAOP_START); } } @@ -788,7 +787,7 @@ int s3c2410_dma_request(unsigned int channel, pr_debug("%s: channel initialised, %p\n", __FUNCTION__, chan); - return chan->number | DMACH_LOW_LEVEL; + return 0; } EXPORT_SYMBOL(s3c2410_dma_request); @@ -1174,7 +1173,6 @@ int s3c2410_dma_devconfig(int channel, chan->source = source; chan->dev_addr = devaddr; - chan->hw_cfg = hwcfg; switch (source) { case S3C2410_DMASRC_HW: @@ -1186,7 +1184,7 @@ int s3c2410_dma_devconfig(int channel, dma_wrreg(chan, S3C2410_DMA_DIDSTC, (0<<1) | (0<<0)); chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DIDST); - break; + return 0; case S3C2410_DMASRC_MEM: /* source is memory */ @@ -1197,19 +1195,11 @@ int s3c2410_dma_devconfig(int channel, dma_wrreg(chan, S3C2410_DMA_DIDSTC, hwcfg & 3); chan->addr_reg = dma_regaddr(chan, S3C2410_DMA_DISRC); - break; - - default: - printk(KERN_ERR "dma%d: invalid source type (%d)\n", - channel, source); - - return -EINVAL; + return 0; } - if (dma_sel.direction != NULL) - (dma_sel.direction)(chan, chan->map, source); - - return 0; + printk(KERN_ERR "dma%d: invalid source type (%d)\n", channel, source); + return -EINVAL; } EXPORT_SYMBOL(s3c2410_dma_devconfig); @@ -1237,10 +1227,6 @@ int s3c2410_dma_getposition(dmach_t channel, dma_addr_t *src, dma_addr_t *dst) EXPORT_SYMBOL(s3c2410_dma_getposition); -static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) -{ - return container_of(dev, struct s3c2410_dma_chan, dev); -} /* system device class */ @@ -1248,7 +1234,7 @@ static struct s3c2410_dma_chan *to_dma_chan(struct sys_device *dev) static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) { - struct s3c2410_dma_chan *cp = to_dma_chan(dev); + struct s3c2410_dma_chan *cp = container_of(dev, struct s3c2410_dma_chan, dev); printk(KERN_DEBUG "suspending dma channel %d\n", cp->number); @@ -1270,24 +1256,6 @@ static int s3c2410_dma_suspend(struct sys_device *dev, pm_message_t state) static int s3c2410_dma_resume(struct sys_device *dev) { - struct s3c2410_dma_chan *cp = to_dma_chan(dev); - unsigned int no = cp->number | DMACH_LOW_LEVEL; - - /* restore channel's hardware configuration */ - - if (!cp->in_use) - return 0; - - printk(KERN_INFO "dma%d: restoring configuration\n", cp->number); - - s3c2410_dma_config(no, cp->xfer_unit, cp->dcon); - s3c2410_dma_devconfig(no, cp->source, cp->hw_cfg, cp->dev_addr); - - /* re-select the dma source for this channel */ - - if (cp->map != NULL) - dma_sel.select(cp, cp->map); - return 0; } @@ -1477,7 +1445,6 @@ static struct s3c2410_dma_chan *s3c2410_dma_map_channel(int channel) found: dmach = &s3c2410_chans[ch]; - dmach->map = ch_map; dma_chan_map[channel] = dmach; /* select the channel */ diff --git a/trunk/arch/arm/plat-s3c24xx/gpio.c b/trunk/arch/arm/plat-s3c24xx/gpio.c index ee99dcc7f0bd..ec3a09c4d181 100644 --- a/trunk/arch/arm/plat-s3c24xx/gpio.c +++ b/trunk/arch/arm/plat-s3c24xx/gpio.c @@ -122,19 +122,6 @@ void s3c2410_gpio_pullup(unsigned int pin, unsigned int to) EXPORT_SYMBOL(s3c2410_gpio_pullup); -int s3c2410_gpio_getpull(unsigned int pin) -{ - void __iomem *base = S3C24XX_GPIO_BASE(pin); - unsigned long offs = S3C2410_GPIO_OFFSET(pin); - - if (pin < S3C2410_GPIO_BANKB) - return -EINVAL; - - return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0; -} - -EXPORT_SYMBOL(s3c2410_gpio_getpull); - void s3c2410_gpio_setpin(unsigned int pin, unsigned int to) { void __iomem *base = S3C24XX_GPIO_BASE(pin); @@ -199,19 +186,3 @@ int s3c2410_gpio_getirq(unsigned int pin) } EXPORT_SYMBOL(s3c2410_gpio_getirq); - -int s3c2410_gpio_irq2pin(unsigned int irq) -{ - if (irq >= IRQ_EINT0 && irq <= IRQ_EINT3) - return S3C2410_GPF0 + (irq - IRQ_EINT0); - - if (irq >= IRQ_EINT4 && irq <= IRQ_EINT7) - return S3C2410_GPF4 + (irq - IRQ_EINT4); - - if (irq >= IRQ_EINT8 && irq <= IRQ_EINT23) - return S3C2410_GPG0 + (irq - IRQ_EINT8); - - return -EINVAL; -} - -EXPORT_SYMBOL(s3c2410_gpio_irq2pin); diff --git a/trunk/arch/arm/plat-s3c24xx/irq.c b/trunk/arch/arm/plat-s3c24xx/irq.c index d486f5112569..8fbc88470261 100644 --- a/trunk/arch/arm/plat-s3c24xx/irq.c +++ b/trunk/arch/arm/plat-s3c24xx/irq.c @@ -187,7 +187,7 @@ struct irq_chip s3c_irq_level_chip = { .set_wake = s3c_irq_wake }; -struct irq_chip s3c_irq_chip = { +static struct irq_chip s3c_irq_chip = { .name = "s3c", .ack = s3c_irq_ack, .mask = s3c_irq_mask, diff --git a/trunk/arch/arm/plat-s3c24xx/pm.c b/trunk/arch/arm/plat-s3c24xx/pm.c index bf5581a9aeea..4fdb3117744f 100644 --- a/trunk/arch/arm/plat-s3c24xx/pm.c +++ b/trunk/arch/arm/plat-s3c24xx/pm.c @@ -83,39 +83,38 @@ static struct sleep_save core_save[] = { SAVE_ITEM(S3C2410_REFRESH), }; -static struct gpio_sleep { - void __iomem *base; - unsigned int gpcon; - unsigned int gpdat; - unsigned int gpup; -} gpio_save[] = { - [0] = { - .base = S3C2410_GPACON, - }, - [1] = { - .base = S3C2410_GPBCON, - }, - [2] = { - .base = S3C2410_GPCCON, - }, - [3] = { - .base = S3C2410_GPDCON, - }, - [4] = { - .base = S3C2410_GPECON, - }, - [5] = { - .base = S3C2410_GPFCON, - }, - [6] = { - .base = S3C2410_GPGCON, - }, - [7] = { - .base = S3C2410_GPHCON, - }, -}; +static struct sleep_save gpio_save[] = { + SAVE_ITEM(S3C2410_GPACON), + SAVE_ITEM(S3C2410_GPADAT), + + SAVE_ITEM(S3C2410_GPBCON), + SAVE_ITEM(S3C2410_GPBDAT), + SAVE_ITEM(S3C2410_GPBUP), + + SAVE_ITEM(S3C2410_GPCCON), + SAVE_ITEM(S3C2410_GPCDAT), + SAVE_ITEM(S3C2410_GPCUP), + + SAVE_ITEM(S3C2410_GPDCON), + SAVE_ITEM(S3C2410_GPDDAT), + SAVE_ITEM(S3C2410_GPDUP), + + SAVE_ITEM(S3C2410_GPECON), + SAVE_ITEM(S3C2410_GPEDAT), + SAVE_ITEM(S3C2410_GPEUP), + + SAVE_ITEM(S3C2410_GPFCON), + SAVE_ITEM(S3C2410_GPFDAT), + SAVE_ITEM(S3C2410_GPFUP), + + SAVE_ITEM(S3C2410_GPGCON), + SAVE_ITEM(S3C2410_GPGDAT), + SAVE_ITEM(S3C2410_GPGUP), + + SAVE_ITEM(S3C2410_GPHCON), + SAVE_ITEM(S3C2410_GPHDAT), + SAVE_ITEM(S3C2410_GPHUP), -static struct sleep_save misc_save[] = { SAVE_ITEM(S3C2410_DCLKCON), }; @@ -487,184 +486,6 @@ static void s3c2410_pm_configure_extint(void) } } -/* offsets for CON/DAT/UP registers */ - -#define OFFS_CON (S3C2410_GPACON - S3C2410_GPACON) -#define OFFS_DAT (S3C2410_GPADAT - S3C2410_GPACON) -#define OFFS_UP (S3C2410_GPBUP - S3C2410_GPBCON) - -/* s3c2410_pm_save_gpios() - * - * Save the state of the GPIOs - */ - -static void s3c2410_pm_save_gpios(void) -{ - struct gpio_sleep *gps = gpio_save; - unsigned int gpio; - - for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { - void __iomem *base = gps->base; - - gps->gpcon = __raw_readl(base + OFFS_CON); - gps->gpdat = __raw_readl(base + OFFS_DAT); - - if (gpio > 0) - gps->gpup = __raw_readl(base + OFFS_UP); - - } -} - -/* Test whether the given masked+shifted bits of an GPIO configuration - * are one of the SFN (special function) modes. */ - -static inline int is_sfn(unsigned long con) -{ - return (con == 2 || con == 3); -} - -/* Test if the given masked+shifted GPIO configuration is an input */ - -static inline int is_in(unsigned long con) -{ - return con == 0; -} - -/* Test if the given masked+shifted GPIO configuration is an output */ - -static inline int is_out(unsigned long con) -{ - return con == 1; -} - -/* s3c2410_pm_restore_gpio() - * - * Restore one of the GPIO banks that was saved during suspend. This is - * not as simple as once thought, due to the possibility of glitches - * from the order that the CON and DAT registers are set in. - * - * The three states the pin can be are {IN,OUT,SFN} which gives us 9 - * combinations of changes to check. Three of these, if the pin stays - * in the same configuration can be discounted. This leaves us with - * the following: - * - * { IN => OUT } Change DAT first - * { IN => SFN } Change CON first - * { OUT => SFN } Change CON first, so new data will not glitch - * { OUT => IN } Change CON first, so new data will not glitch - * { SFN => IN } Change CON first - * { SFN => OUT } Change DAT first, so new data will not glitch [1] - * - * We do not currently deal with the UP registers as these control - * weak resistors, so a small delay in change should not need to bring - * these into the calculations. - * - * [1] this assumes that writing to a pin DAT whilst in SFN will set the - * state for when it is next output. - */ - -static void s3c2410_pm_restore_gpio(int index, struct gpio_sleep *gps) -{ - void __iomem *base = gps->base; - unsigned long gps_gpcon = gps->gpcon; - unsigned long gps_gpdat = gps->gpdat; - unsigned long old_gpcon; - unsigned long old_gpdat; - unsigned long old_gpup = 0x0; - unsigned long gpcon; - int nr; - - old_gpcon = __raw_readl(base + OFFS_CON); - old_gpdat = __raw_readl(base + OFFS_DAT); - - if (base == S3C2410_GPACON) { - /* GPACON only has one bit per control / data and no PULLUPs. - * GPACON[x] = 0 => Output, 1 => SFN */ - - /* first set all SFN bits to SFN */ - - gpcon = old_gpcon | gps->gpcon; - __raw_writel(gpcon, base + OFFS_CON); - - /* now set all the other bits */ - - __raw_writel(gps_gpdat, base + OFFS_DAT); - __raw_writel(gps_gpcon, base + OFFS_CON); - } else { - unsigned long old, new, mask; - unsigned long change_mask = 0x0; - - old_gpup = __raw_readl(base + OFFS_UP); - - /* Create a change_mask of all the items that need to have - * their CON value changed before their DAT value, so that - * we minimise the work between the two settings. - */ - - for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { - old = (old_gpcon & mask) >> nr; - new = (gps_gpcon & mask) >> nr; - - /* If there is no change, then skip */ - - if (old == new) - continue; - - /* If both are special function, then skip */ - - if (is_sfn(old) && is_sfn(new)) - continue; - - /* Change is IN => OUT, do not change now */ - - if (is_in(old) && is_out(new)) - continue; - - /* Change is SFN => OUT, do not change now */ - - if (is_sfn(old) && is_out(new)) - continue; - - /* We should now be at the case of IN=>SFN, - * OUT=>SFN, OUT=>IN, SFN=>IN. */ - - change_mask |= mask; - } - - /* Write the new CON settings */ - - gpcon = old_gpcon & ~change_mask; - gpcon |= gps_gpcon & change_mask; - - __raw_writel(gpcon, base + OFFS_CON); - - /* Now change any items that require DAT,CON */ - - __raw_writel(gps_gpdat, base + OFFS_DAT); - __raw_writel(gps_gpcon, base + OFFS_CON); - __raw_writel(gps->gpup, base + OFFS_UP); - } - - DBG("GPIO[%d] CON %08lx => %08lx, DAT %08lx => %08lx\n", - index, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); -} - - -/** s3c2410_pm_restore_gpios() - * - * Restore the state of the GPIOs - */ - -static void s3c2410_pm_restore_gpios(void) -{ - struct gpio_sleep *gps = gpio_save; - int gpio; - - for (gpio = 0; gpio < ARRAY_SIZE(gpio_save); gpio++, gps++) { - s3c2410_pm_restore_gpio(gpio, gps); - } -} - void (*pm_cpu_prep)(void); void (*pm_cpu_sleep)(void); @@ -714,8 +535,7 @@ static int s3c2410_pm_enter(suspend_state_t state) /* save all necessary core registers not covered by the drivers */ - s3c2410_pm_save_gpios(); - s3c2410_pm_do_save(misc_save, ARRAY_SIZE(misc_save)); + s3c2410_pm_do_save(gpio_save, ARRAY_SIZE(gpio_save)); s3c2410_pm_do_save(core_save, ARRAY_SIZE(core_save)); s3c2410_pm_do_save(uart_save, ARRAY_SIZE(uart_save)); @@ -765,9 +585,8 @@ static int s3c2410_pm_enter(suspend_state_t state) /* restore the system state */ s3c2410_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); - s3c2410_pm_do_restore(misc_save, ARRAY_SIZE(misc_save)); + s3c2410_pm_do_restore(gpio_save, ARRAY_SIZE(gpio_save)); s3c2410_pm_do_restore(uart_save, ARRAY_SIZE(uart_save)); - s3c2410_pm_restore_gpios(); s3c2410_pm_debug_init(); diff --git a/trunk/arch/arm/plat-s3c24xx/s3c244x-clock.c b/trunk/arch/arm/plat-s3c24xx/s3c244x-clock.c deleted file mode 100644 index faf3e0f9f4e2..000000000000 --- a/trunk/arch/arm/plat-s3c24xx/s3c244x-clock.c +++ /dev/null @@ -1,137 +0,0 @@ -/* linux/arch/arm/plat-s3c24xx/s3c24xx-clock.c - * - * Copyright (c) 2004-2005,2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks - * - * S3C2440/S3C2442 Common clock support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -*/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#include - -#include -#include - -static int s3c2440_setparent_armclk(struct clk *clk, struct clk *parent) -{ - unsigned long camdivn; - unsigned long dvs; - - if (parent == &clk_f) - dvs = 0; - else if (parent == &clk_h) - dvs = S3C2440_CAMDIVN_DVSEN; - else - return -EINVAL; - - clk->parent = parent; - - camdivn = __raw_readl(S3C2440_CAMDIVN); - camdivn &= ~S3C2440_CAMDIVN_DVSEN; - camdivn |= dvs; - __raw_writel(camdivn, S3C2440_CAMDIVN); - - return 0; -} - -static struct clk clk_arm = { - .name = "armclk", - .id = -1, - .set_parent = s3c2440_setparent_armclk, -}; - -static int s3c244x_clk_add(struct sys_device *sysdev) -{ - unsigned long camdivn = __raw_readl(S3C2440_CAMDIVN); - unsigned long clkdivn; - struct clk *clock_upll; - int ret; - - printk("S3C244X: Clock Support, DVS %s\n", - (camdivn & S3C2440_CAMDIVN_DVSEN) ? "on" : "off"); - - clk_arm.parent = (camdivn & S3C2440_CAMDIVN_DVSEN) ? &clk_h : &clk_f; - - ret = s3c24xx_register_clock(&clk_arm); - if (ret < 0) { - printk(KERN_ERR "S3C24XX: Failed to add armclk (%d)\n", ret); - return ret; - } - - clock_upll = clk_get(NULL, "upll"); - if (IS_ERR(clock_upll)) { - printk(KERN_ERR "S3C244X: Failed to get upll clock\n"); - return -ENOENT; - } - - /* check rate of UPLL, and if it is near 96MHz, then change - * to using half the UPLL rate for the system */ - - if (clk_get_rate(clock_upll) > (94 * MHZ)) { - clk_usb_bus.rate = clk_get_rate(clock_upll) / 2; - - mutex_lock(&clocks_mutex); - - clkdivn = __raw_readl(S3C2410_CLKDIVN); - clkdivn |= S3C2440_CLKDIVN_UCLK; - __raw_writel(clkdivn, S3C2410_CLKDIVN); - - mutex_unlock(&clocks_mutex); - } - - return 0; -} - -static struct sysdev_driver s3c2440_clk_driver = { - .add = s3c244x_clk_add, -}; - -static int s3c2440_clk_init(void) -{ - return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_clk_driver); -} - -arch_initcall(s3c2440_clk_init); - -static struct sysdev_driver s3c2442_clk_driver = { - .add = s3c244x_clk_add, -}; - -static int s3c2442_clk_init(void) -{ - return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_clk_driver); -} - -arch_initcall(s3c2442_clk_init); diff --git a/trunk/include/asm-arm/arch-s3c2410/debug-macro.S b/trunk/include/asm-arm/arch-s3c2410/debug-macro.S index 89076c322726..9c8cd9abb82b 100644 --- a/trunk/include/asm-arm/arch-s3c2410/debug-macro.S +++ b/trunk/include/asm-arm/arch-s3c2410/debug-macro.S @@ -92,9 +92,11 @@ #if defined(CONFIG_CPU_LLSERIAL_S3C2410_ONLY) #define fifo_full fifo_full_s3c2410 #define fifo_level fifo_level_s3c2410 +#warning 2410only #elif !defined(CONFIG_CPU_LLSERIAL_S3C2440_ONLY) #define fifo_full fifo_full_s3c24xx #define fifo_level fifo_level_s3c24xx +#warning generic #endif /* include the reset of the code which will do the work */ diff --git a/trunk/include/asm-arm/arch-s3c2410/dma.h b/trunk/include/asm-arm/arch-s3c2410/dma.h index 4f291d9b7d93..c6e8d8f64938 100644 --- a/trunk/include/asm-arm/arch-s3c2410/dma.h +++ b/trunk/include/asm-arm/arch-s3c2410/dma.h @@ -214,7 +214,6 @@ struct s3c2410_dma_chan { unsigned long dev_addr; unsigned long load_timeout; unsigned int flags; /* channel flags */ - unsigned int hw_cfg; /* last hw config */ struct s3c24xx_dma_map *map; /* channel hw maps */ diff --git a/trunk/include/asm-arm/arch-s3c2410/hardware.h b/trunk/include/asm-arm/arch-s3c2410/hardware.h index 29592c3ebf22..6dadf58ff984 100644 --- a/trunk/include/asm-arm/arch-s3c2410/hardware.h +++ b/trunk/include/asm-arm/arch-s3c2410/hardware.h @@ -50,17 +50,6 @@ extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); extern int s3c2410_gpio_getirq(unsigned int pin); -/* s3c2410_gpio_irq2pin - * - * turn the given irq number into the corresponding GPIO number - * - * returns: - * < 0 = no pin - * >=0 = gpio pin number -*/ - -extern int s3c2410_gpio_irq2pin(unsigned int irq); - #ifdef CONFIG_CPU_S3C2400 extern int s3c2400_gpio_getirq(unsigned int pin); @@ -98,18 +87,6 @@ extern int s3c2410_gpio_irqfilter(unsigned int pin, unsigned int on, extern void s3c2410_gpio_pullup(unsigned int pin, unsigned int to); -/* s3c2410_gpio_getpull - * - * Read the state of the pull-up on a given pin - * - * return: - * < 0 => error code - * 0 => enabled - * 1 => disabled -*/ - -extern int s3c2410_gpio_getpull(unsigned int pin); - extern void s3c2410_gpio_setpin(unsigned int pin, unsigned int to); extern unsigned int s3c2410_gpio_getpin(unsigned int pin); @@ -122,11 +99,6 @@ extern int s3c2440_set_dsc(unsigned int pin, unsigned int value); #endif /* CONFIG_CPU_S3C2440 */ -#ifdef CONFIG_CPU_S3C2412 - -extern int s3c2412_gpio_set_sleepcfg(unsigned int pin, unsigned int state); - -#endif /* CONFIG_CPU_S3C2412 */ #endif /* __ASSEMBLY__ */ diff --git a/trunk/include/asm-arm/arch-s3c2410/irqs.h b/trunk/include/asm-arm/arch-s3c2410/irqs.h index d858b3eb5547..996f65488d2d 100644 --- a/trunk/include/asm-arm/arch-s3c2410/irqs.h +++ b/trunk/include/asm-arm/arch-s3c2410/irqs.h @@ -160,7 +160,4 @@ #define NR_IRQS (IRQ_S3C2440_AC97+1) #endif -/* Our FIQs are routable from IRQ_EINT0 to IRQ_ADCPARENT */ -#define FIQ_START IRQ_EINT0 - #endif /* __ASM_ARCH_IRQ_H */ diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-clock.h b/trunk/include/asm-arm/arch-s3c2410/regs-clock.h index dba9df9d8713..e39656b7a086 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-clock.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-clock.h @@ -138,8 +138,6 @@ s3c2410_get_pll(unsigned int pllval, unsigned int baseclk) #define S3C2412_CLKDIVN_PDIVN (1<<2) #define S3C2412_CLKDIVN_HDIVN_MASK (3<<0) #define S3C2421_CLKDIVN_ARMDIVN (1<<3) -#define S3C2412_CLKDIVN_DVSEN (1<<4) -#define S3C2412_CLKDIVN_HALFHCLK (1<<5) #define S3C2412_CLKDIVN_USB48DIV (1<<6) #define S3C2412_CLKDIVN_UARTDIV_MASK (15<<8) #define S3C2412_CLKDIVN_UARTDIV_SHIFT (8) diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-dsc.h b/trunk/include/asm-arm/arch-s3c2410/regs-dsc.h index 1235df70f34e..c0748511edbc 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-dsc.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-dsc.h @@ -19,7 +19,7 @@ #define S3C2412_DSC1 S3C2410_GPIOREG(0xe0) #endif -#if defined(CONFIG_CPU_S3C244X) +#if defined(CONFIG_CPU_S3C2440) #define S3C2440_DSC0 S3C2410_GPIOREG(0xc4) #define S3C2440_DSC1 S3C2410_GPIOREG(0xc8) diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h b/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h index 0ad75d716ded..b693158b2d3c 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -1133,16 +1133,12 @@ #define S3C2412_GPBSLPCON S3C2410_GPIOREG(0x1C) #define S3C2412_GPCSLPCON S3C2410_GPIOREG(0x2C) #define S3C2412_GPDSLPCON S3C2410_GPIOREG(0x3C) +#define S3C2412_GPESLPCON S3C2410_GPIOREG(0x4C) #define S3C2412_GPFSLPCON S3C2410_GPIOREG(0x5C) #define S3C2412_GPGSLPCON S3C2410_GPIOREG(0x6C) #define S3C2412_GPHSLPCON S3C2410_GPIOREG(0x7C) /* definitions for each pin bit */ -#define S3C2412_GPIO_SLPCON_LOW ( 0x00 ) -#define S3C2412_GPIO_SLPCON_HIGH ( 0x01 ) -#define S3C2412_GPIO_SLPCON_IN ( 0x02 ) -#define S3C2412_GPIO_SLPCON_PULL ( 0x03 ) - #define S3C2412_SLPCON_LOW(x) ( 0x00 << ((x) * 2)) #define S3C2412_SLPCON_HIGH(x) ( 0x01 << ((x) * 2)) #define S3C2412_SLPCON_IN(x) ( 0x02 << ((x) * 2)) diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-mem.h b/trunk/include/asm-arm/arch-s3c2410/regs-mem.h index 312ff93b63c6..e4d82341f7ba 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-mem.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-mem.h @@ -98,19 +98,16 @@ #define S3C2410_BANKCON_Tacp3 (0x1 << 2) #define S3C2410_BANKCON_Tacp4 (0x2 << 2) #define S3C2410_BANKCON_Tacp6 (0x3 << 2) -#define S3C2410_BANKCON_Tacp_SHIFT (2) #define S3C2410_BANKCON_Tcah0 (0x0 << 4) #define S3C2410_BANKCON_Tcah1 (0x1 << 4) #define S3C2410_BANKCON_Tcah2 (0x2 << 4) #define S3C2410_BANKCON_Tcah4 (0x3 << 4) -#define S3C2410_BANKCON_Tcah_SHIFT (4) #define S3C2410_BANKCON_Tcoh0 (0x0 << 6) #define S3C2410_BANKCON_Tcoh1 (0x1 << 6) #define S3C2410_BANKCON_Tcoh2 (0x2 << 6) #define S3C2410_BANKCON_Tcoh4 (0x3 << 6) -#define S3C2410_BANKCON_Tcoh_SHIFT (6) #define S3C2410_BANKCON_Tacc1 (0x0 << 8) #define S3C2410_BANKCON_Tacc2 (0x1 << 8) @@ -120,19 +117,16 @@ #define S3C2410_BANKCON_Tacc8 (0x5 << 8) #define S3C2410_BANKCON_Tacc10 (0x6 << 8) #define S3C2410_BANKCON_Tacc14 (0x7 << 8) -#define S3C2410_BANKCON_Tacc_SHIFT (8) #define S3C2410_BANKCON_Tcos0 (0x0 << 11) #define S3C2410_BANKCON_Tcos1 (0x1 << 11) #define S3C2410_BANKCON_Tcos2 (0x2 << 11) #define S3C2410_BANKCON_Tcos4 (0x3 << 11) -#define S3C2410_BANKCON_Tcos_SHIFT (11) #define S3C2410_BANKCON_Tacs0 (0x0 << 13) #define S3C2410_BANKCON_Tacs1 (0x1 << 13) #define S3C2410_BANKCON_Tacs2 (0x2 << 13) #define S3C2410_BANKCON_Tacs4 (0x3 << 13) -#define S3C2410_BANKCON_Tacs_SHIFT (13) #define S3C2410_BANKCON_SRAM (0x0 << 15) #define S3C2400_BANKCON_EDODRAM (0x2 << 15) diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-power.h b/trunk/include/asm-arm/arch-s3c2410/regs-power.h index 13d13b7cfe98..f79987be55e8 100644 --- a/trunk/include/asm-arm/arch-s3c2410/regs-power.h +++ b/trunk/include/asm-arm/arch-s3c2410/regs-power.h @@ -23,8 +23,7 @@ #define S3C2412_INFORM2 S3C24XX_PWRREG(0x78) #define S3C2412_INFORM3 S3C24XX_PWRREG(0x7C) -#define S3C2412_PWRCFG_BATF_IRQ (1<<0) -#define S3C2412_PWRCFG_BATF_IGNORE (2<<0) +#define S3C2412_PWRCFG_BATF_IGNORE (0<<0) #define S3C2412_PWRCFG_BATF_SLEEP (3<<0) #define S3C2412_PWRCFG_BATF_MASK (3<<0) diff --git a/trunk/include/asm-arm/arch-s3c2410/system.h b/trunk/include/asm-arm/arch-s3c2410/system.h index 14de4e596f87..63891786dfa0 100644 --- a/trunk/include/asm-arm/arch-s3c2410/system.h +++ b/trunk/include/asm-arm/arch-s3c2410/system.h @@ -20,9 +20,6 @@ #include #include -#include -#include - void (*s3c24xx_idle)(void); void (*s3c24xx_reset_hook)(void); @@ -62,8 +59,6 @@ static void arch_idle(void) static void arch_reset(char mode) { - struct clk *wdtclk; - if (mode == 's') { cpu_reset(0); } @@ -75,28 +70,19 @@ arch_reset(char mode) __raw_writel(0, S3C2410_WTCON); /* disable watchdog, to be safe */ - wdtclk = clk_get(NULL, "watchdog"); - if (!IS_ERR(wdtclk)) { - clk_enable(wdtclk); - } else - printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__); - /* put initial values into count and data */ - __raw_writel(0x80, S3C2410_WTCNT); - __raw_writel(0x80, S3C2410_WTDAT); + __raw_writel(0x100, S3C2410_WTCNT); + __raw_writel(0x100, S3C2410_WTDAT); /* set the watchdog to go and reset... */ __raw_writel(S3C2410_WTCON_ENABLE|S3C2410_WTCON_DIV16|S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x20), S3C2410_WTCON); /* wait for reset to assert... */ - mdelay(500); + mdelay(5000); printk(KERN_ERR "Watchdog reset failed to assert reset\n"); - /* delay to allow the serial port to show the message */ - mdelay(50); - /* we'll take a jump through zero as a poor second */ cpu_reset(0); } diff --git a/trunk/include/asm-arm/plat-s3c24xx/dma.h b/trunk/include/asm-arm/plat-s3c24xx/dma.h index c78efe316fc8..2c59406435e5 100644 --- a/trunk/include/asm-arm/plat-s3c24xx/dma.h +++ b/trunk/include/asm-arm/plat-s3c24xx/dma.h @@ -32,7 +32,6 @@ struct s3c24xx_dma_map { struct s3c24xx_dma_addr hw_addr; unsigned long channels[S3C2410_DMA_CHANNELS]; - unsigned long channels_rx[S3C2410_DMA_CHANNELS]; }; struct s3c24xx_dma_selection { @@ -42,10 +41,6 @@ struct s3c24xx_dma_selection { void (*select)(struct s3c2410_dma_chan *chan, struct s3c24xx_dma_map *map); - - void (*direction)(struct s3c2410_dma_chan *chan, - struct s3c24xx_dma_map *map, - enum s3c2410_dmasrc dir); }; extern int s3c24xx_dma_init_map(struct s3c24xx_dma_selection *sel); diff --git a/trunk/include/asm-arm/plat-s3c24xx/irq.h b/trunk/include/asm-arm/plat-s3c24xx/irq.h index 45746a995343..8af6d9579b31 100644 --- a/trunk/include/asm-arm/plat-s3c24xx/irq.h +++ b/trunk/include/asm-arm/plat-s3c24xx/irq.h @@ -15,9 +15,7 @@ #define EXTINT_OFF (IRQ_EINT4 - 4) -/* these are exported for arch/arm/mach-* usage */ extern struct irq_chip s3c_irq_level_chip; -extern struct irq_chip s3c_irq_chip; static inline void s3c_irqsub_mask(unsigned int irqno, unsigned int parentbit, diff --git a/trunk/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h b/trunk/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h deleted file mode 100644 index 25d4058bcfed..000000000000 --- a/trunk/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h +++ /dev/null @@ -1,72 +0,0 @@ -/* linux/include/asm-arm/plat-s3c24xx/regs-s3c2412-iis.h - * - * Copyright 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - * S3C2412 IIS register definition -*/ - -#ifndef __ASM_ARCH_REGS_S3C2412_IIS_H -#define __ASM_ARCH_REGS_S3C2412_IIS_H - -#define S3C2412_IISCON (0x00) -#define S3C2412_IISMOD (0x04) -#define S3C2412_IISFIC (0x08) -#define S3C2412_IISPSR (0x0C) -#define S3C2412_IISTXD (0x10) -#define S3C2412_IISRXD (0x14) - -#define S3C2412_IISCON_LRINDEX (1 << 11) -#define S3C2412_IISCON_TXFIFO_EMPTY (1 << 10) -#define S3C2412_IISCON_RXFIFO_EMPTY (1 << 9) -#define S3C2412_IISCON_TXFIFO_FULL (1 << 8) -#define S3C2412_IISCON_RXFIFO_FULL (1 << 7) -#define S3C2412_IISCON_TXDMA_PAUSE (1 << 6) -#define S3C2412_IISCON_RXDMA_PAUSE (1 << 5) -#define S3C2412_IISCON_TXCH_PAUSE (1 << 4) -#define S3C2412_IISCON_RXCH_PAUSE (1 << 3) -#define S3C2412_IISCON_TXDMA_ACTIVE (1 << 2) -#define S3C2412_IISCON_RXDMA_ACTIVE (1 << 1) -#define S3C2412_IISCON_IIS_ACTIVE (1 << 0) - -#define S3C2412_IISMOD_MASTER_INTERNAL (0 << 10) -#define S3C2412_IISMOD_MASTER_EXTERNAL (1 << 10) -#define S3C2412_IISMOD_SLAVE (2 << 10) -#define S3C2412_IISMOD_MASTER_MASK (3 << 10) -#define S3C2412_IISMOD_MODE_TXONLY (0 << 8) -#define S3C2412_IISMOD_MODE_RXONLY (1 << 8) -#define S3C2412_IISMOD_MODE_TXRX (2 << 8) -#define S3C2412_IISMOD_MODE_MASK (3 << 8) -#define S3C2412_IISMOD_LR_LLOW (0 << 7) -#define S3C2412_IISMOD_LR_RLOW (1 << 7) -#define S3C2412_IISMOD_SDF_IIS (0 << 5) -#define S3C2412_IISMOD_SDF_MSB (0 << 5) -#define S3C2412_IISMOD_SDF_LSB (0 << 5) -#define S3C2412_IISMOD_SDF_MASK (3 << 5) -#define S3C2412_IISMOD_RCLK_256FS (0 << 3) -#define S3C2412_IISMOD_RCLK_512FS (1 << 3) -#define S3C2412_IISMOD_RCLK_384FS (2 << 3) -#define S3C2412_IISMOD_RCLK_768FS (3 << 3) -#define S3C2412_IISMOD_RCLK_MASK (3 << 3) -#define S3C2412_IISMOD_BCLK_32FS (0 << 1) -#define S3C2412_IISMOD_BCLK_48FS (1 << 1) -#define S3C2412_IISMOD_BCLK_16FS (2 << 1) -#define S3C2412_IISMOD_BCLK_24FS (3 << 1) -#define S3C2412_IISMOD_BCLK_MASK (3 << 1) -#define S3C2412_IISMOD_8BIT (1 << 0) - -#define S3C2412_IISPSR_PSREN (1 << 15) - -#define S3C2412_IISFIC_TXFLUSH (1 << 15) -#define S3C2412_IISFIC_RXFLUSH (1 << 7) -#define S3C2412_IISFIC_TXCOUNT(x) (((x) >> 8) & 0xf) -#define S3C2412_IISFIC_RXCOUNT(x) (((x) >> 0) & 0xf) - - - -#endif /* __ASM_ARCH_REGS_S3C2412_IIS_H */ - diff --git a/trunk/include/asm-arm/plat-s3c24xx/regs-spi.h b/trunk/include/asm-arm/plat-s3c24xx/regs-spi.h index ea565b007d04..4a499a138256 100644 --- a/trunk/include/asm-arm/plat-s3c24xx/regs-spi.h +++ b/trunk/include/asm-arm/plat-s3c24xx/regs-spi.h @@ -17,21 +17,6 @@ #define S3C2410_SPCON (0x00) -#define S3C2412_SPCON_RXFIFO_RB2 (0<<14) -#define S3C2412_SPCON_RXFIFO_RB4 (1<<14) -#define S3C2412_SPCON_RXFIFO_RB12 (2<<14) -#define S3C2412_SPCON_RXFIFO_RB14 (3<<14) -#define S3C2412_SPCON_TXFIFO_RB2 (0<<12) -#define S3C2412_SPCON_TXFIFO_RB4 (1<<12) -#define S3C2412_SPCON_TXFIFO_RB12 (2<<12) -#define S3C2412_SPCON_TXFIFO_RB14 (3<<12) -#define S3C2412_SPCON_RXFIFO_RESET (1<<11) /* RxFIFO reset */ -#define S3C2412_SPCON_TXFIFO_RESET (1<<10) /* TxFIFO reset */ -#define S3C2412_SPCON_RXFIFO_EN (1<<9) /* RxFIFO Enable */ -#define S3C2412_SPCON_TXFIFO_EN (1<<8) /* TxFIFO Enable */ - -#define S3C2412_SPCON_DIRC_RX (1<<7) - #define S3C2410_SPCON_SMOD_DMA (2<<5) /* DMA mode */ #define S3C2410_SPCON_SMOD_INT (1<<5) /* interrupt mode */ #define S3C2410_SPCON_SMOD_POLL (0<<5) /* polling mode */ @@ -49,19 +34,10 @@ #define S3C2410_SPSTA (0x04) -#define S3C2412_SPSTA_RXFIFO_AE (1<<11) -#define S3C2412_SPSTA_TXFIFO_AE (1<<10) -#define S3C2412_SPSTA_RXFIFO_ERROR (1<<9) -#define S3C2412_SPSTA_TXFIFO_ERROR (1<<8) -#define S3C2412_SPSTA_RXFIFO_FIFO (1<<7) -#define S3C2412_SPSTA_RXFIFO_EMPTY (1<<6) -#define S3C2412_SPSTA_TXFIFO_NFULL (1<<5) -#define S3C2412_SPSTA_TXFIFO_EMPTY (1<<4) - #define S3C2410_SPSTA_DCOL (1<<2) /* Data Collision Error */ #define S3C2410_SPSTA_MULD (1<<1) /* Multi Master Error */ #define S3C2410_SPSTA_READY (1<<0) /* Data Tx/Rx ready */ -#define S3C2412_SPSTA_READY_ORG (1<<3) + #define S3C2410_SPPIN (0x08) @@ -70,13 +46,9 @@ #define S3C2400_SPPIN_nCS (1<<1) /* SPI Card Select */ #define S3C2410_SPPIN_KEEP (1<<0) /* Master Out keep */ + #define S3C2410_SPPRE (0x0C) #define S3C2410_SPTDAT (0x10) #define S3C2410_SPRDAT (0x14) -#define S3C2412_TXFIFO (0x18) -#define S3C2412_RXFIFO (0x18) -#define S3C2412_SPFIC (0x24) - - #endif /* __ASM_ARCH_REGS_SPI_H */