From 9d58db2085d6c3e331443bba78a84817b4799a46 Mon Sep 17 00:00:00 2001
From: David Daney <david.daney@cavium.com>
Date: Tue, 15 May 2012 00:04:49 -0700
Subject: [PATCH] --- yaml --- r: 309023 b: refs/heads/master c:
 9cd9669bd60ee41d34d1b41d7a0b884806939d7b h: refs/heads/master i:   309021:
 3ad55208cbe0860314e7ff6bfa885b82ac30fc23   309019:
 86790096a9cace158379de328ccbd3625e5a915d   309015:
 57f95cb3593b143ef7ac5459446ec7da5a4cbf14   309007:
 485ab39b2b1c3e5348d37108c4056bf83cc4a5c4   308991:
 0cc79fc9c1de3d14526526bcb7358af6f56725b6 v: v3

---
 [refs]                     |  2 +-
 trunk/arch/mips/mm/c-r4k.c | 14 ++++++++++----
 2 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/[refs] b/[refs]
index a2b0590d455b..a2e9606e1722 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 586016ebf76d62e58a0e9dfd971e465c8027889d
+refs/heads/master: 9cd9669bd60ee41d34d1b41d7a0b884806939d7b
diff --git a/trunk/arch/mips/mm/c-r4k.c b/trunk/arch/mips/mm/c-r4k.c
index bda8eb26ece7..5109be96d98d 100644
--- a/trunk/arch/mips/mm/c-r4k.c
+++ b/trunk/arch/mips/mm/c-r4k.c
@@ -32,7 +32,7 @@
 #include <asm/mmu_context.h>
 #include <asm/war.h>
 #include <asm/cacheflush.h> /* for run_uncached() */
-
+#include <asm/traps.h>
 
 /*
  * Special Variant of smp_call_function for use by cache functions:
@@ -1385,10 +1385,8 @@ static int __init setcoherentio(char *str)
 __setup("coherentio", setcoherentio);
 #endif
 
-void __cpuinit r4k_cache_init(void)
+static void __cpuinit r4k_cache_error_setup(void)
 {
-	extern void build_clear_page(void);
-	extern void build_copy_page(void);
 	extern char __weak except_vec2_generic;
 	extern char __weak except_vec2_sb1;
 	struct cpuinfo_mips *c = &current_cpu_data;
@@ -1403,6 +1401,13 @@ void __cpuinit r4k_cache_init(void)
 		set_uncached_handler(0x100, &except_vec2_generic, 0x80);
 		break;
 	}
+}
+
+void __cpuinit r4k_cache_init(void)
+{
+	extern void build_clear_page(void);
+	extern void build_copy_page(void);
+	struct cpuinfo_mips *c = &current_cpu_data;
 
 	probe_pcache();
 	setup_scache();
@@ -1465,4 +1470,5 @@ void __cpuinit r4k_cache_init(void)
 	local_r4k___flush_cache_all(NULL);
 #endif
 	coherency_setup();
+	board_cache_error_setup = r4k_cache_error_setup;
 }