From 9ee27202ded994172c171b0afc3bf607a3e5d6be Mon Sep 17 00:00:00 2001 From: Tushar Behera Date: Fri, 17 May 2013 11:25:52 +0530 Subject: [PATCH] --- yaml --- r: 377158 b: refs/heads/master c: 39b72d89eb2bf74ec94773defece6890febba7a5 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/clk/samsung/clk-exynos5250.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/[refs] b/[refs] index 5a2e1d3c111e..8a1b6014ae24 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 72b5322f11ff0abf6a52b3007486656578d2c982 +refs/heads/master: 39b72d89eb2bf74ec94773defece6890febba7a5 diff --git a/trunk/drivers/clk/samsung/clk-exynos5250.c b/trunk/drivers/clk/samsung/clk-exynos5250.c index 5c97e75924a8..05d099d0d8ba 100644 --- a/trunk/drivers/clk/samsung/clk-exynos5250.c +++ b/trunk/drivers/clk/samsung/clk-exynos5250.c @@ -208,10 +208,10 @@ struct samsung_fixed_factor_clock exynos5250_fixed_factor_clks[] __initdata = { }; struct samsung_mux_clock exynos5250_mux_clks[] __initdata = { - MUX(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1), - MUX(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1), + MUX_A(none, "mout_apll", mout_apll_p, SRC_CPU, 0, 1, "mout_apll"), + MUX_A(none, "mout_cpu", mout_cpu_p, SRC_CPU, 16, 1, "mout_cpu"), MUX(none, "mout_mpll_fout", mout_mpll_fout_p, PLL_DIV2_SEL, 4, 1), - MUX(none, "sclk_mpll", mout_mpll_p, SRC_CORE1, 8, 1), + MUX_A(none, "sclk_mpll", mout_mpll_p, SRC_CORE1, 8, 1, "mout_mpll"), MUX(none, "mout_bpll_fout", mout_bpll_fout_p, PLL_DIV2_SEL, 0, 1), MUX(none, "sclk_bpll", mout_bpll_p, SRC_CDREX, 0, 1), MUX(none, "mout_vpllsrc", mout_vpllsrc_p, SRC_TOP2, 0, 1),