From 9efe691b58b219a250cc1ad33a616a5cca32b3da Mon Sep 17 00:00:00 2001 From: Florian Tobias Schandinat Date: Thu, 24 Mar 2011 14:25:51 +0000 Subject: [PATCH] --- yaml --- r: 247854 b: refs/heads/master c: b692a63af8b63a7a7e84702a713d0072e336b326 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/video/via/hw.c | 19 ++++++++++++++++++ trunk/drivers/video/via/via_clock.c | 30 +++++++++++++++++++++++------ 3 files changed, 44 insertions(+), 7 deletions(-) diff --git a/[refs] b/[refs] index 3bfc8c48691c..a74aada8bc55 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 2c536f84c19c73ab1e3411bf1596ff85c4a23783 +refs/heads/master: b692a63af8b63a7a7e84702a713d0072e336b326 diff --git a/trunk/drivers/video/via/hw.c b/trunk/drivers/video/via/hw.c index f1eff0b4831f..df84251b8f93 100644 --- a/trunk/drivers/video/via/hw.c +++ b/trunk/drivers/video/via/hw.c @@ -2289,6 +2289,25 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, get_sync(viafbinfo1)); } + clock.set_primary_clock_source(VIA_CLKSRC_X1, true); + clock.set_secondary_clock_source(VIA_CLKSRC_X1, true); + + if (viaparinfo->shared->iga1_devices) { + clock.set_primary_pll_state(VIA_STATE_ON); + clock.set_primary_clock_state(VIA_STATE_ON); + } else { + clock.set_primary_pll_state(VIA_STATE_OFF); + clock.set_primary_clock_state(VIA_STATE_OFF); + } + + if (viaparinfo->shared->iga2_devices) { + clock.set_secondary_pll_state(VIA_STATE_ON); + clock.set_secondary_clock_state(VIA_STATE_ON); + } else { + clock.set_secondary_pll_state(VIA_STATE_OFF); + clock.set_secondary_clock_state(VIA_STATE_OFF); + } + via_set_state(devices, VIA_STATE_ON); device_screen_on(); return 1; diff --git a/trunk/drivers/video/via/via_clock.c b/trunk/drivers/video/via/via_clock.c index 29afe4ce3492..a829a246881c 100644 --- a/trunk/drivers/video/via/via_clock.c +++ b/trunk/drivers/video/via/via_clock.c @@ -29,6 +29,9 @@ #include "global.h" #include "debug.h" +const char *via_slap = "Please slap VIA Technologies to motivate them " + "releasing full documentation for your platform!\n"; + static inline u32 cle266_encode_pll(struct via_pll_config pll) { return (pll.multiplier << 8) @@ -229,19 +232,34 @@ static void set_secondary_clock_source(enum via_clksrc source, bool use_pll) via_write_reg_mask(VIACR, 0x6C, data, 0x0F); } +static void dummy_set_clock_state(u8 state) +{ + printk(KERN_INFO "Using undocumented set clock state.\n%s", via_slap); +} + +static void dummy_set_clock_source(enum via_clksrc source, bool use_pll) +{ + printk(KERN_INFO "Using undocumented set clock source.\n%s", via_slap); +} + +static void dummy_set_pll_state(u8 state) +{ + printk(KERN_INFO "Using undocumented set PLL state.\n%s", via_slap); +} + void via_clock_init(struct via_clock *clock, int gfx_chip) { switch (gfx_chip) { case UNICHROME_CLE266: case UNICHROME_K400: - clock->set_primary_clock_state = NULL; - clock->set_primary_clock_source = NULL; - clock->set_primary_pll_state = NULL; + clock->set_primary_clock_state = dummy_set_clock_state; + clock->set_primary_clock_source = dummy_set_clock_source; + clock->set_primary_pll_state = dummy_set_pll_state; clock->set_primary_pll = cle266_set_primary_pll; - clock->set_secondary_clock_state = NULL; - clock->set_secondary_clock_source = NULL; - clock->set_secondary_pll_state = NULL; + clock->set_secondary_clock_state = dummy_set_clock_state; + clock->set_secondary_clock_source = dummy_set_clock_source; + clock->set_secondary_pll_state = dummy_set_pll_state; clock->set_secondary_pll = cle266_set_secondary_pll; break; case UNICHROME_K800: