From 9f0e9698a2fcbb5cc05950b0234bdd812e550712 Mon Sep 17 00:00:00 2001 From: Andreas Herrmann Date: Fri, 20 Jan 2012 17:38:23 +0100 Subject: [PATCH] --- yaml --- r: 286809 b: refs/heads/master c: 652847aa449cfe364d40018849223f57f31a38e2 h: refs/heads/master i: 286807: 16a89a0c1a0cadd952700ea2b4b3dd266b0bc686 v: v3 --- [refs] | 2 +- trunk/arch/x86/include/asm/cpufeature.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 76b57fd4e429..56ad42d309c9 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5067cf53cac9b36d42ebb3a45bb12259d0bc1e68 +refs/heads/master: 652847aa449cfe364d40018849223f57f31a38e2 diff --git a/trunk/arch/x86/include/asm/cpufeature.h b/trunk/arch/x86/include/asm/cpufeature.h index 17c5d4bdee5e..8d67d428b0f9 100644 --- a/trunk/arch/x86/include/asm/cpufeature.h +++ b/trunk/arch/x86/include/asm/cpufeature.h @@ -159,6 +159,7 @@ #define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */ #define X86_FEATURE_LWP (6*32+15) /* Light Weight Profiling */ #define X86_FEATURE_FMA4 (6*32+16) /* 4 operands MAC instructions */ +#define X86_FEATURE_TCE (6*32+17) /* translation cache extension */ #define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */ #define X86_FEATURE_TBM (6*32+21) /* trailing bit manipulations */ #define X86_FEATURE_TOPOEXT (6*32+22) /* topology extensions CPUID leafs */