From 9f78b034494406d72767d14c40c03f716f73a7d8 Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Wed, 26 Sep 2012 16:15:27 -0700 Subject: [PATCH] --- yaml --- r: 347139 b: refs/heads/master c: 30fad64325ba368ffe1f92bd37f4b96c1fa4da83 h: refs/heads/master i: 347137: 4744762008b2694df1af4c4b5bbf687737619bd7 347135: 64d6a2696d08ead3878572af667f579b17a119ba v: v3 --- [refs] | 2 +- trunk/drivers/mtd/nand/fsl_elbc_nand.c | 15 --------------- 2 files changed, 1 insertion(+), 16 deletions(-) diff --git a/[refs] b/[refs] index 4429e32aa184..12142ce01a0f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ecbcbc7b75bb1b7596fca2d588d2f7539dc4e581 +refs/heads/master: 30fad64325ba368ffe1f92bd37f4b96c1fa4da83 diff --git a/trunk/drivers/mtd/nand/fsl_elbc_nand.c b/trunk/drivers/mtd/nand/fsl_elbc_nand.c index cc1480a5e4c1..4c4d3e5bca18 100644 --- a/trunk/drivers/mtd/nand/fsl_elbc_nand.c +++ b/trunk/drivers/mtd/nand/fsl_elbc_nand.c @@ -108,20 +108,6 @@ static struct nand_ecclayout fsl_elbc_oob_lp_eccm1 = { .oobfree = { {1, 7}, {11, 13}, {27, 13}, {43, 13}, {59, 5} }, }; -/* - * fsl_elbc_oob_lp_eccm* specify that LP NAND's OOB free area starts at offset - * 1, so we have to adjust bad block pattern. This pattern should be used for - * x8 chips only. So far hardware does not support x16 chips anyway. - */ -static u8 scan_ff_pattern[] = { 0xff, }; - -static struct nand_bbt_descr largepage_memorybased = { - .options = 0, - .offs = 0, - .len = 1, - .pattern = scan_ff_pattern, -}; - /* * ELBC may use HW ECC, so that OOB offsets, that NAND core uses for bbt, * interfere with ECC positions, that's why we implement our own descriptors. @@ -699,7 +685,6 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) chip->ecc.layout = (priv->fmr & FMR_ECCM) ? &fsl_elbc_oob_lp_eccm1 : &fsl_elbc_oob_lp_eccm0; - chip->badblock_pattern = &largepage_memorybased; } } else { dev_err(priv->dev,