From 9fa3e69ef4a062284c7792ce23f59999e80084d1 Mon Sep 17 00:00:00 2001
From: Chao Xie <xiechao.mail@gmail.com>
Date: Tue, 31 Jul 2012 14:13:14 +0800
Subject: [PATCH] --- yaml --- r: 326706 b: refs/heads/master c:
 c2b7e05c753156dfba3240c59c400d557c5c8746 h: refs/heads/master v: v3

---
 [refs]                                        |  2 +-
 .../devicetree/bindings/arm/mrvl/tauros2.txt  | 17 +++++++++
 trunk/arch/arm/mm/cache-tauros2.c             | 35 ++++++++++++++++++-
 3 files changed, 52 insertions(+), 2 deletions(-)
 create mode 100644 trunk/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt

diff --git a/[refs] b/[refs]
index c9b1def56e2c..03bf9688481a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5cc5815795379690a07d8226fda24ba2fc3f1339
+refs/heads/master: c2b7e05c753156dfba3240c59c400d557c5c8746
diff --git a/trunk/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/trunk/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt
new file mode 100644
index 000000000000..31af1cbb60bd
--- /dev/null
+++ b/trunk/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt
@@ -0,0 +1,17 @@
+* Marvell Tauros2 Cache
+
+Required properties:
+- compatible : Should be "marvell,tauros2-cache".
+- marvell,tauros2-cache-features : Specify the features supported for the
+  tauros2 cache.
+  The features including
+    CACHE_TAUROS2_PREFETCH_ON       (1 << 0)
+    CACHE_TAUROS2_LINEFILL_BURST8   (1 << 1)
+  The definition can be found at
+  arch/arm/include/asm/hardware/cache-tauros2.h
+
+Example:
+	L2: l2-cache {
+		compatible = "marvell,tauros2-cache";
+		marvell,tauros2-cache-features = <0x3>;
+	};
diff --git a/trunk/arch/arm/mm/cache-tauros2.c b/trunk/arch/arm/mm/cache-tauros2.c
index e9f054fc7e87..1be0f4e5e6eb 100644
--- a/trunk/arch/arm/mm/cache-tauros2.c
+++ b/trunk/arch/arm/mm/cache-tauros2.c
@@ -15,6 +15,8 @@
  */
 
 #include <linux/init.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
 #include <asm/cacheflush.h>
 #include <asm/cp15.h>
 #include <asm/cputype.h>
@@ -198,7 +200,7 @@ static void enable_extra_feature(unsigned int features)
 	write_extra_features(u);
 }
 
-void __init tauros2_init(unsigned int features)
+static void __init tauros2_internal_init(unsigned int features)
 {
 	char *mode = NULL;
 
@@ -294,3 +296,34 @@ void __init tauros2_init(unsigned int features)
 	printk(KERN_INFO "Tauros2: L2 cache support initialised "
 			 "in %s mode.\n", mode);
 }
+
+#ifdef CONFIG_OF
+static const struct of_device_id tauros2_ids[] __initconst = {
+	{ .compatible = "marvell,tauros2-cache"},
+	{}
+};
+#endif
+
+void __init tauros2_init(unsigned int features)
+{
+#ifdef CONFIG_OF
+	struct device_node *node;
+	int ret;
+	unsigned int f;
+
+	node = of_find_matching_node(NULL, tauros2_ids);
+	if (!node) {
+		pr_info("Not found marvell,tauros2-cache, disable it\n");
+		return;
+	}
+
+	ret = of_property_read_u32(node, "marvell,tauros2-cache-features", &f);
+	if (ret) {
+		pr_info("Not found marvell,tauros-cache-features property, "
+			"disable extra features\n");
+		features = 0;
+	} else
+		features = f;
+#endif
+	tauros2_internal_init(features);
+}