diff --git a/[refs] b/[refs] index 59a21a972fee..b4138c88754c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 148086bb64694cc91624bab2a550d50f800eb4b7 +refs/heads/master: ca444564a947034557a85357b3911d067cac4b8f diff --git a/trunk/Documentation/scheduler/sched-domains.txt b/trunk/Documentation/scheduler/sched-domains.txt index b7ee379b651b..373ceacc367e 100644 --- a/trunk/Documentation/scheduler/sched-domains.txt +++ b/trunk/Documentation/scheduler/sched-domains.txt @@ -1,7 +1,8 @@ -Each CPU has a "base" scheduling domain (struct sched_domain). The domain +Each CPU has a "base" scheduling domain (struct sched_domain). These are +accessed via cpu_sched_domain(i) and this_sched_domain() macros. The domain hierarchy is built from these base domains via the ->parent pointer. ->parent -MUST be NULL terminated, and domain structures should be per-CPU as they are -locklessly updated. +MUST be NULL terminated, and domain structures should be per-CPU as they +are locklessly updated. Each scheduling domain spans a number of CPUs (stored in the ->span field). A domain's span MUST be a superset of it child's span (this restriction could @@ -25,26 +26,11 @@ is treated as one entity. The load of a group is defined as the sum of the load of each of its member CPUs, and only when the load of a group becomes out of balance are tasks moved between groups. -In kernel/sched.c, trigger_load_balance() is run periodically on each CPU -through scheduler_tick(). It raises a softirq after the next regularly scheduled -rebalancing event for the current runqueue has arrived. The actual load -balancing workhorse, run_rebalance_domains()->rebalance_domains(), is then run -in softirq context (SCHED_SOFTIRQ). - -The latter function takes two arguments: the current CPU and whether it was idle -at the time the scheduler_tick() happened and iterates over all sched domains -our CPU is on, starting from its base domain and going up the ->parent chain. -While doing that, it checks to see if the current domain has exhausted its -rebalance interval. If so, it runs load_balance() on that domain. It then checks -the parent sched_domain (if it exists), and the parent of the parent and so -forth. - -Initially, load_balance() finds the busiest group in the current sched domain. -If it succeeds, it looks for the busiest runqueue of all the CPUs' runqueues in -that group. If it manages to find such a runqueue, it locks both our initial -CPU's runqueue and the newly found busiest one and starts moving tasks from it -to our runqueue. The exact number of tasks amounts to an imbalance previously -computed while iterating over this sched domain's groups. +In kernel/sched.c, rebalance_tick is run periodically on each CPU. This +function takes its CPU's base sched domain and checks to see if has reached +its rebalance interval. If so, then it will run load_balance on that domain. +rebalance_tick then checks the parent sched_domain (if it exists), and the +parent of the parent and so forth. *** Implementing sched domains *** The "base" domain will "span" the first level of the hierarchy. In the case diff --git a/trunk/Makefile b/trunk/Makefile index ba7a55ccd890..7d4e9c8da729 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 -SUBLEVEL = 39 -EXTRAVERSION = -rc1 +SUBLEVEL = 38 +EXTRAVERSION = NAME = Flesh-Eating Bats with Fangs # *DOCUMENTATION* diff --git a/trunk/arch/alpha/Kconfig b/trunk/arch/alpha/Kconfig index 9808998cc073..cc31bec2e316 100644 --- a/trunk/arch/alpha/Kconfig +++ b/trunk/arch/alpha/Kconfig @@ -11,7 +11,7 @@ config ALPHA select HAVE_GENERIC_HARDIRQS select GENERIC_IRQ_PROBE select AUTO_IRQ_AFFINITY if SMP - select GENERIC_IRQ_SHOW + select GENERIC_HARDIRQS_NO_DEPRECATED help The Alpha is a 64-bit general-purpose processor designed and marketed by the Digital Equipment Corporation of blessed memory, diff --git a/trunk/arch/alpha/kernel/irq.c b/trunk/arch/alpha/kernel/irq.c index 381431a2d6d9..a19d60082299 100644 --- a/trunk/arch/alpha/kernel/irq.c +++ b/trunk/arch/alpha/kernel/irq.c @@ -67,21 +67,68 @@ int irq_select_affinity(unsigned int irq) } #endif /* CONFIG_SMP */ -int arch_show_interrupts(struct seq_file *p, int prec) +int +show_interrupts(struct seq_file *p, void *v) { int j; + int irq = *(loff_t *) v; + struct irqaction * action; + struct irq_desc *desc; + unsigned long flags; #ifdef CONFIG_SMP - seq_puts(p, "IPI: "); - for_each_online_cpu(j) - seq_printf(p, "%10lu ", cpu_data[j].ipi_count); - seq_putc(p, '\n'); + if (irq == 0) { + seq_puts(p, " "); + for_each_online_cpu(j) + seq_printf(p, "CPU%d ", j); + seq_putc(p, '\n'); + } +#endif + + if (irq < ACTUAL_NR_IRQS) { + desc = irq_to_desc(irq); + + if (!desc) + return 0; + + raw_spin_lock_irqsave(&desc->lock, flags); + action = desc->action; + if (!action) + goto unlock; + seq_printf(p, "%3d: ", irq); +#ifndef CONFIG_SMP + seq_printf(p, "%10u ", kstat_irqs(irq)); +#else + for_each_online_cpu(j) + seq_printf(p, "%10u ", kstat_irqs_cpu(irq, j)); #endif - seq_puts(p, "PMI: "); - for_each_online_cpu(j) - seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); - seq_puts(p, " Performance Monitoring\n"); - seq_printf(p, "ERR: %10lu\n", irq_err_count); + seq_printf(p, " %14s", get_irq_desc_chip(desc)->name); + seq_printf(p, " %c%s", + (action->flags & IRQF_DISABLED)?'+':' ', + action->name); + + for (action=action->next; action; action = action->next) { + seq_printf(p, ", %c%s", + (action->flags & IRQF_DISABLED)?'+':' ', + action->name); + } + + seq_putc(p, '\n'); +unlock: + raw_spin_unlock_irqrestore(&desc->lock, flags); + } else if (irq == ACTUAL_NR_IRQS) { +#ifdef CONFIG_SMP + seq_puts(p, "IPI: "); + for_each_online_cpu(j) + seq_printf(p, "%10lu ", cpu_data[j].ipi_count); + seq_putc(p, '\n'); +#endif + seq_puts(p, "PMI: "); + for_each_online_cpu(j) + seq_printf(p, "%10lu ", per_cpu(irq_pmi_count, j)); + seq_puts(p, " Performance Monitoring\n"); + seq_printf(p, "ERR: %10lu\n", irq_err_count); + } return 0; } diff --git a/trunk/arch/alpha/kernel/irq_alpha.c b/trunk/arch/alpha/kernel/irq_alpha.c index 1479dc6ebd97..411ca11d0a18 100644 --- a/trunk/arch/alpha/kernel/irq_alpha.c +++ b/trunk/arch/alpha/kernel/irq_alpha.c @@ -228,7 +228,7 @@ struct irqaction timer_irqaction = { void __init init_rtc_irq(void) { - irq_set_chip_and_handler_name(RTC_IRQ, &no_irq_chip, + set_irq_chip_and_handler_name(RTC_IRQ, &no_irq_chip, handle_simple_irq, "RTC"); setup_irq(RTC_IRQ, &timer_irqaction); } diff --git a/trunk/arch/alpha/kernel/irq_i8259.c b/trunk/arch/alpha/kernel/irq_i8259.c index e1861c77dabc..c7cc9813e45f 100644 --- a/trunk/arch/alpha/kernel/irq_i8259.c +++ b/trunk/arch/alpha/kernel/irq_i8259.c @@ -92,7 +92,7 @@ init_i8259a_irqs(void) outb(0xff, 0xA1); /* mask all of 8259A-2 */ for (i = 0; i < 16; i++) { - irq_set_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &i8259a_irq_type, handle_level_irq); } setup_irq(2, &cascade); diff --git a/trunk/arch/alpha/kernel/irq_pyxis.c b/trunk/arch/alpha/kernel/irq_pyxis.c index 13c97a5b31e8..b30227fa7f5f 100644 --- a/trunk/arch/alpha/kernel/irq_pyxis.c +++ b/trunk/arch/alpha/kernel/irq_pyxis.c @@ -102,7 +102,7 @@ init_pyxis_irqs(unsigned long ignore_mask) for (i = 16; i < 48; ++i) { if ((ignore_mask >> i) & 1) continue; - irq_set_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &pyxis_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/irq_srm.c b/trunk/arch/alpha/kernel/irq_srm.c index a79fa30e7552..82a47bba41c4 100644 --- a/trunk/arch/alpha/kernel/irq_srm.c +++ b/trunk/arch/alpha/kernel/irq_srm.c @@ -51,7 +51,7 @@ init_srm_irqs(long max, unsigned long ignore_mask) for (i = 16; i < max; ++i) { if (i < 64 && ((ignore_mask >> i) & 1)) continue; - irq_set_chip_and_handler(i, &srm_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &srm_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/trunk/arch/alpha/kernel/sys_alcor.c b/trunk/arch/alpha/kernel/sys_alcor.c index 0e1439904cdb..88d95e872f55 100644 --- a/trunk/arch/alpha/kernel/sys_alcor.c +++ b/trunk/arch/alpha/kernel/sys_alcor.c @@ -125,7 +125,7 @@ alcor_init_irq(void) on while IRQ probing. */ if (i >= 16+20 && i <= 16+30) continue; - irq_set_chip_and_handler(i, &alcor_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &alcor_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } i8259a_irq_type.irq_ack = alcor_isa_mask_and_ack_irq; diff --git a/trunk/arch/alpha/kernel/sys_cabriolet.c b/trunk/arch/alpha/kernel/sys_cabriolet.c index c8c112d51584..57eb6307bc27 100644 --- a/trunk/arch/alpha/kernel/sys_cabriolet.c +++ b/trunk/arch/alpha/kernel/sys_cabriolet.c @@ -105,8 +105,8 @@ common_init_irq(void (*srm_dev_int)(unsigned long v)) outb(0xff, 0x806); for (i = 16; i < 35; ++i) { - irq_set_chip_and_handler(i, &cabriolet_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &cabriolet_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/trunk/arch/alpha/kernel/sys_dp264.c b/trunk/arch/alpha/kernel/sys_dp264.c index 5ac00fd4cd0c..481df4ecb651 100644 --- a/trunk/arch/alpha/kernel/sys_dp264.c +++ b/trunk/arch/alpha/kernel/sys_dp264.c @@ -270,7 +270,7 @@ init_tsunami_irqs(struct irq_chip * ops, int imin, int imax) { long i; for (i = imin; i <= imax; ++i) { - irq_set_chip_and_handler(i, ops, handle_level_irq); + set_irq_chip_and_handler(i, ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/trunk/arch/alpha/kernel/sys_eb64p.c b/trunk/arch/alpha/kernel/sys_eb64p.c index a7a23b40eec5..402e908ffb3e 100644 --- a/trunk/arch/alpha/kernel/sys_eb64p.c +++ b/trunk/arch/alpha/kernel/sys_eb64p.c @@ -118,7 +118,7 @@ eb64p_init_irq(void) init_i8259a_irqs(); for (i = 16; i < 32; ++i) { - irq_set_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &eb64p_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_eiger.c b/trunk/arch/alpha/kernel/sys_eiger.c index a60cd5b2621e..0b44a54c1522 100644 --- a/trunk/arch/alpha/kernel/sys_eiger.c +++ b/trunk/arch/alpha/kernel/sys_eiger.c @@ -138,7 +138,7 @@ eiger_init_irq(void) init_i8259a_irqs(); for (i = 16; i < 128; ++i) { - irq_set_chip_and_handler(i, &eiger_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &eiger_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/trunk/arch/alpha/kernel/sys_jensen.c b/trunk/arch/alpha/kernel/sys_jensen.c index 7f1a87f176e2..00341b75c8b2 100644 --- a/trunk/arch/alpha/kernel/sys_jensen.c +++ b/trunk/arch/alpha/kernel/sys_jensen.c @@ -171,11 +171,11 @@ jensen_init_irq(void) { init_i8259a_irqs(); - irq_set_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq); - irq_set_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq); - irq_set_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq); - irq_set_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq); - irq_set_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(1, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(4, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(3, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(7, &jensen_local_irq_type, handle_level_irq); + set_irq_chip_and_handler(9, &jensen_local_irq_type, handle_level_irq); common_init_isa_dma(); } diff --git a/trunk/arch/alpha/kernel/sys_marvel.c b/trunk/arch/alpha/kernel/sys_marvel.c index 388b99d1779d..e61910734e41 100644 --- a/trunk/arch/alpha/kernel/sys_marvel.c +++ b/trunk/arch/alpha/kernel/sys_marvel.c @@ -276,7 +276,7 @@ init_io7_irqs(struct io7 *io7, /* Set up the lsi irqs. */ for (i = 0; i < 128; ++i) { - irq_set_chip_and_handler(base + i, lsi_ops, handle_level_irq); + set_irq_chip_and_handler(base + i, lsi_ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } @@ -290,7 +290,7 @@ init_io7_irqs(struct io7 *io7, /* Set up the msi irqs. */ for (i = 128; i < (128 + 512); ++i) { - irq_set_chip_and_handler(base + i, msi_ops, handle_level_irq); + set_irq_chip_and_handler(base + i, msi_ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } @@ -308,8 +308,8 @@ marvel_init_irq(void) /* Reserve the legacy irqs. */ for (i = 0; i < 16; ++i) { - irq_set_chip_and_handler(i, &marvel_legacy_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &marvel_legacy_irq_type, + handle_level_irq); } /* Init the io7 irqs. */ diff --git a/trunk/arch/alpha/kernel/sys_mikasa.c b/trunk/arch/alpha/kernel/sys_mikasa.c index 0e6e4697a025..cf7f43dd3147 100644 --- a/trunk/arch/alpha/kernel/sys_mikasa.c +++ b/trunk/arch/alpha/kernel/sys_mikasa.c @@ -98,8 +98,7 @@ mikasa_init_irq(void) mikasa_update_irq_hw(0); for (i = 16; i < 32; ++i) { - irq_set_chip_and_handler(i, &mikasa_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &mikasa_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_noritake.c b/trunk/arch/alpha/kernel/sys_noritake.c index a00ac7087167..92bc188e94a9 100644 --- a/trunk/arch/alpha/kernel/sys_noritake.c +++ b/trunk/arch/alpha/kernel/sys_noritake.c @@ -127,8 +127,7 @@ noritake_init_irq(void) outw(0, 0x54c); for (i = 16; i < 48; ++i) { - irq_set_chip_and_handler(i, &noritake_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &noritake_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_rawhide.c b/trunk/arch/alpha/kernel/sys_rawhide.c index 7f52161f3d88..936d4140ed5f 100644 --- a/trunk/arch/alpha/kernel/sys_rawhide.c +++ b/trunk/arch/alpha/kernel/sys_rawhide.c @@ -180,8 +180,7 @@ rawhide_init_irq(void) } for (i = 16; i < 128; ++i) { - irq_set_chip_and_handler(i, &rawhide_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &rawhide_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_rx164.c b/trunk/arch/alpha/kernel/sys_rx164.c index 216d94d9c0c1..cea22a62913b 100644 --- a/trunk/arch/alpha/kernel/sys_rx164.c +++ b/trunk/arch/alpha/kernel/sys_rx164.c @@ -99,7 +99,7 @@ rx164_init_irq(void) rx164_update_irq_hw(0); for (i = 16; i < 40; ++i) { - irq_set_chip_and_handler(i, &rx164_irq_type, handle_level_irq); + set_irq_chip_and_handler(i, &rx164_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_sable.c b/trunk/arch/alpha/kernel/sys_sable.c index da714e427c5f..a349538aabc9 100644 --- a/trunk/arch/alpha/kernel/sys_sable.c +++ b/trunk/arch/alpha/kernel/sys_sable.c @@ -518,8 +518,8 @@ sable_lynx_init_irq(int nr_of_irqs) long i; for (i = 0; i < nr_of_irqs; ++i) { - irq_set_chip_and_handler(i, &sable_lynx_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &sable_lynx_irq_type, + handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_takara.c b/trunk/arch/alpha/kernel/sys_takara.c index a31f8cd9bd6b..42a5331f13c4 100644 --- a/trunk/arch/alpha/kernel/sys_takara.c +++ b/trunk/arch/alpha/kernel/sys_takara.c @@ -138,8 +138,7 @@ takara_init_irq(void) takara_update_irq_hw(i, -1); for (i = 16; i < 128; ++i) { - irq_set_chip_and_handler(i, &takara_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i, &takara_irq_type, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/alpha/kernel/sys_titan.c b/trunk/arch/alpha/kernel/sys_titan.c index fea0e4620994..8c13a0c77830 100644 --- a/trunk/arch/alpha/kernel/sys_titan.c +++ b/trunk/arch/alpha/kernel/sys_titan.c @@ -179,7 +179,7 @@ init_titan_irqs(struct irq_chip * ops, int imin, int imax) { long i; for (i = imin; i <= imax; ++i) { - irq_set_chip_and_handler(i, ops, handle_level_irq); + set_irq_chip_and_handler(i, ops, handle_level_irq); irq_set_status_flags(i, IRQ_LEVEL); } } diff --git a/trunk/arch/alpha/kernel/sys_wildfire.c b/trunk/arch/alpha/kernel/sys_wildfire.c index d3cb28bb8eb0..ca60a387ef0a 100644 --- a/trunk/arch/alpha/kernel/sys_wildfire.c +++ b/trunk/arch/alpha/kernel/sys_wildfire.c @@ -183,17 +183,17 @@ wildfire_init_irq_per_pca(int qbbno, int pcano) for (i = 0; i < 16; ++i) { if (i == 2) continue; - irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, + handle_level_irq); irq_set_status_flags(i + irq_bias, IRQ_LEVEL); } - irq_set_chip_and_handler(36 + irq_bias, &wildfire_irq_type, - handle_level_irq); + set_irq_chip_and_handler(36+irq_bias, &wildfire_irq_type, + handle_level_irq); irq_set_status_flags(36 + irq_bias, IRQ_LEVEL); for (i = 40; i < 64; ++i) { - irq_set_chip_and_handler(i + irq_bias, &wildfire_irq_type, - handle_level_irq); + set_irq_chip_and_handler(i+irq_bias, &wildfire_irq_type, + handle_level_irq); irq_set_status_flags(i + irq_bias, IRQ_LEVEL); } diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 5b9f78b570e8..efe06e004714 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -28,7 +28,6 @@ config ARM select HAVE_C_RECORDMCOUNT select HAVE_GENERIC_HARDIRQS select HAVE_SPARSE_IRQ - select GENERIC_IRQ_SHOW help The ARM series is a line of low-power-consumption RISC chip designs licensed by ARM Ltd and targeted at embedded applications and @@ -366,7 +365,6 @@ config ARCH_MXC select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP - select HAVE_SCHED_CLOCK help Support for Freescale MXC/iMX-based family of processors diff --git a/trunk/arch/arm/boot/compressed/head.S b/trunk/arch/arm/boot/compressed/head.S index adf583cd0c35..84ac4d656310 100644 --- a/trunk/arch/arm/boot/compressed/head.S +++ b/trunk/arch/arm/boot/compressed/head.S @@ -21,12 +21,20 @@ #if defined(CONFIG_DEBUG_ICEDCC) -#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) +#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) .macro loadsp, rb, tmp .endm .macro writeb, ch, rb mcr p14, 0, \ch, c0, c5, 0 .endm +#elif defined(CONFIG_CPU_V7) + .macro loadsp, rb, tmp + .endm + .macro writeb, ch, rb +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + mcr p14, 0, \ch, c0, c5, 0 + .endm #elif defined(CONFIG_CPU_XSCALE) .macro loadsp, rb, tmp .endm diff --git a/trunk/arch/arm/boot/compressed/misc.c b/trunk/arch/arm/boot/compressed/misc.c index 2df38263124c..4657e877bf8f 100644 --- a/trunk/arch/arm/boot/compressed/misc.c +++ b/trunk/arch/arm/boot/compressed/misc.c @@ -36,7 +36,7 @@ extern void error(char *x); #ifdef CONFIG_DEBUG_ICEDCC -#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) +#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) static void icedcc_putc(int ch) { @@ -52,6 +52,16 @@ static void icedcc_putc(int ch) asm("mcr p14, 0, %0, c0, c5, 0" : : "r" (ch)); } +#elif defined(CONFIG_CPU_V7) + +static void icedcc_putc(int ch) +{ + asm( + "wait: mrc p14, 0, pc, c0, c1, 0 \n\ + bcs wait \n\ + mcr p14, 0, %0, c0, c5, 0 " + : : "r" (ch)); +} #elif defined(CONFIG_CPU_XSCALE) diff --git a/trunk/arch/arm/common/gic.c b/trunk/arch/arm/common/gic.c index f70ec7dadebb..cb6b041c39d2 100644 --- a/trunk/arch/arm/common/gic.c +++ b/trunk/arch/arm/common/gic.c @@ -213,8 +213,8 @@ static int gic_set_wake(struct irq_data *d, unsigned int on) static void gic_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) { - struct gic_chip_data *chip_data = irq_get_handler_data(irq); - struct irq_chip *chip = irq_get_chip(irq); + struct gic_chip_data *chip_data = get_irq_data(irq); + struct irq_chip *chip = get_irq_chip(irq); unsigned int cascade_irq, gic_irq; unsigned long status; @@ -257,9 +257,9 @@ void __init gic_cascade_irq(unsigned int gic_nr, unsigned int irq) { if (gic_nr >= MAX_GIC_NR) BUG(); - if (irq_set_handler_data(irq, &gic_data[gic_nr]) != 0) + if (set_irq_data(irq, &gic_data[gic_nr]) != 0) BUG(); - irq_set_chained_handler(irq, gic_handle_cascade_irq); + set_irq_chained_handler(irq, gic_handle_cascade_irq); } static void __init gic_dist_init(struct gic_chip_data *gic, @@ -319,8 +319,9 @@ static void __init gic_dist_init(struct gic_chip_data *gic, * Setup the Linux IRQ subsystem. */ for (i = irq_start; i < irq_limit; i++) { - irq_set_chip_and_handler(i, &gic_chip, handle_level_irq); - irq_set_chip_data(i, gic); + set_irq_chip(i, &gic_chip); + set_irq_chip_data(i, gic); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } @@ -381,7 +382,7 @@ void __cpuinit gic_enable_ppi(unsigned int irq) unsigned long flags; local_irq_save(flags); - irq_set_status_flags(irq, IRQ_NOPROBE); + irq_to_desc(irq)->status |= IRQ_NOPROBE; gic_unmask_irq(irq_get_irq_data(irq)); local_irq_restore(flags); } diff --git a/trunk/arch/arm/common/it8152.c b/trunk/arch/arm/common/it8152.c index 7a21927c52e1..fcddd48fe9da 100644 --- a/trunk/arch/arm/common/it8152.c +++ b/trunk/arch/arm/common/it8152.c @@ -88,8 +88,8 @@ void it8152_init_irq(void) __raw_writel((0), IT8152_INTC_LDCNIRR); for (irq = IT8152_IRQ(0); irq <= IT8152_LAST_IRQ; irq++) { - irq_set_chip_and_handler(irq, &it8152_irq_chip, - handle_level_irq); + set_irq_chip(irq, &it8152_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/common/locomo.c b/trunk/arch/arm/common/locomo.c index b55c3625d7ee..a026a6bf4892 100644 --- a/trunk/arch/arm/common/locomo.c +++ b/trunk/arch/arm/common/locomo.c @@ -140,7 +140,7 @@ static struct locomo_dev_info locomo_devices[] = { static void locomo_handler(unsigned int irq, struct irq_desc *desc) { - struct locomo *lchip = irq_get_chip_data(irq); + struct locomo *lchip = get_irq_chip_data(irq); int req, i; /* Acknowledge the parent IRQ */ @@ -197,14 +197,15 @@ static void locomo_setup_irq(struct locomo *lchip) /* * Install handler for IRQ_LOCOMO_HW. */ - irq_set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); - irq_set_chip_data(lchip->irq, lchip); - irq_set_chained_handler(lchip->irq, locomo_handler); + set_irq_type(lchip->irq, IRQ_TYPE_EDGE_FALLING); + set_irq_chip_data(lchip->irq, lchip); + set_irq_chained_handler(lchip->irq, locomo_handler); /* Install handlers for IRQ_LOCOMO_* */ for ( ; irq <= lchip->irq_base + 3; irq++) { - irq_set_chip_and_handler(irq, &locomo_chip, handle_level_irq); - irq_set_chip_data(irq, lchip); + set_irq_chip(irq, &locomo_chip); + set_irq_chip_data(irq, lchip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } @@ -475,8 +476,8 @@ static void __locomo_remove(struct locomo *lchip) device_for_each_child(lchip->dev, NULL, locomo_remove_child); if (lchip->irq != NO_IRQ) { - irq_set_chained_handler(lchip->irq, NULL); - irq_set_handler_data(lchip->irq, NULL); + set_irq_chained_handler(lchip->irq, NULL); + set_irq_data(lchip->irq, NULL); } iounmap(lchip->base); diff --git a/trunk/arch/arm/common/sa1111.c b/trunk/arch/arm/common/sa1111.c index a12b33c0dc42..eb9796b0dab2 100644 --- a/trunk/arch/arm/common/sa1111.c +++ b/trunk/arch/arm/common/sa1111.c @@ -202,7 +202,7 @@ static void sa1111_irq_handler(unsigned int irq, struct irq_desc *desc) { unsigned int stat0, stat1, i; - struct sa1111 *sachip = irq_get_handler_data(irq); + struct sa1111 *sachip = get_irq_data(irq); void __iomem *mapbase = sachip->base + SA1111_INTC; stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0); @@ -472,25 +472,25 @@ static void sa1111_setup_irq(struct sa1111 *sachip) sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1); for (irq = IRQ_GPAIN0; irq <= SSPROR; irq++) { - irq_set_chip_and_handler(irq, &sa1111_low_chip, - handle_edge_irq); - irq_set_chip_data(irq, sachip); + set_irq_chip(irq, &sa1111_low_chip); + set_irq_chip_data(irq, sachip); + set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = AUDXMTDMADONEA; irq <= IRQ_S1_BVD1_STSCHG; irq++) { - irq_set_chip_and_handler(irq, &sa1111_high_chip, - handle_edge_irq); - irq_set_chip_data(irq, sachip); + set_irq_chip(irq, &sa1111_high_chip); + set_irq_chip_data(irq, sachip); + set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* * Register SA1111 interrupt */ - irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); - irq_set_handler_data(sachip->irq, sachip); - irq_set_chained_handler(sachip->irq, sa1111_irq_handler); + set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING); + set_irq_data(sachip->irq, sachip); + set_irq_chained_handler(sachip->irq, sa1111_irq_handler); } /* @@ -815,8 +815,8 @@ static void __sa1111_remove(struct sa1111 *sachip) clk_disable(sachip->clk); if (sachip->irq != NO_IRQ) { - irq_set_chained_handler(sachip->irq, NULL); - irq_set_handler_data(sachip->irq, NULL); + set_irq_chained_handler(sachip->irq, NULL); + set_irq_data(sachip->irq, NULL); release_mem_region(sachip->phys + SA1111_INTC, 512); } diff --git a/trunk/arch/arm/common/vic.c b/trunk/arch/arm/common/vic.c index 113085a77123..ae5fe7292e0d 100644 --- a/trunk/arch/arm/common/vic.c +++ b/trunk/arch/arm/common/vic.c @@ -305,9 +305,9 @@ static void __init vic_set_irq_sources(void __iomem *base, if (vic_sources & (1 << i)) { unsigned int irq = irq_start + i; - irq_set_chip_and_handler(irq, &vic_chip, - handle_level_irq); - irq_set_chip_data(irq, base); + set_irq_chip(irq, &vic_chip); + set_irq_chip_data(irq, base); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/include/asm/hw_irq.h b/trunk/arch/arm/include/asm/hw_irq.h index a71b417b1856..5586b7c8ef6f 100644 --- a/trunk/arch/arm/include/asm/hw_irq.h +++ b/trunk/arch/arm/include/asm/hw_irq.h @@ -10,6 +10,14 @@ static inline void ack_bad_irq(int irq) irq_err_count++; } +/* + * Obsolete inline function for calling irq descriptor handlers. + */ +static inline void desc_handle_irq(unsigned int irq, struct irq_desc *desc) +{ + desc->handle_irq(irq, desc); +} + void set_irq_flags(unsigned int irq, unsigned int flags); #define IRQF_VALID (1 << 0) diff --git a/trunk/arch/arm/include/asm/mach/udc_pxa2xx.h b/trunk/arch/arm/include/asm/mach/udc_pxa2xx.h index ea297ac70bc6..833306ee9e7f 100644 --- a/trunk/arch/arm/include/asm/mach/udc_pxa2xx.h +++ b/trunk/arch/arm/include/asm/mach/udc_pxa2xx.h @@ -20,6 +20,8 @@ struct pxa2xx_udc_mach_info { * VBUS IRQ and omit the methods above. Store the GPIO number * here. Note that sometimes the signals go through inverters... */ + bool gpio_vbus_inverted; + int gpio_vbus; /* high == vbus present */ bool gpio_pullup_inverted; int gpio_pullup; /* high == pullup activated */ }; diff --git a/trunk/arch/arm/kernel/bios32.c b/trunk/arch/arm/kernel/bios32.c index e4ee050aad7d..d86fcd44b220 100644 --- a/trunk/arch/arm/kernel/bios32.c +++ b/trunk/arch/arm/kernel/bios32.c @@ -158,6 +158,31 @@ static void __devinit pci_fixup_dec21285(struct pci_dev *dev) } DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, pci_fixup_dec21285); +/* + * Same as above. The PrPMC800 carrier board for the PrPMC1100 + * card maps the host-bridge @ 00:01:00 for some reason and it + * ends up getting scanned. Note that we only want to do this + * fixup when we find the IXP4xx on a PrPMC system, which is why + * we check the machine type. We could be running on a board + * with an IXP4xx target device and we don't want to kill the + * resources in that case. + */ +static void __devinit pci_fixup_prpmc1100(struct pci_dev *dev) +{ + int i; + + if (machine_is_prpmc1100()) { + dev->class &= 0xff; + dev->class |= PCI_CLASS_BRIDGE_HOST << 8; + for (i = 0; i < PCI_NUM_RESOURCES; i++) { + dev->resource[i].start = 0; + dev->resource[i].end = 0; + dev->resource[i].flags = 0; + } + } +} +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IXP4XX, pci_fixup_prpmc1100); + /* * PCI IDE controllers use non-standard I/O port decoding, respect it. */ diff --git a/trunk/arch/arm/kernel/debug.S b/trunk/arch/arm/kernel/debug.S index bcd66e00bdbe..d2d983be096d 100644 --- a/trunk/arch/arm/kernel/debug.S +++ b/trunk/arch/arm/kernel/debug.S @@ -25,7 +25,7 @@ .macro addruart, rp, rv .endm -#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) || defined(CONFIG_CPU_V7) +#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_V6K) .macro senduart, rd, rx mcr p14, 0, \rd, c0, c5, 0 @@ -49,6 +49,23 @@ 1002: .endm +#elif defined(CONFIG_CPU_V7) + + .macro senduart, rd, rx + mcr p14, 0, \rd, c0, c5, 0 + .endm + + .macro busyuart, rd, rx +busy: mrc p14, 0, pc, c0, c1, 0 + bcs busy + .endm + + .macro waituart, rd, rx +wait: mrc p14, 0, pc, c0, c1, 0 + bcs wait + + .endm + #elif defined(CONFIG_CPU_XSCALE) .macro senduart, rd, rx diff --git a/trunk/arch/arm/kernel/ecard.c b/trunk/arch/arm/kernel/ecard.c index d16500110ee9..2ad62df37730 100644 --- a/trunk/arch/arm/kernel/ecard.c +++ b/trunk/arch/arm/kernel/ecard.c @@ -1043,8 +1043,8 @@ ecard_probe(int slot, card_type_t type) */ if (slot < 8) { ec->irq = 32 + slot; - irq_set_chip_and_handler(ec->irq, &ecard_chip, - handle_level_irq); + set_irq_chip(ec->irq, &ecard_chip); + set_irq_handler(ec->irq, handle_level_irq); set_irq_flags(ec->irq, IRQF_VALID); } @@ -1103,7 +1103,7 @@ static int __init ecard_init(void) irqhw = ecard_probeirqhw(); - irq_set_chained_handler(IRQ_EXPANSIONCARD, + set_irq_chained_handler(IRQ_EXPANSIONCARD, irqhw ? ecard_irqexp_handler : ecard_irq_handler); ecard_proc_init(); diff --git a/trunk/arch/arm/kernel/etm.c b/trunk/arch/arm/kernel/etm.c index 1bec8b5f22f0..052b509e2d5f 100644 --- a/trunk/arch/arm/kernel/etm.c +++ b/trunk/arch/arm/kernel/etm.c @@ -338,7 +338,7 @@ static struct miscdevice etb_miscdev = { .fops = &etb_fops, }; -static int __devinit etb_probe(struct amba_device *dev, const struct amba_id *id) +static int __init etb_probe(struct amba_device *dev, const struct amba_id *id) { struct tracectx *t = &tracer; int ret = 0; @@ -530,7 +530,7 @@ static ssize_t trace_mode_store(struct kobject *kobj, static struct kobj_attribute trace_mode_attr = __ATTR(trace_mode, 0644, trace_mode_show, trace_mode_store); -static int __devinit etm_probe(struct amba_device *dev, const struct amba_id *id) +static int __init etm_probe(struct amba_device *dev, const struct amba_id *id) { struct tracectx *t = &tracer; int ret = 0; diff --git a/trunk/arch/arm/kernel/irq.c b/trunk/arch/arm/kernel/irq.c index 83bbad03fcc6..3535d3793e65 100644 --- a/trunk/arch/arm/kernel/irq.c +++ b/trunk/arch/arm/kernel/irq.c @@ -51,18 +51,63 @@ unsigned long irq_err_count; -int arch_show_interrupts(struct seq_file *p, int prec) +int show_interrupts(struct seq_file *p, void *v) { + int i = *(loff_t *) v, cpu; + struct irq_desc *desc; + struct irqaction * action; + unsigned long flags; + int prec, n; + + for (prec = 3, n = 1000; prec < 10 && n <= nr_irqs; prec++) + n *= 10; + +#ifdef CONFIG_SMP + if (prec < 4) + prec = 4; +#endif + + if (i == 0) { + char cpuname[12]; + + seq_printf(p, "%*s ", prec, ""); + for_each_present_cpu(cpu) { + sprintf(cpuname, "CPU%d", cpu); + seq_printf(p, " %10s", cpuname); + } + seq_putc(p, '\n'); + } + + if (i < nr_irqs) { + desc = irq_to_desc(i); + raw_spin_lock_irqsave(&desc->lock, flags); + action = desc->action; + if (!action) + goto unlock; + + seq_printf(p, "%*d: ", prec, i); + for_each_present_cpu(cpu) + seq_printf(p, "%10u ", kstat_irqs_cpu(i, cpu)); + seq_printf(p, " %10s", desc->irq_data.chip->name ? : "-"); + seq_printf(p, " %s", action->name); + for (action = action->next; action; action = action->next) + seq_printf(p, ", %s", action->name); + + seq_putc(p, '\n'); +unlock: + raw_spin_unlock_irqrestore(&desc->lock, flags); + } else if (i == nr_irqs) { #ifdef CONFIG_FIQ - show_fiq_list(p, prec); + show_fiq_list(p, prec); #endif #ifdef CONFIG_SMP - show_ipi_list(p, prec); + show_ipi_list(p, prec); #endif #ifdef CONFIG_LOCAL_TIMERS - show_local_irqs(p, prec); + show_local_irqs(p, prec); #endif - seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); + seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); + } return 0; } @@ -99,21 +144,24 @@ asm_do_IRQ(unsigned int irq, struct pt_regs *regs) void set_irq_flags(unsigned int irq, unsigned int iflags) { - unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; + struct irq_desc *desc; + unsigned long flags; if (irq >= nr_irqs) { printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); return; } + desc = irq_to_desc(irq); + raw_spin_lock_irqsave(&desc->lock, flags); + desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; if (iflags & IRQF_VALID) - clr |= IRQ_NOREQUEST; + desc->status &= ~IRQ_NOREQUEST; if (iflags & IRQF_PROBE) - clr |= IRQ_NOPROBE; + desc->status &= ~IRQ_NOPROBE; if (!(iflags & IRQF_NOAUTOEN)) - clr |= IRQ_NOAUTOEN; - /* Order is clear bits in "clr" then set bits in "set" */ - irq_modify_status(irq, clr, set & ~clr); + desc->status &= ~IRQ_NOAUTOEN; + raw_spin_unlock_irqrestore(&desc->lock, flags); } void __init init_IRQ(void) diff --git a/trunk/arch/arm/kernel/kprobes-decode.c b/trunk/arch/arm/kernel/kprobes-decode.c index 23891317dc4b..8f6ed43861f1 100644 --- a/trunk/arch/arm/kernel/kprobes-decode.c +++ b/trunk/arch/arm/kernel/kprobes-decode.c @@ -594,8 +594,7 @@ static void __kprobes emulate_ldr(struct kprobe *p, struct pt_regs *regs) long cpsr = regs->ARM_cpsr; fnr.dr = insnslot_llret_3arg_rflags(rnv, 0, rmv, cpsr, i_fn); - if (rn != 15) - regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */ + regs->uregs[rn] = fnr.r0; /* Save Rn in case of writeback. */ rdv = fnr.r1; if (rd == 15) { @@ -623,11 +622,10 @@ static void __kprobes emulate_str(struct kprobe *p, struct pt_regs *regs) long rdv = (rd == 15) ? iaddr + str_pc_offset : regs->uregs[rd]; long rnv = (rn == 15) ? iaddr + 8 : regs->uregs[rn]; long rmv = regs->uregs[rm]; /* rm/rmv may be invalid, don't care. */ - long rnv_wb; - rnv_wb = insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn); - if (rn != 15) - regs->uregs[rn] = rnv_wb; /* Save Rn in case of writeback. */ + /* Save Rn in case of writeback. */ + regs->uregs[rn] = + insnslot_3arg_rflags(rnv, rdv, rmv, regs->ARM_cpsr, i_fn); } static void __kprobes emulate_mrrc(struct kprobe *p, struct pt_regs *regs) diff --git a/trunk/arch/arm/kernel/perf_event.c b/trunk/arch/arm/kernel/perf_event.c index 69cfee0fe00f..22e194eb8536 100644 --- a/trunk/arch/arm/kernel/perf_event.c +++ b/trunk/arch/arm/kernel/perf_event.c @@ -79,7 +79,6 @@ struct arm_pmu { void (*write_counter)(int idx, u32 val); void (*start)(void); void (*stop)(void); - void (*reset)(void *); const unsigned (*cache_map)[PERF_COUNT_HW_CACHE_MAX] [PERF_COUNT_HW_CACHE_OP_MAX] [PERF_COUNT_HW_CACHE_RESULT_MAX]; @@ -205,9 +204,11 @@ armpmu_event_set_period(struct perf_event *event, static u64 armpmu_event_update(struct perf_event *event, struct hw_perf_event *hwc, - int idx, int overflow) + int idx) { - u64 delta, prev_raw_count, new_raw_count; + int shift = 64 - 32; + s64 prev_raw_count, new_raw_count; + u64 delta; again: prev_raw_count = local64_read(&hwc->prev_count); @@ -217,13 +218,8 @@ armpmu_event_update(struct perf_event *event, new_raw_count) != prev_raw_count) goto again; - new_raw_count &= armpmu->max_period; - prev_raw_count &= armpmu->max_period; - - if (overflow) - delta = armpmu->max_period - prev_raw_count + new_raw_count; - else - delta = new_raw_count - prev_raw_count; + delta = (new_raw_count << shift) - (prev_raw_count << shift); + delta >>= shift; local64_add(delta, &event->count); local64_sub(delta, &hwc->period_left); @@ -240,7 +236,7 @@ armpmu_read(struct perf_event *event) if (hwc->idx < 0) return; - armpmu_event_update(event, hwc, hwc->idx, 0); + armpmu_event_update(event, hwc, hwc->idx); } static void @@ -258,7 +254,7 @@ armpmu_stop(struct perf_event *event, int flags) if (!(hwc->state & PERF_HES_STOPPED)) { armpmu->disable(hwc, hwc->idx); barrier(); /* why? */ - armpmu_event_update(event, hwc, hwc->idx, 0); + armpmu_event_update(event, hwc, hwc->idx); hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE; } } @@ -628,19 +624,6 @@ static struct pmu pmu = { #include "perf_event_v6.c" #include "perf_event_v7.c" -/* - * Ensure the PMU has sane values out of reset. - * This requires SMP to be available, so exists as a separate initcall. - */ -static int __init -armpmu_reset(void) -{ - if (armpmu && armpmu->reset) - return on_each_cpu(armpmu->reset, NULL, 1); - return 0; -} -arch_initcall(armpmu_reset); - static int __init init_hw_perf_events(void) { diff --git a/trunk/arch/arm/kernel/perf_event_v6.c b/trunk/arch/arm/kernel/perf_event_v6.c index f1e8dd94afe8..6fc2d228db55 100644 --- a/trunk/arch/arm/kernel/perf_event_v6.c +++ b/trunk/arch/arm/kernel/perf_event_v6.c @@ -474,7 +474,7 @@ armv6pmu_handle_irq(int irq_num, continue; hwc = &event->hw; - armpmu_event_update(event, hwc, idx, 1); + armpmu_event_update(event, hwc, idx); data.period = event->hw.last_period; if (!armpmu_event_set_period(event, hwc, idx)) continue; diff --git a/trunk/arch/arm/kernel/perf_event_v7.c b/trunk/arch/arm/kernel/perf_event_v7.c index 4960686afb58..2e1402556fa0 100644 --- a/trunk/arch/arm/kernel/perf_event_v7.c +++ b/trunk/arch/arm/kernel/perf_event_v7.c @@ -466,7 +466,6 @@ static inline unsigned long armv7_pmnc_read(void) static inline void armv7_pmnc_write(unsigned long val) { val &= ARMV7_PMNC_MASK; - isb(); asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r"(val)); } @@ -503,7 +502,6 @@ static inline int armv7_pmnc_select_counter(unsigned int idx) val = (idx - ARMV7_EVENT_CNT_TO_CNTx) & ARMV7_SELECT_MASK; asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val)); - isb(); return idx; } @@ -782,7 +780,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev) continue; hwc = &event->hw; - armpmu_event_update(event, hwc, idx, 1); + armpmu_event_update(event, hwc, idx); data.period = event->hw.last_period; if (!armpmu_event_set_period(event, hwc, idx)) continue; @@ -849,18 +847,6 @@ static int armv7pmu_get_event_idx(struct cpu_hw_events *cpuc, } } -static void armv7pmu_reset(void *info) -{ - u32 idx, nb_cnt = armpmu->num_events; - - /* The counter and interrupt enable registers are unknown at reset. */ - for (idx = 1; idx < nb_cnt; ++idx) - armv7pmu_disable_event(NULL, idx); - - /* Initialize & Reset PMNC: C and P bits */ - armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C); -} - static struct arm_pmu armv7pmu = { .handle_irq = armv7pmu_handle_irq, .enable = armv7pmu_enable_event, @@ -870,15 +856,17 @@ static struct arm_pmu armv7pmu = { .get_event_idx = armv7pmu_get_event_idx, .start = armv7pmu_start, .stop = armv7pmu_stop, - .reset = armv7pmu_reset, .raw_event_mask = 0xFF, .max_period = (1LLU << 32) - 1, }; -static u32 __init armv7_read_num_pmnc_events(void) +static u32 __init armv7_reset_read_pmnc(void) { u32 nb_cnt; + /* Initialize & Reset PMNC: C and P bits */ + armv7_pmnc_write(ARMV7_PMNC_P | ARMV7_PMNC_C); + /* Read the nb of CNTx counters supported from PMNC */ nb_cnt = (armv7_pmnc_read() >> ARMV7_PMNC_N_SHIFT) & ARMV7_PMNC_N_MASK; @@ -892,7 +880,7 @@ static const struct arm_pmu *__init armv7_a8_pmu_init(void) armv7pmu.name = "ARMv7 Cortex-A8"; armv7pmu.cache_map = &armv7_a8_perf_cache_map; armv7pmu.event_map = &armv7_a8_perf_map; - armv7pmu.num_events = armv7_read_num_pmnc_events(); + armv7pmu.num_events = armv7_reset_read_pmnc(); return &armv7pmu; } @@ -902,7 +890,7 @@ static const struct arm_pmu *__init armv7_a9_pmu_init(void) armv7pmu.name = "ARMv7 Cortex-A9"; armv7pmu.cache_map = &armv7_a9_perf_cache_map; armv7pmu.event_map = &armv7_a9_perf_map; - armv7pmu.num_events = armv7_read_num_pmnc_events(); + armv7pmu.num_events = armv7_reset_read_pmnc(); return &armv7pmu; } #else diff --git a/trunk/arch/arm/kernel/perf_event_xscale.c b/trunk/arch/arm/kernel/perf_event_xscale.c index 39affbe4fdb2..28cd3b025bc3 100644 --- a/trunk/arch/arm/kernel/perf_event_xscale.c +++ b/trunk/arch/arm/kernel/perf_event_xscale.c @@ -246,7 +246,7 @@ xscale1pmu_handle_irq(int irq_num, void *dev) continue; hwc = &event->hw; - armpmu_event_update(event, hwc, idx, 1); + armpmu_event_update(event, hwc, idx); data.period = event->hw.last_period; if (!armpmu_event_set_period(event, hwc, idx)) continue; @@ -578,7 +578,7 @@ xscale2pmu_handle_irq(int irq_num, void *dev) continue; hwc = &event->hw; - armpmu_event_update(event, hwc, idx, 1); + armpmu_event_update(event, hwc, idx); data.period = event->hw.last_period; if (!armpmu_event_set_period(event, hwc, idx)) continue; diff --git a/trunk/arch/arm/kernel/sleep.S b/trunk/arch/arm/kernel/sleep.S index 6398ead9d1c0..bfad698a02e7 100644 --- a/trunk/arch/arm/kernel/sleep.S +++ b/trunk/arch/arm/kernel/sleep.S @@ -119,19 +119,11 @@ ENTRY(cpu_resume) #else ldr r0, sleep_save_sp @ stack phys addr #endif - setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off + msr cpsr_c, #PSR_I_BIT | PSR_F_BIT | SVC_MODE @ set SVC, irqs off #ifdef MULTI_CPU - @ load v:p, stack, return fn, resume fn - ARM( ldmia r0!, {r1, sp, lr, pc} ) -THUMB( ldmia r0!, {r1, r2, r3, r4} ) -THUMB( mov sp, r2 ) -THUMB( mov lr, r3 ) -THUMB( bx r4 ) + ldmia r0!, {r1, sp, lr, pc} @ load v:p, stack, return fn, resume fn #else - @ load v:p, stack, return fn - ARM( ldmia r0!, {r1, sp, lr} ) -THUMB( ldmia r0!, {r1, r2, lr} ) -THUMB( mov sp, r2 ) + ldmia r0!, {r1, sp, lr} @ load v:p, stack, return fn b cpu_do_resume #endif ENDPROC(cpu_resume) diff --git a/trunk/arch/arm/mach-at91/at91cap9_devices.c b/trunk/arch/arm/mach-at91/at91cap9_devices.c index 9ffbf3a2dfea..d1f775e86353 100644 --- a/trunk/arch/arm/mach-at91/at91cap9_devices.c +++ b/trunk/arch/arm/mach-at91/at91cap9_devices.c @@ -72,7 +72,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) return; if (cpu_is_at91cap9_revB()) - irq_set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); + set_irq_type(AT91CAP9_ID_UHP, IRQ_TYPE_LEVEL_HIGH); /* Enable VBus control for UHP ports */ for (i = 0; i < data->ports; i++) { @@ -157,7 +157,7 @@ static struct platform_device at91_usba_udc_device = { void __init at91_add_device_usba(struct usba_platform_data *data) { if (cpu_is_at91cap9_revB()) { - irq_set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); + set_irq_type(AT91CAP9_ID_UDPHS, IRQ_TYPE_LEVEL_HIGH); at91_sys_write(AT91_MATRIX_UDPHS, AT91_MATRIX_SELECT_UDPHS | AT91_MATRIX_UDPHS_BYPASS_LOCK); } @@ -861,7 +861,7 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) return; if (cpu_is_at91cap9_revB()) - irq_set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); + set_irq_type(AT91CAP9_ID_LCDC, IRQ_TYPE_LEVEL_HIGH); at91_set_A_periph(AT91_PIN_PC1, 0); /* LCDHSYNC */ at91_set_A_periph(AT91_PIN_PC2, 0); /* LCDDOTCK */ diff --git a/trunk/arch/arm/mach-at91/gpio.c b/trunk/arch/arm/mach-at91/gpio.c index 4615528205c8..af818a21587c 100644 --- a/trunk/arch/arm/mach-at91/gpio.c +++ b/trunk/arch/arm/mach-at91/gpio.c @@ -287,7 +287,7 @@ static int gpio_irq_set_wake(struct irq_data *d, unsigned state) else wakeups[bank] &= ~mask; - irq_set_irq_wake(gpio_chip[bank].bank->id, state); + set_irq_wake(gpio_chip[bank].bank->id, state); return 0; } @@ -375,7 +375,6 @@ static int gpio_irq_type(struct irq_data *d, unsigned type) static struct irq_chip gpio_irqchip = { .name = "GPIO", - .irq_disable = gpio_irq_mask, .irq_mask = gpio_irq_mask, .irq_unmask = gpio_irq_unmask, .irq_set_type = gpio_irq_type, @@ -385,14 +384,16 @@ static struct irq_chip gpio_irqchip = { static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { unsigned pin; - struct irq_data *idata = irq_desc_get_irq_data(desc); - struct irq_chip *chip = irq_data_get_irq_chip(idata); - struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); - void __iomem *pio = at91_gpio->regbase; + struct irq_desc *gpio; + struct at91_gpio_chip *at91_gpio; + void __iomem *pio; u32 isr; + at91_gpio = get_irq_chip_data(irq); + pio = at91_gpio->regbase; + /* temporarily mask (level sensitive) parent IRQ */ - chip->irq_ack(idata); + desc->irq_data.chip->irq_ack(&desc->irq_data); for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need @@ -408,15 +409,27 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) } pin = at91_gpio->chip.base; + gpio = &irq_desc[pin]; while (isr) { - if (isr & 1) - generic_handle_irq(pin); + if (isr & 1) { + if (unlikely(gpio->depth)) { + /* + * The core ARM interrupt handler lazily disables IRQs so + * another IRQ must be generated before it actually gets + * here to be disabled on the GPIO controller. + */ + gpio_irq_mask(irq_get_irq_data(pin)); + } + else + generic_handle_irq(pin); + } pin++; + gpio++; isr >>= 1; } } - chip->irq_unmask(idata); + desc->irq_data.chip->irq_unmask(&desc->irq_data); /* now it may re-trigger */ } @@ -505,14 +518,14 @@ void __init at91_gpio_irq_setup(void) __raw_writel(~0, this->regbase + PIO_IDR); for (i = 0, pin = this->chip.base; i < 32; i++, pin++) { - irq_set_lockdep_class(pin, &gpio_lock_class); + lockdep_set_class(&irq_desc[pin].lock, &gpio_lock_class); /* * Can use the "simple" and not "edge" handler since it's * shorter, and the AIC handles interrupts sanely. */ - irq_set_chip_and_handler(pin, &gpio_irqchip, - handle_simple_irq); + set_irq_chip(pin, &gpio_irqchip); + set_irq_handler(pin, handle_simple_irq); set_irq_flags(pin, IRQF_VALID); } @@ -523,8 +536,8 @@ void __init at91_gpio_irq_setup(void) if (prev && prev->next == this) continue; - irq_set_chip_data(id, this); - irq_set_chained_handler(id, gpio_irq_handler); + set_irq_chip_data(id, this); + set_irq_chained_handler(id, gpio_irq_handler); } pr_info("AT91: %d gpio irqs in %d banks\n", pin - PIN_BASE, gpio_banks); } diff --git a/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h b/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h index be510cfc56be..2d9b0af9c4d5 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h +++ b/trunk/arch/arm/mach-at91/include/mach/at572d940hf.h @@ -89,7 +89,7 @@ /* * System Peripherals (offset from AT91_BASE_SYS) */ -#define AT91_SDRAMC0 (0xffffea00 - AT91_BASE_SYS) +#define AT91_SDRAMC (0xffffea00 - AT91_BASE_SYS) #define AT91_SMC (0xffffec00 - AT91_BASE_SYS) #define AT91_MATRIX (0xffffee00 - AT91_BASE_SYS) #define AT91_AIC (0xfffff000 - AT91_BASE_SYS) diff --git a/trunk/arch/arm/mach-at91/irq.c b/trunk/arch/arm/mach-at91/irq.c index 9665265ec757..b56d6b3a4087 100644 --- a/trunk/arch/arm/mach-at91/irq.c +++ b/trunk/arch/arm/mach-at91/irq.c @@ -143,7 +143,8 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) /* Active Low interrupt, with the specified priority */ at91_sys_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); + set_irq_chip(i, &at91_aic_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); /* Perform 8 End Of Interrupt Command to make sure AIC will not Lock out nIRQ */ diff --git a/trunk/arch/arm/mach-bcmring/irq.c b/trunk/arch/arm/mach-bcmring/irq.c index c48feaf4e8e9..84dcda0d1d9a 100644 --- a/trunk/arch/arm/mach-bcmring/irq.c +++ b/trunk/arch/arm/mach-bcmring/irq.c @@ -93,11 +93,11 @@ static void vic_init(void __iomem *base, struct irq_chip *chip, unsigned int i; for (i = 0; i < 32; i++) { unsigned int irq = irq_start + i; - irq_set_chip(irq, chip); - irq_set_chip_data(irq, base); + set_irq_chip(irq, chip); + set_irq_chip_data(irq, base); if (vic_sources & (1 << i)) { - irq_set_handler(irq, handle_level_irq); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } @@ -119,9 +119,9 @@ void __init bcmring_init_irq(void) /* special cases */ if (INTCHW_INTC1_GPIO0 & IRQ_INTC1_VALID_MASK) { - irq_set_handler(IRQ_GPIO0, handle_simple_irq); + set_irq_handler(IRQ_GPIO0, handle_simple_irq); } if (INTCHW_INTC1_GPIO1 & IRQ_INTC1_VALID_MASK) { - irq_set_handler(IRQ_GPIO1, handle_simple_irq); + set_irq_handler(IRQ_GPIO1, handle_simple_irq); } } diff --git a/trunk/arch/arm/mach-clps711x/irq.c b/trunk/arch/arm/mach-clps711x/irq.c index c2eceee645e3..86da7a1b2bbe 100644 --- a/trunk/arch/arm/mach-clps711x/irq.c +++ b/trunk/arch/arm/mach-clps711x/irq.c @@ -112,13 +112,13 @@ void __init clps711x_init_irq(void) for (i = 0; i < NR_IRQS; i++) { if (INT1_IRQS & (1 << i)) { - irq_set_chip_and_handler(i, &int1_chip, - handle_level_irq); + set_irq_handler(i, handle_level_irq); + set_irq_chip(i, &int1_chip); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } if (INT2_IRQS & (1 << i)) { - irq_set_chip_and_handler(i, &int2_chip, - handle_level_irq); + set_irq_handler(i, handle_level_irq); + set_irq_chip(i, &int2_chip); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/mach-davinci/cp_intc.c b/trunk/arch/arm/mach-davinci/cp_intc.c index f83152d643c5..9abc80a86a22 100644 --- a/trunk/arch/arm/mach-davinci/cp_intc.c +++ b/trunk/arch/arm/mach-davinci/cp_intc.c @@ -167,9 +167,9 @@ void __init cp_intc_init(void) /* Set up genirq dispatching for cp_intc */ for (i = 0; i < num_irq; i++) { - irq_set_chip(i, &cp_intc_irq_chip); + set_irq_chip(i, &cp_intc_irq_chip); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); - irq_set_handler(i, handle_edge_irq); + set_irq_handler(i, handle_edge_irq); } /* Enable global interrupt */ diff --git a/trunk/arch/arm/mach-davinci/gpio.c b/trunk/arch/arm/mach-davinci/gpio.c index a0b838894ac9..20d66e5e4663 100644 --- a/trunk/arch/arm/mach-davinci/gpio.c +++ b/trunk/arch/arm/mach-davinci/gpio.c @@ -62,7 +62,7 @@ static inline struct davinci_gpio_regs __iomem *irq2regs(int irq) { struct davinci_gpio_regs __iomem *g; - g = (__force struct davinci_gpio_regs __iomem *)irq_get_chip_data(irq); + g = (__force struct davinci_gpio_regs __iomem *)get_irq_chip_data(irq); return g; } @@ -208,7 +208,7 @@ pure_initcall(davinci_gpio_setup); static void gpio_irq_disable(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_handler_data(d); + u32 mask = (u32) irq_data_get_irq_data(d); __raw_writel(mask, &g->clr_falling); __raw_writel(mask, &g->clr_rising); @@ -217,8 +217,8 @@ static void gpio_irq_disable(struct irq_data *d) static void gpio_irq_enable(struct irq_data *d) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_handler_data(d); - unsigned status = irqd_get_trigger_type(d); + u32 mask = (u32) irq_data_get_irq_data(d); + unsigned status = irq_desc[d->irq].status; status &= IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING; if (!status) @@ -233,11 +233,21 @@ static void gpio_irq_enable(struct irq_data *d) static int gpio_irq_type(struct irq_data *d, unsigned trigger) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_handler_data(d); + u32 mask = (u32) irq_data_get_irq_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; + irq_desc[d->irq].status &= ~IRQ_TYPE_SENSE_MASK; + irq_desc[d->irq].status |= trigger; + + /* don't enable the IRQ if it's currently disabled */ + if (irq_desc[d->irq].depth == 0) { + __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_FALLING) + ? &g->set_falling : &g->clr_falling); + __raw_writel(mask, (trigger & IRQ_TYPE_EDGE_RISING) + ? &g->set_rising : &g->clr_rising); + } return 0; } @@ -246,7 +256,6 @@ static struct irq_chip gpio_irqchip = { .irq_enable = gpio_irq_enable, .irq_disable = gpio_irq_disable, .irq_set_type = gpio_irq_type, - .flags = IRQCHIP_SET_TYPE_MASKED, }; static void @@ -276,7 +285,7 @@ gpio_irq_handler(unsigned irq, struct irq_desc *desc) status >>= 16; /* now demux them to the right lowlevel handler */ - n = (int)irq_get_handler_data(irq); + n = (int)get_irq_data(irq); while (status) { res = ffs(status); n += res; @@ -314,7 +323,7 @@ static int gpio_to_irq_unbanked(struct gpio_chip *chip, unsigned offset) static int gpio_irq_type_unbanked(struct irq_data *d, unsigned trigger) { struct davinci_gpio_regs __iomem *g = irq2regs(d->irq); - u32 mask = (u32) irq_data_get_irq_handler_data(d); + u32 mask = (u32) irq_data_get_irq_data(d); if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)) return -EINVAL; @@ -386,7 +395,7 @@ static int __init davinci_gpio_irq_setup(void) /* AINTC handles mask/unmask; GPIO handles triggering */ irq = bank_irq; - gpio_irqchip_unbanked = *irq_get_chip(irq); + gpio_irqchip_unbanked = *get_irq_desc_chip(irq_to_desc(irq)); gpio_irqchip_unbanked.name = "GPIO-AINTC"; gpio_irqchip_unbanked.irq_set_type = gpio_irq_type_unbanked; @@ -397,10 +406,10 @@ static int __init davinci_gpio_irq_setup(void) /* set the direct IRQs up to use that irqchip */ for (gpio = 0; gpio < soc_info->gpio_unbanked; gpio++, irq++) { - irq_set_chip(irq, &gpio_irqchip_unbanked); - irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); - irq_set_chip_data(irq, (__force void *)g); - irq_set_status_flags(irq, IRQ_TYPE_EDGE_BOTH); + set_irq_chip(irq, &gpio_irqchip_unbanked); + set_irq_data(irq, (void *) __gpio_mask(gpio)); + set_irq_chip_data(irq, (__force void *) g); + irq_desc[irq].status |= IRQ_TYPE_EDGE_BOTH; } goto done; @@ -421,15 +430,15 @@ static int __init davinci_gpio_irq_setup(void) __raw_writel(~0, &g->clr_rising); /* set up all irqs in this bank */ - irq_set_chained_handler(bank_irq, gpio_irq_handler); - irq_set_chip_data(bank_irq, (__force void *)g); - irq_set_handler_data(bank_irq, (void *)irq); + set_irq_chained_handler(bank_irq, gpio_irq_handler); + set_irq_chip_data(bank_irq, (__force void *) g); + set_irq_data(bank_irq, (void *) irq); for (i = 0; i < 16 && gpio < ngpio; i++, irq++, gpio++) { - irq_set_chip(irq, &gpio_irqchip); - irq_set_chip_data(irq, (__force void *)g); - irq_set_handler_data(irq, (void *)__gpio_mask(gpio)); - irq_set_handler(irq, handle_simple_irq); + set_irq_chip(irq, &gpio_irqchip); + set_irq_chip_data(irq, (__force void *) g); + set_irq_data(irq, (void *) __gpio_mask(gpio)); + set_irq_handler(irq, handle_simple_irq); set_irq_flags(irq, IRQF_VALID); } diff --git a/trunk/arch/arm/mach-davinci/irq.c b/trunk/arch/arm/mach-davinci/irq.c index e6269a6e0014..5e05c9b64e1f 100644 --- a/trunk/arch/arm/mach-davinci/irq.c +++ b/trunk/arch/arm/mach-davinci/irq.c @@ -154,11 +154,11 @@ void __init davinci_irq_init(void) /* set up genirq dispatch for ARM INTC */ for (i = 0; i < davinci_soc_info.intc_irq_num; i++) { - irq_set_chip(i, &davinci_irq_chip_0); + set_irq_chip(i, &davinci_irq_chip_0); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); if (i != IRQ_TINT1_TINT34) - irq_set_handler(i, handle_edge_irq); + set_irq_handler(i, handle_edge_irq); else - irq_set_handler(i, handle_level_irq); + set_irq_handler(i, handle_level_irq); } } diff --git a/trunk/arch/arm/mach-dove/include/mach/dove.h b/trunk/arch/arm/mach-dove/include/mach/dove.h index b20ec9af7882..e5fcdd3f5bf5 100644 --- a/trunk/arch/arm/mach-dove/include/mach/dove.h +++ b/trunk/arch/arm/mach-dove/include/mach/dove.h @@ -136,7 +136,7 @@ #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) #define DOVE_NAND_GPIO_EN (1 << 0) -#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_LO_VIRT_BASE + 0x40) +#define DOVE_MPP_CTRL4_VIRT_BASE (DOVE_GPIO_VIRT_BASE + 0x40) #define DOVE_SPI_GPIO_SEL (1 << 5) #define DOVE_UART1_GPIO_SEL (1 << 4) #define DOVE_AU1_GPIO_SEL (1 << 3) diff --git a/trunk/arch/arm/mach-dove/irq.c b/trunk/arch/arm/mach-dove/irq.c index f07fd16e0c9b..101707fa2e2c 100644 --- a/trunk/arch/arm/mach-dove/irq.c +++ b/trunk/arch/arm/mach-dove/irq.c @@ -86,7 +86,8 @@ static void pmu_irq_handler(unsigned int irq, struct irq_desc *desc) if (!(cause & (1 << irq))) continue; irq = pmu_to_irq(irq); - generic_handle_irq(irq); + desc = irq_desc + irq; + desc_handle_irq(irq, desc); } } @@ -102,14 +103,14 @@ void __init dove_init_irq(void) */ orion_gpio_init(0, 32, DOVE_GPIO_LO_VIRT_BASE, 0, IRQ_DOVE_GPIO_START); - irq_set_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); - irq_set_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); + set_irq_chained_handler(IRQ_DOVE_GPIO_0_7, gpio_irq_handler); + set_irq_chained_handler(IRQ_DOVE_GPIO_8_15, gpio_irq_handler); + set_irq_chained_handler(IRQ_DOVE_GPIO_16_23, gpio_irq_handler); + set_irq_chained_handler(IRQ_DOVE_GPIO_24_31, gpio_irq_handler); orion_gpio_init(32, 32, DOVE_GPIO_HI_VIRT_BASE, 0, IRQ_DOVE_GPIO_START + 32); - irq_set_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); + set_irq_chained_handler(IRQ_DOVE_HIGH_GPIO, gpio_irq_handler); orion_gpio_init(64, 8, DOVE_GPIO2_VIRT_BASE, 0, IRQ_DOVE_GPIO_START + 64); @@ -121,9 +122,10 @@ void __init dove_init_irq(void) writel(0, PMU_INTERRUPT_CAUSE); for (i = IRQ_DOVE_PMU_START; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, &pmu_irq_chip, handle_level_irq); - irq_set_status_flags(i, IRQ_LEVEL); + set_irq_chip(i, &pmu_irq_chip); + set_irq_handler(i, handle_level_irq); + irq_desc[i].status |= IRQ_LEVEL; set_irq_flags(i, IRQF_VALID); } - irq_set_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); + set_irq_chained_handler(IRQ_DOVE_PMU, pmu_irq_handler); } diff --git a/trunk/arch/arm/mach-dove/mpp.c b/trunk/arch/arm/mach-dove/mpp.c index c66c76346904..71db2bdf2f28 100644 --- a/trunk/arch/arm/mach-dove/mpp.c +++ b/trunk/arch/arm/mach-dove/mpp.c @@ -147,6 +147,9 @@ void __init dove_mpp_conf(unsigned int *mpp_list) u32 pmu_sig_ctrl[PMU_SIG_REGS]; int i; + /* Initialize gpiolib. */ + orion_gpio_init(); + for (i = 0; i < MPP_NR_REGS; i++) mpp_ctrl[i] = readl(MPP_CTRL(i)); diff --git a/trunk/arch/arm/mach-ebsa110/core.c b/trunk/arch/arm/mach-ebsa110/core.c index 087bc771ac23..7df083f37fa7 100644 --- a/trunk/arch/arm/mach-ebsa110/core.c +++ b/trunk/arch/arm/mach-ebsa110/core.c @@ -66,8 +66,8 @@ static void __init ebsa110_init_irq(void) local_irq_restore(flags); for (irq = 0; irq < NR_IRQS; irq++) { - irq_set_chip_and_handler(irq, &ebsa110_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ebsa110_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/mach-ep93xx/gpio.c b/trunk/arch/arm/mach-ep93xx/gpio.c index 180b8a9d0d21..34e071d79761 100644 --- a/trunk/arch/arm/mach-ep93xx/gpio.c +++ b/trunk/arch/arm/mach-ep93xx/gpio.c @@ -117,7 +117,7 @@ static void ep93xx_gpio_irq_ack(struct irq_data *d) int port = line >> 3; int port_mask = 1 << (line & 7); - if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) { + if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) { gpio_int_type2[port] ^= port_mask; /* switch edge direction */ ep93xx_gpio_update_int_params(port); } @@ -131,7 +131,7 @@ static void ep93xx_gpio_irq_mask_ack(struct irq_data *d) int port = line >> 3; int port_mask = 1 << (line & 7); - if (irqd_get_trigger_type(d) == IRQ_TYPE_EDGE_BOTH) + if ((irq_desc[d->irq].status & IRQ_TYPE_SENSE_MASK) == IRQ_TYPE_EDGE_BOTH) gpio_int_type2[port] ^= port_mask; /* switch edge direction */ gpio_int_unmasked[port] &= ~port_mask; @@ -165,10 +165,10 @@ static void ep93xx_gpio_irq_unmask(struct irq_data *d) */ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) { + struct irq_desc *desc = irq_desc + d->irq; const int gpio = irq_to_gpio(d->irq); const int port = gpio >> 3; const int port_mask = 1 << (gpio & 7); - irq_flow_handler_t handler; gpio_direction_input(gpio); @@ -176,22 +176,22 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_RISING: gpio_int_type1[port] |= port_mask; gpio_int_type2[port] |= port_mask; - handler = handle_edge_irq; + desc->handle_irq = handle_edge_irq; break; case IRQ_TYPE_EDGE_FALLING: gpio_int_type1[port] |= port_mask; gpio_int_type2[port] &= ~port_mask; - handler = handle_edge_irq; + desc->handle_irq = handle_edge_irq; break; case IRQ_TYPE_LEVEL_HIGH: gpio_int_type1[port] &= ~port_mask; gpio_int_type2[port] |= port_mask; - handler = handle_level_irq; + desc->handle_irq = handle_level_irq; break; case IRQ_TYPE_LEVEL_LOW: gpio_int_type1[port] &= ~port_mask; gpio_int_type2[port] &= ~port_mask; - handler = handle_level_irq; + desc->handle_irq = handle_level_irq; break; case IRQ_TYPE_EDGE_BOTH: gpio_int_type1[port] |= port_mask; @@ -200,17 +200,18 @@ static int ep93xx_gpio_irq_type(struct irq_data *d, unsigned int type) gpio_int_type2[port] &= ~port_mask; /* falling */ else gpio_int_type2[port] |= port_mask; /* rising */ - handler = handle_edge_irq; + desc->handle_irq = handle_edge_irq; break; default: pr_err("failed to set irq type %d for gpio %d\n", type, gpio); return -EINVAL; } - __irq_set_handler_locked(d->irq, handler); - gpio_int_enabled[port] |= port_mask; + desc->status &= ~IRQ_TYPE_SENSE_MASK; + desc->status |= type & IRQ_TYPE_SENSE_MASK; + ep93xx_gpio_update_int_params(port); return 0; @@ -231,29 +232,20 @@ void __init ep93xx_gpio_init_irq(void) for (gpio_irq = gpio_to_irq(0); gpio_irq <= gpio_to_irq(EP93XX_GPIO_LINE_MAX_IRQ); ++gpio_irq) { - irq_set_chip_and_handler(gpio_irq, &ep93xx_gpio_irq_chip, - handle_level_irq); + set_irq_chip(gpio_irq, &ep93xx_gpio_irq_chip); + set_irq_handler(gpio_irq, handle_level_irq); set_irq_flags(gpio_irq, IRQF_VALID); } - irq_set_chained_handler(IRQ_EP93XX_GPIO_AB, - ep93xx_gpio_ab_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO0MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO1MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO2MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO3MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO4MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO5MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO6MUX, - ep93xx_gpio_f_irq_handler); - irq_set_chained_handler(IRQ_EP93XX_GPIO7MUX, - ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO_AB, ep93xx_gpio_ab_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO0MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO1MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO2MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO3MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO4MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO5MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO6MUX, ep93xx_gpio_f_irq_handler); + set_irq_chained_handler(IRQ_EP93XX_GPIO7MUX, ep93xx_gpio_f_irq_handler); } diff --git a/trunk/arch/arm/mach-exynos4/irq-combiner.c b/trunk/arch/arm/mach-exynos4/irq-combiner.c index f488b66d6806..31618d91ce15 100644 --- a/trunk/arch/arm/mach-exynos4/irq-combiner.c +++ b/trunk/arch/arm/mach-exynos4/irq-combiner.c @@ -54,8 +54,8 @@ static void combiner_unmask_irq(struct irq_data *data) static void combiner_handle_cascade_irq(unsigned int irq, struct irq_desc *desc) { - struct combiner_chip_data *chip_data = irq_get_handler_data(irq); - struct irq_chip *chip = irq_get_chip(irq); + struct combiner_chip_data *chip_data = get_irq_data(irq); + struct irq_chip *chip = get_irq_chip(irq); unsigned int cascade_irq, combiner_irq; unsigned long status; @@ -93,9 +93,9 @@ void __init combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq) { if (combiner_nr >= MAX_COMBINER_NR) BUG(); - if (irq_set_handler_data(irq, &combiner_data[combiner_nr]) != 0) + if (set_irq_data(irq, &combiner_data[combiner_nr]) != 0) BUG(); - irq_set_chained_handler(irq, combiner_handle_cascade_irq); + set_irq_chained_handler(irq, combiner_handle_cascade_irq); } void __init combiner_init(unsigned int combiner_nr, void __iomem *base, @@ -119,8 +119,9 @@ void __init combiner_init(unsigned int combiner_nr, void __iomem *base, for (i = irq_start; i < combiner_data[combiner_nr].irq_offset + MAX_IRQ_IN_COMBINER; i++) { - irq_set_chip_and_handler(i, &combiner_chip, handle_level_irq); - irq_set_chip_data(i, &combiner_data[combiner_nr]); + set_irq_chip(i, &combiner_chip); + set_irq_chip_data(i, &combiner_data[combiner_nr]); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/mach-exynos4/irq-eint.c b/trunk/arch/arm/mach-exynos4/irq-eint.c index 9d87d2ac7f68..4f7ad4a796e4 100644 --- a/trunk/arch/arm/mach-exynos4/irq-eint.c +++ b/trunk/arch/arm/mach-exynos4/irq-eint.c @@ -190,8 +190,8 @@ static void exynos4_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) static void exynos4_irq_eint0_15(unsigned int irq, struct irq_desc *desc) { - u32 *irq_data = irq_get_handler_data(irq); - struct irq_chip *chip = irq_get_chip(irq); + u32 *irq_data = get_irq_data(irq); + struct irq_chip *chip = get_irq_chip(irq); chip->irq_mask(&desc->irq_data); @@ -208,19 +208,18 @@ int __init exynos4_init_irq_eint(void) int irq; for (irq = 0 ; irq <= 31 ; irq++) { - irq_set_chip_and_handler(IRQ_EINT(irq), &exynos4_irq_eint, - handle_level_irq); + set_irq_chip(IRQ_EINT(irq), &exynos4_irq_eint); + set_irq_handler(IRQ_EINT(irq), handle_level_irq); set_irq_flags(IRQ_EINT(irq), IRQF_VALID); } - irq_set_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); + set_irq_chained_handler(IRQ_EINT16_31, exynos4_irq_demux_eint16_31); for (irq = 0 ; irq <= 15 ; irq++) { eint0_15_data[irq] = IRQ_EINT(irq); - irq_set_handler_data(exynos4_get_irq_nr(irq), - &eint0_15_data[irq]); - irq_set_chained_handler(exynos4_get_irq_nr(irq), + set_irq_data(exynos4_get_irq_nr(irq), &eint0_15_data[irq]); + set_irq_chained_handler(exynos4_get_irq_nr(irq), exynos4_irq_eint0_15); } diff --git a/trunk/arch/arm/mach-footbridge/common.c b/trunk/arch/arm/mach-footbridge/common.c index 38a44f9b9da2..84c5f258f2d8 100644 --- a/trunk/arch/arm/mach-footbridge/common.c +++ b/trunk/arch/arm/mach-footbridge/common.c @@ -102,7 +102,8 @@ static void __init __fb_init_irq(void) *CSR_FIQ_DISABLE = -1; for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { - irq_set_chip_and_handler(irq, &fb_chip, handle_level_irq); + set_irq_chip(irq, &fb_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/mach-footbridge/dc21285-timer.c b/trunk/arch/arm/mach-footbridge/dc21285-timer.c index 5f1f9867fc70..a921fe92b858 100644 --- a/trunk/arch/arm/mach-footbridge/dc21285-timer.c +++ b/trunk/arch/arm/mach-footbridge/dc21285-timer.c @@ -30,7 +30,7 @@ static int cksrc_dc21285_enable(struct clocksource *cs) return 0; } -static void cksrc_dc21285_disable(struct clocksource *cs) +static int cksrc_dc21285_disable(struct clocksource *cs) { *CSR_TIMER2_CNTL = 0; } diff --git a/trunk/arch/arm/mach-footbridge/isa-irq.c b/trunk/arch/arm/mach-footbridge/isa-irq.c index c3a0abbc9049..de7a5cb5dbe1 100644 --- a/trunk/arch/arm/mach-footbridge/isa-irq.c +++ b/trunk/arch/arm/mach-footbridge/isa-irq.c @@ -151,14 +151,14 @@ void __init isa_init_irq(unsigned int host_irq) if (host_irq != (unsigned int)-1) { for (irq = _ISA_IRQ(0); irq < _ISA_IRQ(8); irq++) { - irq_set_chip_and_handler(irq, &isa_lo_chip, - handle_level_irq); + set_irq_chip(irq, &isa_lo_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } for (irq = _ISA_IRQ(8); irq < _ISA_IRQ(16); irq++) { - irq_set_chip_and_handler(irq, &isa_hi_chip, - handle_level_irq); + set_irq_chip(irq, &isa_hi_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } @@ -166,7 +166,7 @@ void __init isa_init_irq(unsigned int host_irq) request_resource(&ioport_resource, &pic2_resource); setup_irq(IRQ_ISA_CASCADE, &irq_cascade); - irq_set_chained_handler(host_irq, isa_irq_handler); + set_irq_chained_handler(host_irq, isa_irq_handler); /* * On the NetWinder, don't automatically diff --git a/trunk/arch/arm/mach-gemini/gpio.c b/trunk/arch/arm/mach-gemini/gpio.c index fdc7ef1391d3..fa3d333f21e1 100644 --- a/trunk/arch/arm/mach-gemini/gpio.c +++ b/trunk/arch/arm/mach-gemini/gpio.c @@ -127,8 +127,8 @@ static int gpio_set_irq_type(struct irq_data *d, unsigned int type) static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) { - unsigned int port = (unsigned int)irq_desc_get_handler_data(desc); unsigned int gpio_irq_no, irq_stat; + unsigned int port = (unsigned int)get_irq_data(irq); irq_stat = __raw_readl(GPIO_BASE(port) + GPIO_INT_STAT); @@ -138,7 +138,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) if ((irq_stat & 1) == 0) continue; - generic_handle_irq(gpio_irq_no); + BUG_ON(!(irq_desc[gpio_irq_no].handle_irq)); + irq_desc[gpio_irq_no].handle_irq(gpio_irq_no, + &irq_desc[gpio_irq_no]); } } @@ -217,13 +219,13 @@ void __init gemini_gpio_init(void) for (j = GPIO_IRQ_BASE + i * 32; j < GPIO_IRQ_BASE + (i + 1) * 32; j++) { - irq_set_chip_and_handler(j, &gpio_irq_chip, - handle_edge_irq); + set_irq_chip(j, &gpio_irq_chip); + set_irq_handler(j, handle_edge_irq); set_irq_flags(j, IRQF_VALID); } - irq_set_chained_handler(IRQ_GPIO(i), gpio_irq_handler); - irq_set_handler_data(IRQ_GPIO(i), (void *)i); + set_irq_chained_handler(IRQ_GPIO(i), gpio_irq_handler); + set_irq_data(IRQ_GPIO(i), (void *)i); } BUG_ON(gpiochip_add(&gemini_gpio_chip)); diff --git a/trunk/arch/arm/mach-gemini/irq.c b/trunk/arch/arm/mach-gemini/irq.c index 9485a8fdf851..96bc227dd849 100644 --- a/trunk/arch/arm/mach-gemini/irq.c +++ b/trunk/arch/arm/mach-gemini/irq.c @@ -81,13 +81,13 @@ void __init gemini_init_irq(void) request_resource(&iomem_resource, &irq_resource); for (i = 0; i < NR_IRQS; i++) { - irq_set_chip(i, &gemini_irq_chip); + set_irq_chip(i, &gemini_irq_chip); if((i >= IRQ_TIMER1 && i <= IRQ_TIMER3) || (i >= IRQ_SERIRQ0 && i <= IRQ_SERIRQ1)) { - irq_set_handler(i, handle_edge_irq); + set_irq_handler(i, handle_edge_irq); mode |= 1 << i; level |= 1 << i; } else { - irq_set_handler(i, handle_level_irq); + set_irq_handler(i, handle_level_irq); } set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/trunk/arch/arm/mach-h720x/common.c b/trunk/arch/arm/mach-h720x/common.c index 51d4e44ab973..1f28c90932c7 100644 --- a/trunk/arch/arm/mach-h720x/common.c +++ b/trunk/arch/arm/mach-h720x/common.c @@ -199,29 +199,29 @@ void __init h720x_init_irq (void) /* Initialize global IRQ's, fast path */ for (irq = 0; irq < NR_GLBL_IRQS; irq++) { - irq_set_chip_and_handler(irq, &h720x_global_chip, - handle_level_irq); + set_irq_chip(irq, &h720x_global_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } /* Initialize multiplexed IRQ's, slow path */ for (irq = IRQ_CHAINED_GPIOA(0) ; irq <= IRQ_CHAINED_GPIOD(31); irq++) { - irq_set_chip_and_handler(irq, &h720x_gpio_chip, - handle_edge_irq); + set_irq_chip(irq, &h720x_gpio_chip); + set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } - irq_set_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); - irq_set_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); - irq_set_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); - irq_set_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); + set_irq_chained_handler(IRQ_GPIOA, h720x_gpioa_demux_handler); + set_irq_chained_handler(IRQ_GPIOB, h720x_gpiob_demux_handler); + set_irq_chained_handler(IRQ_GPIOC, h720x_gpioc_demux_handler); + set_irq_chained_handler(IRQ_GPIOD, h720x_gpiod_demux_handler); #ifdef CONFIG_CPU_H7202 for (irq = IRQ_CHAINED_GPIOE(0) ; irq <= IRQ_CHAINED_GPIOE(31); irq++) { - irq_set_chip_and_handler(irq, &h720x_gpio_chip, - handle_edge_irq); + set_irq_chip(irq, &h720x_gpio_chip); + set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } - irq_set_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); + set_irq_chained_handler(IRQ_GPIOE, h720x_gpioe_demux_handler); #endif /* Enable multiplexed irq's */ diff --git a/trunk/arch/arm/mach-h720x/cpu-h7202.c b/trunk/arch/arm/mach-h720x/cpu-h7202.c index c37d570b852d..ac3f91442376 100644 --- a/trunk/arch/arm/mach-h720x/cpu-h7202.c +++ b/trunk/arch/arm/mach-h720x/cpu-h7202.c @@ -141,18 +141,13 @@ h7202_timer_interrupt(int irq, void *dev_id) /* * mask multiplexed timer IRQs */ -static void inline __mask_timerx_irq(unsigned int irq) +static void inline mask_timerx_irq(struct irq_data *d) { unsigned int bit; - bit = 2 << ((irq == IRQ_TIMER64B) ? 4 : (irq - IRQ_TIMER1)); + bit = 2 << ((d->irq == IRQ_TIMER64B) ? 4 : (d->irq - IRQ_TIMER1)); CPU_REG (TIMER_VIRT, TIMER_TOPCTRL) &= ~bit; } -static void inline mask_timerx_irq(struct irq_data *d) -{ - __mask_timerx_irq(d->irq); -} - /* * unmask multiplexed timer IRQs */ @@ -201,12 +196,12 @@ void __init h7202_init_irq (void) for (irq = IRQ_TIMER1; irq < IRQ_CHAINED_TIMERX(NR_TIMERX_IRQS); irq++) { - __mask_timerx_irq(irq); - irq_set_chip_and_handler(irq, &h7202_timerx_chip, - handle_edge_irq); + mask_timerx_irq(irq); + set_irq_chip(irq, &h7202_timerx_chip); + set_irq_handler(irq, handle_edge_irq); set_irq_flags(irq, IRQF_VALID ); } - irq_set_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); + set_irq_chained_handler(IRQ_TIMERX, h7202_timerx_demux_handler); h720x_init_irq(); } diff --git a/trunk/arch/arm/mach-imx/Kconfig b/trunk/arch/arm/mach-imx/Kconfig index 56b930a13443..5eec099e0c72 100644 --- a/trunk/arch/arm/mach-imx/Kconfig +++ b/trunk/arch/arm/mach-imx/Kconfig @@ -255,7 +255,6 @@ config MACH_IMX27_VISSTRIM_M10 bool "Vista Silicon i.MX27 Visstrim_m10" select SOC_IMX27 select IMX_HAVE_PLATFORM_IMX_I2C - select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_MXC_MMC select IMX_HAVE_PLATFORM_MXC_EHCI diff --git a/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c b/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c index 6269053505f7..cb705c28de02 100644 --- a/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c +++ b/trunk/arch/arm/mach-imx/eukrea_mbimxsd25-baseboard.c @@ -34,7 +34,6 @@ #include #include #include -#include #include "devices-imx25.h" @@ -243,11 +242,6 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = { .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, }; -static struct esdhc_platform_data sd1_pdata = { - .cd_gpio = GPIO_SD1CD, - .wp_gpio = -EINVAL, -}; - /* * system init for baseboard usage. Will be called by cpuimx25 init. * @@ -281,7 +275,7 @@ void __init eukrea_mbimxsd25_baseboard_init(void) imx25_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); imx25_add_flexcan1(NULL); - imx25_add_sdhci_esdhc_imx(0, &sd1_pdata); + imx25_add_sdhci_esdhc_imx(0, NULL); gpio_request(GPIO_LED1, "LED1"); gpio_direction_output(GPIO_LED1, 1); diff --git a/trunk/arch/arm/mach-iop13xx/irq.c b/trunk/arch/arm/mach-iop13xx/irq.c index bc739701c301..a233470dd10c 100644 --- a/trunk/arch/arm/mach-iop13xx/irq.c +++ b/trunk/arch/arm/mach-iop13xx/irq.c @@ -224,15 +224,15 @@ void __init iop13xx_init_irq(void) for(i = 0; i <= IRQ_IOP13XX_HPI; i++) { if (i < 32) - irq_set_chip(i, &iop13xx_irqchip1); + set_irq_chip(i, &iop13xx_irqchip1); else if (i < 64) - irq_set_chip(i, &iop13xx_irqchip2); + set_irq_chip(i, &iop13xx_irqchip2); else if (i < 96) - irq_set_chip(i, &iop13xx_irqchip3); + set_irq_chip(i, &iop13xx_irqchip3); else - irq_set_chip(i, &iop13xx_irqchip4); + set_irq_chip(i, &iop13xx_irqchip4); - irq_set_handler(i, handle_level_irq); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } diff --git a/trunk/arch/arm/mach-iop13xx/msi.c b/trunk/arch/arm/mach-iop13xx/msi.c index 560d5b2dec22..c9c02e3698bc 100644 --- a/trunk/arch/arm/mach-iop13xx/msi.c +++ b/trunk/arch/arm/mach-iop13xx/msi.c @@ -118,7 +118,7 @@ static void iop13xx_msi_handler(unsigned int irq, struct irq_desc *desc) void __init iop13xx_msi_init(void) { - irq_set_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler); + set_irq_chained_handler(IRQ_IOP13XX_INBD_MSI, iop13xx_msi_handler); } /* @@ -178,7 +178,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) if (irq < 0) return irq; - irq_set_msi_desc(irq, desc); + set_irq_msi(irq, desc); msg.address_hi = 0x0; msg.address_lo = IOP13XX_MU_MIMR_PCI; @@ -187,7 +187,7 @@ int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc) msg.data = (id << IOP13XX_MU_MIMR_CORE_SELECT) | (irq & 0x7f); write_msi_msg(irq, &msg); - irq_set_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); + set_irq_chip_and_handler(irq, &iop13xx_msi_chip, handle_simple_irq); return 0; } diff --git a/trunk/arch/arm/mach-iop32x/irq.c b/trunk/arch/arm/mach-iop32x/irq.c index d7ee2789d890..d3426a120599 100644 --- a/trunk/arch/arm/mach-iop32x/irq.c +++ b/trunk/arch/arm/mach-iop32x/irq.c @@ -68,7 +68,8 @@ void __init iop32x_init_irq(void) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, &ext_chip, handle_level_irq); + set_irq_chip(i, &ext_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/mach-iop33x/irq.c b/trunk/arch/arm/mach-iop33x/irq.c index f7f5d3e451c7..0ff2f74363a5 100644 --- a/trunk/arch/arm/mach-iop33x/irq.c +++ b/trunk/arch/arm/mach-iop33x/irq.c @@ -110,9 +110,8 @@ void __init iop33x_init_irq(void) *IOP3XX_PCIIRSR = 0x0f; for (i = 0; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, - (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2, - handle_level_irq); + set_irq_chip(i, (i < 32) ? &iop33x_irqchip1 : &iop33x_irqchip2); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } } diff --git a/trunk/arch/arm/mach-ixp2000/core.c b/trunk/arch/arm/mach-ixp2000/core.c index 4068166c8993..5fc4e064b650 100644 --- a/trunk/arch/arm/mach-ixp2000/core.c +++ b/trunk/arch/arm/mach-ixp2000/core.c @@ -476,8 +476,8 @@ void __init ixp2000_init_irq(void) */ for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { - irq_set_chip_and_handler(irq, &ixp2000_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixp2000_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else set_irq_flags(irq, 0); } @@ -485,21 +485,21 @@ void __init ixp2000_init_irq(void) for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & IXP2000_VALID_ERR_IRQ_MASK) { - irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixp2000_err_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else set_irq_flags(irq, 0); } - irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); + set_irq_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { - irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixp2000_GPIO_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); + set_irq_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); /* * Enable PCI irqs. The actual PCI[AB] decoding is done in @@ -508,8 +508,8 @@ void __init ixp2000_init_irq(void) */ ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI)); for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) { - irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixp2000_pci_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c index 235638f800e5..7d90d3f13ee8 100644 --- a/trunk/arch/arm/mach-ixp2000/ixdp2x00.c +++ b/trunk/arch/arm/mach-ixp2000/ixdp2x00.c @@ -158,13 +158,13 @@ void __init ixdp2x00_init_irq(volatile unsigned long *stat_reg, volatile unsigne *board_irq_mask = 0xffffffff; for(irq = IXP2000_BOARD_IRQ(0); irq < IXP2000_BOARD_IRQ(board_irq_count); irq++) { - irq_set_chip_and_handler(irq, &ixdp2x00_cpld_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixdp2x00_cpld_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } /* Hook into PCI interrupt */ - irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); + set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x00_irq_handler); } /************************************************************************* diff --git a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c index 84835b209557..34b1b2af37c8 100644 --- a/trunk/arch/arm/mach-ixp2000/ixdp2x01.c +++ b/trunk/arch/arm/mach-ixp2000/ixdp2x01.c @@ -115,8 +115,8 @@ void __init ixdp2x01_init_irq(void) for (irq = NR_IXP2000_IRQS; irq < NR_IXDP2X01_IRQS; irq++) { if (irq & valid_irq_mask) { - irq_set_chip_and_handler(irq, &ixdp2x01_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixdp2x01_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } else { set_irq_flags(irq, 0); @@ -124,7 +124,7 @@ void __init ixdp2x01_init_irq(void) } /* Hook into PCI interrupts */ - irq_set_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); + set_irq_chained_handler(IRQ_IXP2000_PCIB, ixdp2x01_irq_handler); } diff --git a/trunk/arch/arm/mach-ixp23xx/core.c b/trunk/arch/arm/mach-ixp23xx/core.c index a1bee33d183e..9c8a33903216 100644 --- a/trunk/arch/arm/mach-ixp23xx/core.c +++ b/trunk/arch/arm/mach-ixp23xx/core.c @@ -289,12 +289,12 @@ static void ixp23xx_config_irq(unsigned int irq, enum ixp23xx_irq_type type) { switch (type) { case IXP23XX_IRQ_LEVEL: - irq_set_chip_and_handler(irq, &ixp23xx_irq_level_chip, - handle_level_irq); + set_irq_chip(irq, &ixp23xx_irq_level_chip); + set_irq_handler(irq, handle_level_irq); break; case IXP23XX_IRQ_EDGE: - irq_set_chip_and_handler(irq, &ixp23xx_irq_edge_chip, - handle_edge_irq); + set_irq_chip(irq, &ixp23xx_irq_edge_chip); + set_irq_handler(irq, handle_edge_irq); break; } set_irq_flags(irq, IRQF_VALID); @@ -324,12 +324,12 @@ void __init ixp23xx_init_irq(void) } for (irq = IRQ_IXP23XX_INTA; irq <= IRQ_IXP23XX_INTB; irq++) { - irq_set_chip_and_handler(irq, &ixp23xx_pci_irq_chip, - handle_level_irq); + set_irq_chip(irq, &ixp23xx_pci_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - irq_set_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler); + set_irq_chained_handler(IRQ_IXP23XX_PCI_INT_RPH, pci_handler); } diff --git a/trunk/arch/arm/mach-ixp23xx/ixdp2351.c b/trunk/arch/arm/mach-ixp23xx/ixdp2351.c index 8dcba17c81e7..181116aa6591 100644 --- a/trunk/arch/arm/mach-ixp23xx/ixdp2351.c +++ b/trunk/arch/arm/mach-ixp23xx/ixdp2351.c @@ -136,8 +136,8 @@ void __init ixdp2351_init_irq(void) irq++) { if (IXDP2351_INTA_IRQ_MASK(irq) & IXDP2351_INTA_IRQ_VALID) { set_irq_flags(irq, IRQF_VALID); - irq_set_chip_and_handler(irq, &ixdp2351_inta_chip, - handle_level_irq); + set_irq_handler(irq, handle_level_irq); + set_irq_chip(irq, &ixdp2351_inta_chip); } } @@ -147,13 +147,13 @@ void __init ixdp2351_init_irq(void) irq++) { if (IXDP2351_INTB_IRQ_MASK(irq) & IXDP2351_INTB_IRQ_VALID) { set_irq_flags(irq, IRQF_VALID); - irq_set_chip_and_handler(irq, &ixdp2351_intb_chip, - handle_level_irq); + set_irq_handler(irq, handle_level_irq); + set_irq_chip(irq, &ixdp2351_intb_chip); } } - irq_set_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); - irq_set_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); + set_irq_chained_handler(IRQ_IXP23XX_INTA, ixdp2351_inta_handler); + set_irq_chained_handler(IRQ_IXP23XX_INTB, ixdp2351_intb_handler); } /* diff --git a/trunk/arch/arm/mach-ixp23xx/roadrunner.c b/trunk/arch/arm/mach-ixp23xx/roadrunner.c index 8fe0c6273262..76c61ba73218 100644 --- a/trunk/arch/arm/mach-ixp23xx/roadrunner.c +++ b/trunk/arch/arm/mach-ixp23xx/roadrunner.c @@ -110,8 +110,8 @@ static int __init roadrunner_map_irq(struct pci_dev *dev, u8 idsel, u8 pin) static void __init roadrunner_pci_preinit(void) { - irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_ROADRUNNER_PCI_INTC, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_ROADRUNNER_PCI_INTD, IRQ_TYPE_LEVEL_LOW); ixp23xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/avila-pci.c b/trunk/arch/arm/mach-ixp4xx/avila-pci.c index 162043ff29ff..845e1b500548 100644 --- a/trunk/arch/arm/mach-ixp4xx/avila-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/avila-pci.c @@ -39,10 +39,10 @@ void __init avila_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/common.c b/trunk/arch/arm/mach-ixp4xx/common.c index ed19bc314318..9fd894271d5d 100644 --- a/trunk/arch/arm/mach-ixp4xx/common.c +++ b/trunk/arch/arm/mach-ixp4xx/common.c @@ -252,8 +252,8 @@ void __init ixp4xx_init_irq(void) /* Default to all level triggered */ for(i = 0; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, &ixp4xx_irq_chip, - handle_level_irq); + set_irq_chip(i, &ixp4xx_irq_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-ixp4xx/coyote-pci.c b/trunk/arch/arm/mach-ixp4xx/coyote-pci.c index 37fda7d6e83d..b978ea8bd6f0 100644 --- a/trunk/arch/arm/mach-ixp4xx/coyote-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/coyote-pci.c @@ -32,8 +32,8 @@ void __init coyote_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/dsmg600-pci.c b/trunk/arch/arm/mach-ixp4xx/dsmg600-pci.c index c7612010b3fc..fa70fed462ba 100644 --- a/trunk/arch/arm/mach-ixp4xx/dsmg600-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/dsmg600-pci.c @@ -35,12 +35,12 @@ void __init dsmg600_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTF), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/fsg-pci.c b/trunk/arch/arm/mach-ixp4xx/fsg-pci.c index 44ccde9d4879..5a810c930624 100644 --- a/trunk/arch/arm/mach-ixp4xx/fsg-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/fsg-pci.c @@ -32,9 +32,9 @@ void __init fsg_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/gateway7001-pci.c b/trunk/arch/arm/mach-ixp4xx/gateway7001-pci.c index fc1124168874..7e93a0975c4d 100644 --- a/trunk/arch/arm/mach-ixp4xx/gateway7001-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/gateway7001-pci.c @@ -29,8 +29,8 @@ void __init gateway7001_pci_preinit(void) { - irq_set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_IXP4XX_GPIO10, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_IXP4XX_GPIO11, IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/goramo_mlr.c b/trunk/arch/arm/mach-ixp4xx/goramo_mlr.c index 3e8c0e33b59c..d0e4861ac03d 100644 --- a/trunk/arch/arm/mach-ixp4xx/goramo_mlr.c +++ b/trunk/arch/arm/mach-ixp4xx/goramo_mlr.c @@ -420,8 +420,8 @@ static void __init gmlr_init(void) gpio_line_config(GPIO_HSS1_RTS_N, IXP4XX_GPIO_OUT); gpio_line_config(GPIO_HSS0_DCD_N, IXP4XX_GPIO_IN); gpio_line_config(GPIO_HSS1_DCD_N, IXP4XX_GPIO_IN); - irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); - irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); + set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS0_DCD_N), IRQ_TYPE_EDGE_BOTH); + set_irq_type(IXP4XX_GPIO_IRQ(GPIO_HSS1_DCD_N), IRQ_TYPE_EDGE_BOTH); set_control(CONTROL_HSS0_DTR_N, 1); set_control(CONTROL_HSS1_DTR_N, 1); @@ -441,10 +441,10 @@ static void __init gmlr_init(void) #ifdef CONFIG_PCI static void __init gmlr_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_ETHB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_NEC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(GPIO_IRQ_MPCI), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/gtwx5715-pci.c b/trunk/arch/arm/mach-ixp4xx/gtwx5715-pci.c index 38cc0725dbd8..25d2c333c204 100644 --- a/trunk/arch/arm/mach-ixp4xx/gtwx5715-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/gtwx5715-pci.c @@ -43,8 +43,8 @@ */ void __init gtwx5715_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/ixdp425-pci.c b/trunk/arch/arm/mach-ixp4xx/ixdp425-pci.c index 58f400417eaf..1ba165a6edac 100644 --- a/trunk/arch/arm/mach-ixp4xx/ixdp425-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/ixdp425-pci.c @@ -36,10 +36,10 @@ void __init ixdp425_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/ixdpg425-pci.c b/trunk/arch/arm/mach-ixp4xx/ixdpg425-pci.c index e64f6d041488..4ed7ac614920 100644 --- a/trunk/arch/arm/mach-ixp4xx/ixdpg425-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/ixdpg425-pci.c @@ -25,8 +25,8 @@ void __init ixdpg425_pci_preinit(void) { - irq_set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_IXP4XX_GPIO6, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_IXP4XX_GPIO7, IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/nas100d-pci.c b/trunk/arch/arm/mach-ixp4xx/nas100d-pci.c index 428d1202b799..d0cea34cf61e 100644 --- a/trunk/arch/arm/mach-ixp4xx/nas100d-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/nas100d-pci.c @@ -33,11 +33,11 @@ void __init nas100d_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTD), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTE), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/nslu2-pci.c b/trunk/arch/arm/mach-ixp4xx/nslu2-pci.c index 2e85f76b950d..1eb5a90470bc 100644 --- a/trunk/arch/arm/mach-ixp4xx/nslu2-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/nslu2-pci.c @@ -32,9 +32,9 @@ void __init nslu2_pci_preinit(void) { - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTC), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/vulcan-pci.c b/trunk/arch/arm/mach-ixp4xx/vulcan-pci.c index 03bdec5140a7..f3111c6840ef 100644 --- a/trunk/arch/arm/mach-ixp4xx/vulcan-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/vulcan-pci.c @@ -38,8 +38,8 @@ void __init vulcan_pci_preinit(void) pr_info("Vulcan PCI: limiting CardBus memory size to %dMB\n", (int)(pci_cardbus_mem_size >> 20)); #endif - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTA), IRQ_TYPE_LEVEL_LOW); + set_irq_type(IXP4XX_GPIO_IRQ(INTB), IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-ixp4xx/wg302v2-pci.c b/trunk/arch/arm/mach-ixp4xx/wg302v2-pci.c index 17f3cf59a31b..9b59ed03b151 100644 --- a/trunk/arch/arm/mach-ixp4xx/wg302v2-pci.c +++ b/trunk/arch/arm/mach-ixp4xx/wg302v2-pci.c @@ -29,8 +29,8 @@ void __init wg302v2_pci_preinit(void) { - irq_set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); - irq_set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_IXP4XX_GPIO8, IRQ_TYPE_LEVEL_LOW); + set_irq_type(IRQ_IXP4XX_GPIO9, IRQ_TYPE_LEVEL_LOW); ixp4xx_pci_preinit(); } diff --git a/trunk/arch/arm/mach-kirkwood/irq.c b/trunk/arch/arm/mach-kirkwood/irq.c index 05d193a25b25..cbdb5863d13b 100644 --- a/trunk/arch/arm/mach-kirkwood/irq.c +++ b/trunk/arch/arm/mach-kirkwood/irq.c @@ -35,15 +35,14 @@ void __init kirkwood_init_irq(void) */ orion_gpio_init(0, 32, GPIO_LOW_VIRT_BASE, 0, IRQ_KIRKWOOD_GPIO_START); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_0_7, gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_8_15, gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_16_23, gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_LOW_24_31, gpio_irq_handler); orion_gpio_init(32, 18, GPIO_HIGH_VIRT_BASE, 0, IRQ_KIRKWOOD_GPIO_START + 32); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, - gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_0_7, gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_8_15, gpio_irq_handler); + set_irq_chained_handler(IRQ_KIRKWOOD_GPIO_HIGH_16_23, gpio_irq_handler); } diff --git a/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c b/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c index 17de0bf53c08..0a95063f6d32 100644 --- a/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c +++ b/trunk/arch/arm/mach-kirkwood/sheevaplug-setup.c @@ -57,12 +57,6 @@ static struct mvsdio_platform_data sheeva_esata_mvsdio_data = { }; static struct gpio_led sheevaplug_led_pins[] = { - { - .name = "plug:red:misc", - .default_trigger = "none", - .gpio = 46, - .active_low = 1, - }, { .name = "plug:green:health", .default_trigger = "default-on", @@ -86,7 +80,6 @@ static struct platform_device sheevaplug_leds = { static unsigned int sheevaplug_mpp_config[] __initdata = { MPP29_GPIO, /* USB Power Enable */ - MPP46_GPIO, /* LED Red */ MPP49_GPIO, /* LED */ 0 }; diff --git a/trunk/arch/arm/mach-ks8695/gpio.c b/trunk/arch/arm/mach-ks8695/gpio.c index 31e456508a6f..55fbf7111a5b 100644 --- a/trunk/arch/arm/mach-ks8695/gpio.c +++ b/trunk/arch/arm/mach-ks8695/gpio.c @@ -80,7 +80,7 @@ int ks8695_gpio_interrupt(unsigned int pin, unsigned int type) local_irq_restore(flags); /* Set IRQ triggering type */ - irq_set_irq_type(gpio_irq[pin], type); + set_irq_type(gpio_irq[pin], type); /* enable interrupt mode */ ks8695_gpio_mode(pin, 0); diff --git a/trunk/arch/arm/mach-ks8695/irq.c b/trunk/arch/arm/mach-ks8695/irq.c index a78092dcd6fb..7998ccaa6333 100644 --- a/trunk/arch/arm/mach-ks8695/irq.c +++ b/trunk/arch/arm/mach-ks8695/irq.c @@ -115,12 +115,12 @@ static int ks8695_irq_set_type(struct irq_data *d, unsigned int type) } if (level_triggered) { - irq_set_chip_and_handler(d->irq, &ks8695_irq_level_chip, - handle_level_irq); + set_irq_chip(d->irq, &ks8695_irq_level_chip); + set_irq_handler(d->irq, handle_level_irq); } else { - irq_set_chip_and_handler(d->irq, &ks8695_irq_edge_chip, - handle_edge_irq); + set_irq_chip(d->irq, &ks8695_irq_edge_chip); + set_irq_handler(d->irq, handle_edge_irq); } __raw_writel(ctrl, KS8695_GPIO_VA + KS8695_IOPC); @@ -158,18 +158,16 @@ void __init ks8695_init_irq(void) case KS8695_IRQ_UART_RX: case KS8695_IRQ_COMM_TX: case KS8695_IRQ_COMM_RX: - irq_set_chip_and_handler(irq, - &ks8695_irq_level_chip, - handle_level_irq); + set_irq_chip(irq, &ks8695_irq_level_chip); + set_irq_handler(irq, handle_level_irq); break; /* Edge-triggered interrupts */ default: /* clear pending bit */ ks8695_irq_ack(irq_get_irq_data(irq)); - irq_set_chip_and_handler(irq, - &ks8695_irq_edge_chip, - handle_edge_irq); + set_irq_chip(irq, &ks8695_irq_edge_chip); + set_irq_handler(irq, handle_edge_irq); } set_irq_flags(irq, IRQF_VALID); diff --git a/trunk/arch/arm/mach-lpc32xx/irq.c b/trunk/arch/arm/mach-lpc32xx/irq.c index 4eae566dfdc7..316ecbf6c586 100644 --- a/trunk/arch/arm/mach-lpc32xx/irq.c +++ b/trunk/arch/arm/mach-lpc32xx/irq.c @@ -290,7 +290,7 @@ static int lpc32xx_set_irq_type(struct irq_data *d, unsigned int type) } /* Ok to use the level handler for all types */ - irq_set_handler(d->irq, handle_level_irq); + set_irq_handler(d->irq, handle_level_irq); return 0; } @@ -390,8 +390,8 @@ void __init lpc32xx_init_irq(void) /* Configure supported IRQ's */ for (i = 0; i < NR_IRQS; i++) { - irq_set_chip_and_handler(i, &lpc32xx_irq_chip, - handle_level_irq); + set_irq_chip(i, &lpc32xx_irq_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } @@ -406,8 +406,8 @@ void __init lpc32xx_init_irq(void) __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); /* MIC SUBIRQx interrupts will route handling to the chain handlers */ - irq_set_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); - irq_set_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); + set_irq_chained_handler(IRQ_LPC32XX_SUB1IRQ, lpc32xx_sic1_handler); + set_irq_chained_handler(IRQ_LPC32XX_SUB2IRQ, lpc32xx_sic2_handler); /* Initially disable all wake events */ __raw_writel(0, LPC32XX_CLKPWR_P01_ER); diff --git a/trunk/arch/arm/mach-mmp/irq-mmp2.c b/trunk/arch/arm/mach-mmp/irq-mmp2.c index d21c5441a3d0..fa037038e7b8 100644 --- a/trunk/arch/arm/mach-mmp/irq-mmp2.c +++ b/trunk/arch/arm/mach-mmp/irq-mmp2.c @@ -110,9 +110,9 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num) if (chip->irq_ack) chip->irq_ack(d); - irq_set_chip(irq, chip); + set_irq_chip(irq, chip); set_irq_flags(irq, IRQF_VALID); - irq_set_handler(irq, handle_level_irq); + set_irq_handler(irq, handle_level_irq); } } @@ -122,7 +122,7 @@ void __init mmp2_init_icu(void) for (irq = 0; irq < IRQ_MMP2_MUX_BASE; irq++) { icu_mask_irq(irq_get_irq_data(irq)); - irq_set_chip(irq, &icu_irq_chip); + set_irq_chip(irq, &icu_irq_chip); set_irq_flags(irq, IRQF_VALID); switch (irq) { @@ -133,7 +133,7 @@ void __init mmp2_init_icu(void) case IRQ_MMP2_SSP_MUX: break; default: - irq_set_handler(irq, handle_level_irq); + set_irq_handler(irq, handle_level_irq); break; } } @@ -149,9 +149,9 @@ void __init mmp2_init_icu(void) init_mux_irq(&misc_irq_chip, IRQ_MMP2_MISC_BASE, 15); init_mux_irq(&ssp_irq_chip, IRQ_MMP2_SSP_BASE, 2); - irq_set_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux); - irq_set_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux); - irq_set_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); - irq_set_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); - irq_set_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); + set_irq_chained_handler(IRQ_MMP2_PMIC_MUX, pmic_irq_demux); + set_irq_chained_handler(IRQ_MMP2_RTC_MUX, rtc_irq_demux); + set_irq_chained_handler(IRQ_MMP2_TWSI_MUX, twsi_irq_demux); + set_irq_chained_handler(IRQ_MMP2_MISC_MUX, misc_irq_demux); + set_irq_chained_handler(IRQ_MMP2_SSP_MUX, ssp_irq_demux); } diff --git a/trunk/arch/arm/mach-mmp/irq-pxa168.c b/trunk/arch/arm/mach-mmp/irq-pxa168.c index 89706a0d08f1..f86b450cb93c 100644 --- a/trunk/arch/arm/mach-mmp/irq-pxa168.c +++ b/trunk/arch/arm/mach-mmp/irq-pxa168.c @@ -48,7 +48,8 @@ void __init icu_init_irq(void) for (irq = 0; irq < 64; irq++) { icu_mask_irq(irq_get_irq_data(irq)); - irq_set_chip_and_handler(irq, &icu_irq_chip, handle_level_irq); + set_irq_chip(irq, &icu_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-msm/board-msm8960.c b/trunk/arch/arm/mach-msm/board-msm8960.c index 35c7ceeb3f29..1993721d472e 100644 --- a/trunk/arch/arm/mach-msm/board-msm8960.c +++ b/trunk/arch/arm/mach-msm/board-msm8960.c @@ -53,7 +53,7 @@ static void __init msm8960_init_irq(void) */ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) - irq_set_handler(i, handle_percpu_irq); + set_irq_handler(i, handle_percpu_irq); } } diff --git a/trunk/arch/arm/mach-msm/board-msm8x60.c b/trunk/arch/arm/mach-msm/board-msm8x60.c index 1163b6fd05d2..b3c55f138fce 100644 --- a/trunk/arch/arm/mach-msm/board-msm8x60.c +++ b/trunk/arch/arm/mach-msm/board-msm8x60.c @@ -56,7 +56,7 @@ static void __init msm8x60_init_irq(void) */ for (i = GIC_PPI_START; i < GIC_SPI_START; i++) { if (i != AVS_SVICINT && i != AVS_SVICINTSWDONE) - irq_set_handler(i, handle_percpu_irq); + set_irq_handler(i, handle_percpu_irq); } } diff --git a/trunk/arch/arm/mach-msm/board-trout-gpio.c b/trunk/arch/arm/mach-msm/board-trout-gpio.c index 87e1d01edecc..31117a4499c4 100644 --- a/trunk/arch/arm/mach-msm/board-trout-gpio.c +++ b/trunk/arch/arm/mach-msm/board-trout-gpio.c @@ -214,17 +214,17 @@ int __init trout_init_gpio(void) { int i; for(i = TROUT_INT_START; i <= TROUT_INT_END; i++) { - irq_set_chip_and_handler(i, &trout_gpio_irq_chip, - handle_edge_irq); + set_irq_chip(i, &trout_gpio_irq_chip); + set_irq_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } for (i = 0; i < ARRAY_SIZE(msm_gpio_banks); i++) gpiochip_add(&msm_gpio_banks[i].chip); - irq_set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); - irq_set_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); - irq_set_irq_wake(MSM_GPIO_TO_INT(17), 1); + set_irq_type(MSM_GPIO_TO_INT(17), IRQF_TRIGGER_HIGH); + set_irq_chained_handler(MSM_GPIO_TO_INT(17), trout_gpio_irq_handler); + set_irq_wake(MSM_GPIO_TO_INT(17), 1); return 0; } diff --git a/trunk/arch/arm/mach-msm/board-trout-mmc.c b/trunk/arch/arm/mach-msm/board-trout-mmc.c index f7a9724788b0..44be8464657b 100644 --- a/trunk/arch/arm/mach-msm/board-trout-mmc.c +++ b/trunk/arch/arm/mach-msm/board-trout-mmc.c @@ -174,7 +174,7 @@ int __init trout_init_mmc(unsigned int sys_rev) if (IS_ERR(vreg_sdslot)) return PTR_ERR(vreg_sdslot); - irq_set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); + set_irq_wake(TROUT_GPIO_TO_INT(TROUT_GPIO_SDMC_CD_N), 1); if (!opt_disable_sdcard) msm_add_sdcc(2, &trout_sdslot_data, diff --git a/trunk/arch/arm/mach-msm/gpio-v2.c b/trunk/arch/arm/mach-msm/gpio-v2.c index 56a964e52ad3..0de19ec74e34 100644 --- a/trunk/arch/arm/mach-msm/gpio-v2.c +++ b/trunk/arch/arm/mach-msm/gpio-v2.c @@ -230,18 +230,18 @@ static void msm_gpio_update_dual_edge_pos(unsigned gpio) val, val2); } -static void msm_gpio_irq_ack(struct irq_data *d) +static void msm_gpio_irq_ack(unsigned int irq) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); writel(BIT(INTR_STATUS), GPIO_INTR_STATUS(gpio)); if (test_bit(gpio, msm_gpio.dual_edge_irqs)) msm_gpio_update_dual_edge_pos(gpio); } -static void msm_gpio_irq_mask(struct irq_data *d) +static void msm_gpio_irq_mask(unsigned int irq) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); unsigned long irq_flags; spin_lock_irqsave(&tlmm_lock, irq_flags); @@ -251,9 +251,9 @@ static void msm_gpio_irq_mask(struct irq_data *d) spin_unlock_irqrestore(&tlmm_lock, irq_flags); } -static void msm_gpio_irq_unmask(struct irq_data *d) +static void msm_gpio_irq_unmask(unsigned int irq) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); unsigned long irq_flags; spin_lock_irqsave(&tlmm_lock, irq_flags); @@ -263,9 +263,9 @@ static void msm_gpio_irq_unmask(struct irq_data *d) spin_unlock_irqrestore(&tlmm_lock, irq_flags); } -static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) +static int msm_gpio_irq_set_type(unsigned int irq, unsigned int flow_type) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); unsigned long irq_flags; uint32_t bits; @@ -275,14 +275,14 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) if (flow_type & IRQ_TYPE_EDGE_BOTH) { bits |= BIT(INTR_DECT_CTL); - __irq_set_handler_locked(d->irq, handle_edge_irq); + irq_desc[irq].handle_irq = handle_edge_irq; if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) __set_bit(gpio, msm_gpio.dual_edge_irqs); else __clear_bit(gpio, msm_gpio.dual_edge_irqs); } else { bits &= ~BIT(INTR_DECT_CTL); - __irq_set_handler_locked(d->irq, handle_level_irq); + irq_desc[irq].handle_irq = handle_level_irq; __clear_bit(gpio, msm_gpio.dual_edge_irqs); } @@ -309,7 +309,6 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) */ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) { - struct irq_data *data = irq_desc_get_irq_data(desc); unsigned long i; for (i = find_first_bit(msm_gpio.enabled_irqs, NR_GPIO_IRQS); @@ -319,21 +318,21 @@ static void msm_summary_irq_handler(unsigned int irq, struct irq_desc *desc) generic_handle_irq(msm_gpio_to_irq(&msm_gpio.gpio_chip, i)); } - data->chip->irq_ack(data); + desc->chip->ack(irq); } -static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) +static int msm_gpio_irq_set_wake(unsigned int irq, unsigned int on) { - int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, d->irq); + int gpio = msm_irq_to_gpio(&msm_gpio.gpio_chip, irq); if (on) { if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) - irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); + set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 1); set_bit(gpio, msm_gpio.wake_irqs); } else { clear_bit(gpio, msm_gpio.wake_irqs); if (bitmap_empty(msm_gpio.wake_irqs, NR_GPIO_IRQS)) - irq_set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); + set_irq_wake(TLMM_SCSS_SUMMARY_IRQ, 0); } return 0; @@ -341,11 +340,11 @@ static int msm_gpio_irq_set_wake(struct irq_data *d, unsigned int on) static struct irq_chip msm_gpio_irq_chip = { .name = "msmgpio", - .irq_mask = msm_gpio_irq_mask, - .irq_unmask = msm_gpio_irq_unmask, - .irq_ack = msm_gpio_irq_ack, - .irq_set_type = msm_gpio_irq_set_type, - .irq_set_wake = msm_gpio_irq_set_wake, + .mask = msm_gpio_irq_mask, + .unmask = msm_gpio_irq_unmask, + .ack = msm_gpio_irq_ack, + .set_type = msm_gpio_irq_set_type, + .set_wake = msm_gpio_irq_set_wake, }; static int __devinit msm_gpio_probe(struct platform_device *dev) @@ -362,12 +361,12 @@ static int __devinit msm_gpio_probe(struct platform_device *dev) for (i = 0; i < msm_gpio.gpio_chip.ngpio; ++i) { irq = msm_gpio_to_irq(&msm_gpio.gpio_chip, i); - irq_set_chip_and_handler(irq, &msm_gpio_irq_chip, - handle_level_irq); + set_irq_chip(irq, &msm_gpio_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } - irq_set_chained_handler(TLMM_SCSS_SUMMARY_IRQ, + set_irq_chained_handler(TLMM_SCSS_SUMMARY_IRQ, msm_summary_irq_handler); return 0; } @@ -379,7 +378,7 @@ static int __devexit msm_gpio_remove(struct platform_device *dev) if (ret < 0) return ret; - irq_set_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); + set_irq_handler(TLMM_SCSS_SUMMARY_IRQ, NULL); return 0; } diff --git a/trunk/arch/arm/mach-msm/gpio.c b/trunk/arch/arm/mach-msm/gpio.c index 5ea273b00da8..176af9dcb8ee 100644 --- a/trunk/arch/arm/mach-msm/gpio.c +++ b/trunk/arch/arm/mach-msm/gpio.c @@ -293,10 +293,10 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int flow_type) val = readl(msm_chip->regs.int_edge); if (flow_type & IRQ_TYPE_EDGE_BOTH) { writel(val | mask, msm_chip->regs.int_edge); - __irq_set_handler_locked(d->irq, handle_edge_irq); + irq_desc[d->irq].handle_irq = handle_edge_irq; } else { writel(val & ~mask, msm_chip->regs.int_edge); - __irq_set_handler_locked(d->irq, handle_level_irq); + irq_desc[d->irq].handle_irq = handle_level_irq; } if ((flow_type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) { msm_chip->both_edge_detect |= mask; @@ -354,9 +354,9 @@ static int __init msm_init_gpio(void) msm_gpio_chips[j].chip.base + msm_gpio_chips[j].chip.ngpio) j++; - irq_set_chip_data(i, &msm_gpio_chips[j]); - irq_set_chip_and_handler(i, &msm_gpio_irq_chip, - handle_edge_irq); + set_irq_chip_data(i, &msm_gpio_chips[j]); + set_irq_chip(i, &msm_gpio_irq_chip); + set_irq_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } @@ -366,10 +366,10 @@ static int __init msm_init_gpio(void) gpiochip_add(&msm_gpio_chips[i].chip); } - irq_set_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); - irq_set_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); - irq_set_irq_wake(INT_GPIO_GROUP1, 1); - irq_set_irq_wake(INT_GPIO_GROUP2, 2); + set_irq_chained_handler(INT_GPIO_GROUP1, msm_gpio_irq_handler); + set_irq_chained_handler(INT_GPIO_GROUP2, msm_gpio_irq_handler); + set_irq_wake(INT_GPIO_GROUP1, 1); + set_irq_wake(INT_GPIO_GROUP2, 2); return 0; } diff --git a/trunk/arch/arm/mach-msm/irq-vic.c b/trunk/arch/arm/mach-msm/irq-vic.c index 1b54f807c2d0..68c28bbdc969 100644 --- a/trunk/arch/arm/mach-msm/irq-vic.c +++ b/trunk/arch/arm/mach-msm/irq-vic.c @@ -313,11 +313,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) type = msm_irq_shadow_reg[index].int_type; if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { type |= b; - __irq_set_handler_locked(d->irq, handle_edge_irq); + irq_desc[d->irq].handle_irq = handle_edge_irq; } if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { type &= ~b; - __irq_set_handler_locked(d->irq, handle_level_irq); + irq_desc[d->irq].handle_irq = handle_level_irq; } writel(type, treg); msm_irq_shadow_reg[index].int_type = type; @@ -357,7 +357,8 @@ void __init msm_init_irq(void) writel(3, VIC_INT_MASTEREN); for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); + set_irq_chip(n, &msm_irq_chip); + set_irq_handler(n, handle_level_irq); set_irq_flags(n, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-msm/irq.c b/trunk/arch/arm/mach-msm/irq.c index ea514be390c6..0b27d899f40e 100644 --- a/trunk/arch/arm/mach-msm/irq.c +++ b/trunk/arch/arm/mach-msm/irq.c @@ -100,11 +100,11 @@ static int msm_irq_set_type(struct irq_data *d, unsigned int flow_type) if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { writel(readl(treg) | b, treg); - __irq_set_handler_locked(d->irq, handle_edge_irq); + irq_desc[d->irq].handle_irq = handle_edge_irq; } if (flow_type & (IRQF_TRIGGER_HIGH | IRQF_TRIGGER_LOW)) { writel(readl(treg) & (~b), treg); - __irq_set_handler_locked(d->irq, handle_level_irq); + irq_desc[d->irq].handle_irq = handle_level_irq; } return 0; } @@ -145,7 +145,8 @@ void __init msm_init_irq(void) writel(1, VIC_INT_MASTEREN); for (n = 0; n < NR_MSM_IRQS; n++) { - irq_set_chip_and_handler(n, &msm_irq_chip, handle_level_irq); + set_irq_chip(n, &msm_irq_chip); + set_irq_handler(n, handle_level_irq); set_irq_flags(n, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-msm/sirc.c b/trunk/arch/arm/mach-msm/sirc.c index 689e78c95f38..11b54c7aeb09 100644 --- a/trunk/arch/arm/mach-msm/sirc.c +++ b/trunk/arch/arm/mach-msm/sirc.c @@ -105,10 +105,10 @@ static int sirc_irq_set_type(struct irq_data *d, unsigned int flow_type) val = readl(sirc_regs.int_type); if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) { val |= mask; - __irq_set_handler_locked(d->irq, handle_edge_irq); + irq_desc[d->irq].handle_irq = handle_edge_irq; } else { val &= ~mask; - __irq_set_handler_locked(d->irq, handle_level_irq); + irq_desc[d->irq].handle_irq = handle_level_irq; } writel(val, sirc_regs.int_type); @@ -158,14 +158,15 @@ void __init msm_init_sirc(void) wake_enable = 0; for (i = FIRST_SIRC_IRQ; i < LAST_SIRC_IRQ; i++) { - irq_set_chip_and_handler(i, &sirc_irq_chip, handle_edge_irq); + set_irq_chip(i, &sirc_irq_chip); + set_irq_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } for (i = 0; i < ARRAY_SIZE(sirc_reg_table); i++) { - irq_set_chained_handler(sirc_reg_table[i].cascade_irq, + set_irq_chained_handler(sirc_reg_table[i].cascade_irq, sirc_irq_handler); - irq_set_irq_wake(sirc_reg_table[i].cascade_irq, 1); + set_irq_wake(sirc_reg_table[i].cascade_irq, 1); } return; } diff --git a/trunk/arch/arm/mach-mv78xx0/irq.c b/trunk/arch/arm/mach-mv78xx0/irq.c index 3e24431bb5ea..08da497c39c2 100644 --- a/trunk/arch/arm/mach-mv78xx0/irq.c +++ b/trunk/arch/arm/mach-mv78xx0/irq.c @@ -38,8 +38,8 @@ void __init mv78xx0_init_irq(void) orion_gpio_init(0, 32, GPIO_VIRT_BASE, mv78xx0_core_index() ? 0x18 : 0, IRQ_MV78XX0_GPIO_START); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler); + set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); + set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); + set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); + set_irq_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler); } diff --git a/trunk/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c b/trunk/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c index 2e288b38b4ad..80761474c0f8 100644 --- a/trunk/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c +++ b/trunk/arch/arm/mach-mx3/eukrea_mbimxsd-baseboard.c @@ -43,7 +43,6 @@ #include #include #include -#include #include "devices-imx35.h" #include "devices.h" @@ -164,14 +163,11 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { MX35_PAD_SD1_DATA1__ESDHC1_DAT1, MX35_PAD_SD1_DATA2__ESDHC1_DAT2, MX35_PAD_SD1_DATA3__ESDHC1_DAT3, - /* SD1 CD */ - MX35_PAD_LD18__GPIO3_24, }; #define GPIO_LED1 IMX_GPIO_NR(3, 29) #define GPIO_SWITCH1 IMX_GPIO_NR(3, 25) -#define GPIO_LCDPWR IMX_GPIO_NR(1, 4) -#define GPIO_SD1CD IMX_GPIO_NR(3, 24) +#define GPIO_LCDPWR (4) static void eukrea_mbimxsd_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) @@ -258,11 +254,6 @@ struct imx_ssi_platform_data eukrea_mbimxsd_ssi_pdata __initconst = { .flags = IMX_SSI_SYN | IMX_SSI_NET | IMX_SSI_USE_I2S_SLAVE, }; -static struct esdhc_platform_data sd1_pdata = { - .cd_gpio = GPIO_SD1CD, - .wp_gpio = -EINVAL, -}; - /* * system init for baseboard usage. Will be called by cpuimx35 init. * @@ -298,7 +289,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void) imx35_add_imx_ssi(0, &eukrea_mbimxsd_ssi_pdata); imx35_add_flexcan1(NULL); - imx35_add_sdhci_esdhc_imx(0, &sd1_pdata); + imx35_add_sdhci_esdhc_imx(0, NULL); gpio_request(GPIO_LED1, "LED1"); gpio_direction_output(GPIO_LED1, 1); @@ -310,6 +301,7 @@ void __init eukrea_mbimxsd35_baseboard_init(void) gpio_request(GPIO_LCDPWR, "LCDPWR"); gpio_direction_output(GPIO_LCDPWR, 1); + gpio_free(GPIO_LCDPWR); i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices, ARRAY_SIZE(eukrea_mbimxsd_i2c_devices)); diff --git a/trunk/arch/arm/mach-mx3/mach-mx31ads.c b/trunk/arch/arm/mach-mx3/mach-mx31ads.c index 3d095d69bc68..4e4b780c481d 100644 --- a/trunk/arch/arm/mach-mx3/mach-mx31ads.c +++ b/trunk/arch/arm/mach-mx3/mach-mx31ads.c @@ -199,11 +199,12 @@ static void __init mx31ads_init_expio(void) __raw_writew(0xFFFF, PBC_INTSTATUS_REG); for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES); i++) { - irq_set_chip_and_handler(i, &expio_irq_chip, handle_level_irq); + set_irq_chip(i, &expio_irq_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } - irq_set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); - irq_set_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); + set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH); + set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler); } #ifdef CONFIG_MACH_MX31ADS_WM1133_EV1 diff --git a/trunk/arch/arm/mach-mx3/mach-pcm043.c b/trunk/arch/arm/mach-mx3/mach-pcm043.c index 036ba1a4704b..b3ecfb22d241 100644 --- a/trunk/arch/arm/mach-mx3/mach-pcm043.c +++ b/trunk/arch/arm/mach-mx3/mach-pcm043.c @@ -40,7 +40,6 @@ #include #include #include -#include #include "devices-imx35.h" #include "devices.h" @@ -218,15 +217,11 @@ static iomux_v3_cfg_t pcm043_pads[] = { MX35_PAD_SD1_DATA1__ESDHC1_DAT1, MX35_PAD_SD1_DATA2__ESDHC1_DAT2, MX35_PAD_SD1_DATA3__ESDHC1_DAT3, - MX35_PAD_ATA_DATA10__GPIO2_23, /* WriteProtect */ - MX35_PAD_ATA_DATA11__GPIO2_24, /* CardDetect */ }; #define AC97_GPIO_TXFS IMX_GPIO_NR(2, 31) #define AC97_GPIO_TXD IMX_GPIO_NR(2, 28) #define AC97_GPIO_RESET IMX_GPIO_NR(2, 0) -#define SD1_GPIO_WP IMX_GPIO_NR(2, 23) -#define SD1_GPIO_CD IMX_GPIO_NR(2, 24) static void pcm043_ac97_warm_reset(struct snd_ac97 *ac97) { @@ -351,11 +346,6 @@ static int __init pcm043_otg_mode(char *options) } __setup("otg_mode=", pcm043_otg_mode); -static struct esdhc_platform_data sd1_pdata = { - .wp_gpio = SD1_GPIO_WP, - .cd_gpio = SD1_GPIO_CD, -}; - /* * Board specific initialization. */ @@ -405,7 +395,7 @@ static void __init pcm043_init(void) imx35_add_fsl_usb2_udc(&otg_device_pdata); imx35_add_flexcan1(NULL); - imx35_add_sdhci_esdhc_imx(0, &sd1_pdata); + imx35_add_sdhci_esdhc_imx(0, NULL); } static void __init pcm043_timer_init(void) diff --git a/trunk/arch/arm/mach-mx5/Kconfig b/trunk/arch/arm/mach-mx5/Kconfig index 159340da9191..83ee08847d4d 100644 --- a/trunk/arch/arm/mach-mx5/Kconfig +++ b/trunk/arch/arm/mach-mx5/Kconfig @@ -165,7 +165,6 @@ config MACH_MX53_LOCO select IMX_HAVE_PLATFORM_IMX_I2C select IMX_HAVE_PLATFORM_IMX_UART select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX - select IMX_HAVE_PLATFORM_GPIO_KEYS help Include support for MX53 LOCO platform. This includes specific configurations for the board and its peripherals. diff --git a/trunk/arch/arm/mach-mx5/Makefile b/trunk/arch/arm/mach-mx5/Makefile index 0b9338cec516..4f63048be3ca 100644 --- a/trunk/arch/arm/mach-mx5/Makefile +++ b/trunk/arch/arm/mach-mx5/Makefile @@ -3,7 +3,7 @@ # # Object file lists. -obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o system.o +obj-y := cpu.o mm.o clock-mx51-mx53.o devices.o ehci.o obj-$(CONFIG_SOC_IMX50) += mm-mx50.o obj-$(CONFIG_CPU_FREQ_IMX) += cpu_op-mx51.o diff --git a/trunk/arch/arm/mach-mx5/board-mx51_babbage.c b/trunk/arch/arm/mach-mx5/board-mx51_babbage.c index bea4e4135f9d..b2ecd194e76d 100644 --- a/trunk/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/trunk/arch/arm/mach-mx5/board-mx51_babbage.c @@ -228,12 +228,13 @@ static inline void babbage_fec_reset(void) int ret; /* reset FEC PHY */ - ret = gpio_request_one(BABBAGE_FEC_PHY_RESET, - GPIOF_OUT_INIT_LOW, "fec-phy-reset"); + ret = gpio_request(BABBAGE_FEC_PHY_RESET, "fec-phy-reset"); if (ret) { printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); return; } + gpio_direction_output(BABBAGE_FEC_PHY_RESET, 0); + gpio_set_value(BABBAGE_FEC_PHY_RESET, 0); msleep(1); gpio_set_value(BABBAGE_FEC_PHY_RESET, 1); } diff --git a/trunk/arch/arm/mach-mx5/board-mx53_evk.c b/trunk/arch/arm/mach-mx5/board-mx53_evk.c index 2af3f43f74db..7b5735c5ea59 100644 --- a/trunk/arch/arm/mach-mx5/board-mx53_evk.c +++ b/trunk/arch/arm/mach-mx5/board-mx53_evk.c @@ -34,7 +34,7 @@ #include #include -#define MX53_EVK_FEC_PHY_RST IMX_GPIO_NR(7, 6) +#define SMD_FEC_PHY_RST IMX_GPIO_NR(7, 6) #define EVK_ECSPI1_CS0 IMX_GPIO_NR(2, 30) #define EVK_ECSPI1_CS1 IMX_GPIO_NR(3, 19) @@ -82,14 +82,15 @@ static inline void mx53_evk_fec_reset(void) int ret; /* reset FEC PHY */ - ret = gpio_request_one(MX53_EVK_FEC_PHY_RST, GPIOF_OUT_INIT_LOW, - "fec-phy-reset"); + ret = gpio_request(SMD_FEC_PHY_RST, "fec-phy-reset"); if (ret) { printk(KERN_ERR"failed to get GPIO_FEC_PHY_RESET: %d\n", ret); return; } + gpio_direction_output(SMD_FEC_PHY_RST, 0); + gpio_set_value(SMD_FEC_PHY_RST, 0); msleep(1); - gpio_set_value(MX53_EVK_FEC_PHY_RST, 1); + gpio_set_value(SMD_FEC_PHY_RST, 1); } static struct fec_platform_data mx53_evk_fec_pdata = { diff --git a/trunk/arch/arm/mach-mx5/board-mx53_loco.c b/trunk/arch/arm/mach-mx5/board-mx53_loco.c index 10a1bea10548..0a18f8d23eb0 100644 --- a/trunk/arch/arm/mach-mx5/board-mx53_loco.c +++ b/trunk/arch/arm/mach-mx5/board-mx53_loco.c @@ -36,9 +36,6 @@ #include "crm_regs.h" #include "devices-imx53.h" -#define MX53_LOCO_POWER IMX_GPIO_NR(1, 8) -#define MX53_LOCO_UI1 IMX_GPIO_NR(2, 14) -#define MX53_LOCO_UI2 IMX_GPIO_NR(2, 15) #define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6) static iomux_v3_cfg_t mx53_loco_pads[] = { @@ -183,27 +180,6 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { MX53_PAD_GPIO_8__GPIO1_8, }; -#define GPIO_BUTTON(gpio_num, ev_code, act_low, descr, wake) \ -{ \ - .gpio = gpio_num, \ - .type = EV_KEY, \ - .code = ev_code, \ - .active_low = act_low, \ - .desc = "btn " descr, \ - .wakeup = wake, \ -} - -static const struct gpio_keys_button loco_buttons[] __initconst = { - GPIO_BUTTON(MX53_LOCO_POWER, KEY_POWER, 1, "power", 0), - GPIO_BUTTON(MX53_LOCO_UI1, KEY_VOLUMEUP, 1, "volume-up", 0), - GPIO_BUTTON(MX53_LOCO_UI2, KEY_VOLUMEDOWN, 1, "volume-down", 0), -}; - -static const struct gpio_keys_platform_data loco_button_data __initconst = { - .buttons = loco_buttons, - .nbuttons = ARRAY_SIZE(loco_buttons), -}; - static inline void mx53_loco_fec_reset(void) { int ret; @@ -239,7 +215,6 @@ static void __init mx53_loco_board_init(void) imx53_add_imx_i2c(1, &mx53_loco_i2c_data); imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(2, NULL); - imx_add_gpio_keys(&loco_button_data); } static void __init mx53_loco_timer_init(void) diff --git a/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c b/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c index fdbc05ed5513..652ace413825 100644 --- a/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/trunk/arch/arm/mach-mx5/clock-mx51-mx53.c @@ -865,13 +865,6 @@ static struct clk aips_tz2_clk = { .disable = _clk_ccgr_disable_inwait, }; -static struct clk gpc_dvfs_clk = { - .enable_reg = MXC_CCM_CCGR5, - .enable_shift = MXC_CCM_CCGRx_CG12_OFFSET, - .enable = _clk_ccgr_enable, - .disable = _clk_ccgr_disable, -}; - static struct clk gpt_32k_clk = { .id = 0, .parent = &ckil_clk, @@ -1455,7 +1448,6 @@ static struct clk_lookup mx51_lookups[] = { _REGISTER_CLOCK("imx-ipuv3", NULL, ipu_clk) _REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk) _REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk) - _REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk) }; static struct clk_lookup mx53_lookups[] = { @@ -1519,7 +1511,6 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, clk_enable(&iim_clk); mx51_revision(); clk_disable(&iim_clk); - mx51_display_revision(); /* move usb_phy_clk to 24MHz */ clk_set_parent(&usb_phy1_clk, &osc_clk); diff --git a/trunk/arch/arm/mach-mx5/cpu.c b/trunk/arch/arm/mach-mx5/cpu.c index 472bdfab2e55..df46b5e60857 100644 --- a/trunk/arch/arm/mach-mx5/cpu.c +++ b/trunk/arch/arm/mach-mx5/cpu.c @@ -21,7 +21,6 @@ static int cpu_silicon_rev = -1; #define IIM_SREV 0x24 -#define MX50_HW_ADADIG_DIGPROG 0xB0 static int get_mx51_srev(void) { @@ -52,26 +51,6 @@ int mx51_revision(void) } EXPORT_SYMBOL(mx51_revision); -void mx51_display_revision(void) -{ - int rev; - char *srev; - rev = mx51_revision(); - - switch (rev) { - case IMX_CHIP_REVISION_2_0: - srev = IMX_CHIP_REVISION_2_0_STRING; - break; - case IMX_CHIP_REVISION_3_0: - srev = IMX_CHIP_REVISION_3_0_STRING; - break; - default: - srev = IMX_CHIP_REVISION_UNKNOWN_STRING; - } - printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev); -} -EXPORT_SYMBOL(mx51_display_revision); - #ifdef CONFIG_NEON /* @@ -128,44 +107,6 @@ int mx53_revision(void) } EXPORT_SYMBOL(mx53_revision); -static int get_mx50_srev(void) -{ - void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K); - u32 rev; - - if (!anatop) { - cpu_silicon_rev = -EINVAL; - return 0; - } - - rev = readl(anatop + MX50_HW_ADADIG_DIGPROG); - rev &= 0xff; - - iounmap(anatop); - if (rev == 0x0) - return IMX_CHIP_REVISION_1_0; - else if (rev == 0x1) - return IMX_CHIP_REVISION_1_1; - return 0; -} - -/* - * Returns: - * the silicon revision of the cpu - * -EINVAL - not a mx50 - */ -int mx50_revision(void) -{ - if (!cpu_is_mx50()) - return -EINVAL; - - if (cpu_silicon_rev == -1) - cpu_silicon_rev = get_mx50_srev(); - - return cpu_silicon_rev; -} -EXPORT_SYMBOL(mx50_revision); - static int __init post_cpu_init(void) { unsigned int reg; diff --git a/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c b/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c index 4a8550529b04..e83ffadb65f8 100644 --- a/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c +++ b/trunk/arch/arm/mach-mx5/eukrea_mbimx51-baseboard.c @@ -212,7 +212,7 @@ void __init eukrea_mbimx51_baseboard_init(void) gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq"); gpio_direction_input(MBIMX51_TSC2007_GPIO); - irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); + set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING); i2c_register_board_info(1, mbimx51_i2c_devices, ARRAY_SIZE(mbimx51_i2c_devices)); diff --git a/trunk/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c b/trunk/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c index e6c1119c20ae..c372a4373691 100644 --- a/trunk/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c +++ b/trunk/arch/arm/mach-mx5/eukrea_mbimxsd-baseboard.c @@ -67,10 +67,6 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = { MX51_PAD_SD1_DATA1__SD1_DATA1, MX51_PAD_SD1_DATA2__SD1_DATA2, MX51_PAD_SD1_DATA3__SD1_DATA3, - /* SD1 CD */ - _MX51_PAD_GPIO1_0__SD1_CD | MUX_PAD_CTRL(PAD_CTL_PUS_22K_UP | - PAD_CTL_PKE | PAD_CTL_SRE_FAST | - PAD_CTL_DSE_HIGH | PAD_CTL_PUE | PAD_CTL_HYS), }; #define GPIO_LED1 IMX_GPIO_NR(3, 30) diff --git a/trunk/arch/arm/mach-mx5/mx51_efika.c b/trunk/arch/arm/mach-mx5/mx51_efika.c index d0c7075937cf..868af8f435fa 100644 --- a/trunk/arch/arm/mach-mx5/mx51_efika.c +++ b/trunk/arch/arm/mach-mx5/mx51_efika.c @@ -42,6 +42,7 @@ #include #include #include +#include #include "devices-imx51.h" #include "devices.h" diff --git a/trunk/arch/arm/mach-mx5/system.c b/trunk/arch/arm/mach-mx5/system.c deleted file mode 100644 index 76ae8dc33e00..000000000000 --- a/trunk/arch/arm/mach-mx5/system.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved. - */ - -/* - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ -#include -#include -#include -#include "crm_regs.h" - -/* set cpu low power mode before WFI instruction. This function is called - * mx5 because it can be used for mx50, mx51, and mx53.*/ -void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode) -{ - u32 plat_lpc, arm_srpgcr, ccm_clpcr; - u32 empgc0, empgc1; - int stop_mode = 0; - - /* always allow platform to issue a deep sleep mode request */ - plat_lpc = __raw_readl(MXC_CORTEXA8_PLAT_LPC) & - ~(MXC_CORTEXA8_PLAT_LPC_DSM); - ccm_clpcr = __raw_readl(MXC_CCM_CLPCR) & ~(MXC_CCM_CLPCR_LPM_MASK); - arm_srpgcr = __raw_readl(MXC_SRPG_ARM_SRPGCR) & ~(MXC_SRPGCR_PCR); - empgc0 = __raw_readl(MXC_SRPG_EMPGC0_SRPGCR) & ~(MXC_SRPGCR_PCR); - empgc1 = __raw_readl(MXC_SRPG_EMPGC1_SRPGCR) & ~(MXC_SRPGCR_PCR); - - switch (mode) { - case WAIT_CLOCKED: - break; - case WAIT_UNCLOCKED: - ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET; - break; - case WAIT_UNCLOCKED_POWER_OFF: - case STOP_POWER_OFF: - plat_lpc |= MXC_CORTEXA8_PLAT_LPC_DSM - | MXC_CORTEXA8_PLAT_LPC_DBG_DSM; - if (mode == WAIT_UNCLOCKED_POWER_OFF) { - ccm_clpcr |= 0x1 << MXC_CCM_CLPCR_LPM_OFFSET; - ccm_clpcr &= ~MXC_CCM_CLPCR_VSTBY; - ccm_clpcr &= ~MXC_CCM_CLPCR_SBYOS; - stop_mode = 0; - } else { - ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; - ccm_clpcr |= 0x3 << MXC_CCM_CLPCR_STBY_COUNT_OFFSET; - ccm_clpcr |= MXC_CCM_CLPCR_VSTBY; - ccm_clpcr |= MXC_CCM_CLPCR_SBYOS; - stop_mode = 1; - } - arm_srpgcr |= MXC_SRPGCR_PCR; - - if (tzic_enable_wake(1) != 0) - return; - break; - case STOP_POWER_ON: - ccm_clpcr |= 0x2 << MXC_CCM_CLPCR_LPM_OFFSET; - break; - default: - printk(KERN_WARNING "UNKNOWN cpu power mode: %d\n", mode); - return; - } - - __raw_writel(plat_lpc, MXC_CORTEXA8_PLAT_LPC); - __raw_writel(ccm_clpcr, MXC_CCM_CLPCR); - __raw_writel(arm_srpgcr, MXC_SRPG_ARM_SRPGCR); - - /* Enable NEON SRPG for all but MX50TO1.0. */ - if (mx50_revision() != IMX_CHIP_REVISION_1_0) - __raw_writel(arm_srpgcr, MXC_SRPG_NEON_SRPGCR); - - if (stop_mode) { - empgc0 |= MXC_SRPGCR_PCR; - empgc1 |= MXC_SRPGCR_PCR; - - __raw_writel(empgc0, MXC_SRPG_EMPGC0_SRPGCR); - __raw_writel(empgc1, MXC_SRPG_EMPGC1_SRPGCR); - } -} diff --git a/trunk/arch/arm/mach-mxs/Kconfig b/trunk/arch/arm/mach-mxs/Kconfig index 4522fbb235d5..4f6f174af6c8 100644 --- a/trunk/arch/arm/mach-mxs/Kconfig +++ b/trunk/arch/arm/mach-mxs/Kconfig @@ -22,7 +22,6 @@ config MACH_MX23EVK select SOC_IMX23 select MXS_HAVE_AMBA_DUART select MXS_HAVE_PLATFORM_AUART - select MXS_HAVE_PLATFORM_MXS_MMC select MXS_HAVE_PLATFORM_MXSFB default y help @@ -36,7 +35,6 @@ config MACH_MX28EVK select MXS_HAVE_PLATFORM_AUART select MXS_HAVE_PLATFORM_FEC select MXS_HAVE_PLATFORM_FLEXCAN - select MXS_HAVE_PLATFORM_MXS_MMC select MXS_HAVE_PLATFORM_MXSFB select MXS_OCOTP default y diff --git a/trunk/arch/arm/mach-mxs/clock-mx23.c b/trunk/arch/arm/mach-mxs/clock-mx23.c index c3577ea789ac..d133c7f30940 100644 --- a/trunk/arch/arm/mach-mxs/clock-mx23.c +++ b/trunk/arch/arm/mach-mxs/clock-mx23.c @@ -521,15 +521,6 @@ static int clk_misc_init(void) __raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT, CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET); - /* - * 480 MHz seems too high to be ssp clock source directly, - * so set frac to get a 288 MHz ref_io. - */ - reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC); - reg &= ~BM_CLKCTRL_FRAC_IOFRAC; - reg |= 30 << BP_CLKCTRL_FRAC_IOFRAC; - __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC); - return 0; } @@ -537,12 +528,6 @@ int __init mx23_clocks_init(void) { clk_misc_init(); - /* - * source ssp clock from ref_io than ref_xtal, - * as ref_xtal only provides 24 MHz as maximum. - */ - clk_set_parent(&ssp_clk, &ref_io_clk); - clk_enable(&cpu_clk); clk_enable(&hbus_clk); clk_enable(&xbus_clk); diff --git a/trunk/arch/arm/mach-mxs/clock-mx28.c b/trunk/arch/arm/mach-mxs/clock-mx28.c index 1ad97fed1e94..5e489a2b2023 100644 --- a/trunk/arch/arm/mach-mxs/clock-mx28.c +++ b/trunk/arch/arm/mach-mxs/clock-mx28.c @@ -618,8 +618,6 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("pll2", NULL, pll2_clk) _REGISTER_CLOCK("mxs-dma-apbh", NULL, hbus_clk) _REGISTER_CLOCK("mxs-dma-apbx", NULL, xbus_clk) - _REGISTER_CLOCK("mxs-mmc.0", NULL, ssp0_clk) - _REGISTER_CLOCK("mxs-mmc.1", NULL, ssp1_clk) _REGISTER_CLOCK("flexcan.0", NULL, can0_clk) _REGISTER_CLOCK("flexcan.1", NULL, can1_clk) _REGISTER_CLOCK(NULL, "usb0", usb0_clk) @@ -739,15 +737,6 @@ static int clk_misc_init(void) reg |= BM_CLKCTRL_ENET_CLK_OUT_EN; __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET); - /* - * 480 MHz seems too high to be ssp clock source directly, - * so set frac0 to get a 288 MHz ref_io0. - */ - reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0); - reg &= ~BM_CLKCTRL_FRAC0_IO0FRAC; - reg |= 30 << BP_CLKCTRL_FRAC0_IO0FRAC; - __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_FRAC0); - return 0; } @@ -755,13 +744,6 @@ int __init mx28_clocks_init(void) { clk_misc_init(); - /* - * source ssp clock from ref_io0 than ref_xtal, - * as ref_xtal only provides 24 MHz as maximum. - */ - clk_set_parent(&ssp0_clk, &ref_io0_clk); - clk_set_parent(&ssp1_clk, &ref_io0_clk); - clk_enable(&cpu_clk); clk_enable(&hbus_clk); clk_enable(&xbus_clk); diff --git a/trunk/arch/arm/mach-mxs/devices-mx23.h b/trunk/arch/arm/mach-mxs/devices-mx23.h index c6f345febd39..c7e14f4e3669 100644 --- a/trunk/arch/arm/mach-mxs/devices-mx23.h +++ b/trunk/arch/arm/mach-mxs/devices-mx23.h @@ -21,10 +21,6 @@ extern const struct mxs_auart_data mx23_auart_data[] __initconst; #define mx23_add_auart0() mx23_add_auart(0) #define mx23_add_auart1() mx23_add_auart(1) -extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst; -#define mx23_add_mxs_mmc(id, pdata) \ - mxs_add_mxs_mmc(&mx23_mxs_mmc_data[id], pdata) - #define mx23_add_mxs_pwm(id) mxs_add_mxs_pwm(MX23_PWM_BASE_ADDR, id) struct platform_device *__init mx23_add_mxsfb( diff --git a/trunk/arch/arm/mach-mxs/devices-mx28.h b/trunk/arch/arm/mach-mxs/devices-mx28.h index c473eddce8cf..9d08555c4cf0 100644 --- a/trunk/arch/arm/mach-mxs/devices-mx28.h +++ b/trunk/arch/arm/mach-mxs/devices-mx28.h @@ -37,10 +37,6 @@ extern const struct mxs_flexcan_data mx28_flexcan_data[] __initconst; extern const struct mxs_i2c_data mx28_mxs_i2c_data[] __initconst; #define mx28_add_mxs_i2c(id) mxs_add_mxs_i2c(&mx28_mxs_i2c_data[id]) -extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst; -#define mx28_add_mxs_mmc(id, pdata) \ - mxs_add_mxs_mmc(&mx28_mxs_mmc_data[id], pdata) - #define mx28_add_mxs_pwm(id) mxs_add_mxs_pwm(MX28_PWM_BASE_ADDR, id) struct platform_device *__init mx28_add_mxsfb( diff --git a/trunk/arch/arm/mach-mxs/devices/Kconfig b/trunk/arch/arm/mach-mxs/devices/Kconfig index acf9eea124c0..1451ad060d82 100644 --- a/trunk/arch/arm/mach-mxs/devices/Kconfig +++ b/trunk/arch/arm/mach-mxs/devices/Kconfig @@ -15,9 +15,6 @@ config MXS_HAVE_PLATFORM_FLEXCAN config MXS_HAVE_PLATFORM_MXS_I2C bool -config MXS_HAVE_PLATFORM_MXS_MMC - bool - config MXS_HAVE_PLATFORM_MXS_PWM bool diff --git a/trunk/arch/arm/mach-mxs/devices/Makefile b/trunk/arch/arm/mach-mxs/devices/Makefile index 324f2824d38d..0d9bea30b0a2 100644 --- a/trunk/arch/arm/mach-mxs/devices/Makefile +++ b/trunk/arch/arm/mach-mxs/devices/Makefile @@ -4,6 +4,5 @@ obj-y += platform-dma.o obj-$(CONFIG_MXS_HAVE_PLATFORM_FEC) += platform-fec.o obj-$(CONFIG_MXS_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_I2C) += platform-mxs-i2c.o -obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o diff --git a/trunk/arch/arm/mach-mxs/devices/platform-mxs-mmc.c b/trunk/arch/arm/mach-mxs/devices/platform-mxs-mmc.c deleted file mode 100644 index 382dacbeca21..000000000000 --- a/trunk/arch/arm/mach-mxs/devices/platform-mxs-mmc.c +++ /dev/null @@ -1,73 +0,0 @@ -/* - * Copyright (C) 2010 Pengutronix - * Uwe Kleine-Koenig - * - * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. - * - * This program is free software; you can redistribute it and/or modify it under - * the terms of the GNU General Public License version 2 as published by the - * Free Software Foundation. - */ - -#include -#include -#include - -#include -#include -#include - -#define mxs_mxs_mmc_data_entry_single(soc, _id, hwid) \ - { \ - .id = _id, \ - .iobase = soc ## _SSP ## hwid ## _BASE_ADDR, \ - .dma = soc ## _DMA_SSP ## hwid, \ - .irq_err = soc ## _INT_SSP ## hwid ## _ERROR, \ - .irq_dma = soc ## _INT_SSP ## hwid ## _DMA, \ - } - -#define mxs_mxs_mmc_data_entry(soc, _id, hwid) \ - [_id] = mxs_mxs_mmc_data_entry_single(soc, _id, hwid) - - -#ifdef CONFIG_SOC_IMX23 -const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst = { - mxs_mxs_mmc_data_entry(MX23, 0, 1), - mxs_mxs_mmc_data_entry(MX23, 1, 2), -}; -#endif - -#ifdef CONFIG_SOC_IMX28 -const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst = { - mxs_mxs_mmc_data_entry(MX28, 0, 0), - mxs_mxs_mmc_data_entry(MX28, 1, 1), -}; -#endif - -struct platform_device *__init mxs_add_mxs_mmc( - const struct mxs_mxs_mmc_data *data, - const struct mxs_mmc_platform_data *pdata) -{ - struct resource res[] = { - { - .start = data->iobase, - .end = data->iobase + SZ_8K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = data->dma, - .end = data->dma, - .flags = IORESOURCE_DMA, - }, { - .start = data->irq_err, - .end = data->irq_err, - .flags = IORESOURCE_IRQ, - }, { - .start = data->irq_dma, - .end = data->irq_dma, - .flags = IORESOURCE_IRQ, - }, - }; - - return mxs_add_platform_device("mxs-mmc", data->id, - res, ARRAY_SIZE(res), pdata, sizeof(*pdata)); -} diff --git a/trunk/arch/arm/mach-mxs/gpio.c b/trunk/arch/arm/mach-mxs/gpio.c index 2c950fef71a8..56fa2ed15222 100644 --- a/trunk/arch/arm/mach-mxs/gpio.c +++ b/trunk/arch/arm/mach-mxs/gpio.c @@ -136,7 +136,7 @@ static int mxs_gpio_set_irq_type(struct irq_data *d, unsigned int type) static void mxs_gpio_irq_handler(u32 irq, struct irq_desc *desc) { u32 irq_stat; - struct mxs_gpio_port *port = (struct mxs_gpio_port *)irq_get_handler_data(irq); + struct mxs_gpio_port *port = (struct mxs_gpio_port *)get_irq_data(irq); u32 gpio_irq_no_base = port->virtual_irq_start; desc->irq_data.chip->irq_ack(&desc->irq_data); @@ -265,14 +265,14 @@ int __init mxs_gpio_init(struct mxs_gpio_port *port, int cnt) for (j = port[i].virtual_irq_start; j < port[i].virtual_irq_start + 32; j++) { - irq_set_chip_and_handler(j, &gpio_irq_chip, - handle_level_irq); + set_irq_chip(j, &gpio_irq_chip); + set_irq_handler(j, handle_level_irq); set_irq_flags(j, IRQF_VALID); } /* setup one handler for each entry */ - irq_set_chained_handler(port[i].irq, mxs_gpio_irq_handler); - irq_set_handler_data(port[i].irq, &port[i]); + set_irq_chained_handler(port[i].irq, mxs_gpio_irq_handler); + set_irq_data(port[i].irq, &port[i]); /* register gpio chip */ port[i].chip.direction_input = mxs_gpio_direction_input; diff --git a/trunk/arch/arm/mach-mxs/icoll.c b/trunk/arch/arm/mach-mxs/icoll.c index 23ca9d083b2c..0f4c120fc169 100644 --- a/trunk/arch/arm/mach-mxs/icoll.c +++ b/trunk/arch/arm/mach-mxs/icoll.c @@ -74,7 +74,8 @@ void __init icoll_init_irq(void) mxs_reset_block(icoll_base + HW_ICOLL_CTRL); for (i = 0; i < MXS_INTERNAL_IRQS; i++) { - irq_set_chip_and_handler(i, &mxs_icoll_chip, handle_level_irq); + set_irq_chip(i, &mxs_icoll_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-mxs/include/mach/devices-common.h b/trunk/arch/arm/mach-mxs/include/mach/devices-common.h index c5137f14c364..71f24484b044 100644 --- a/trunk/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/trunk/arch/arm/mach-mxs/include/mach/devices-common.h @@ -73,19 +73,6 @@ struct mxs_i2c_data { }; struct platform_device * __init mxs_add_mxs_i2c(const struct mxs_i2c_data *data); -/* mmc */ -#include -struct mxs_mxs_mmc_data { - int id; - resource_size_t iobase; - resource_size_t dma; - resource_size_t irq_err; - resource_size_t irq_dma; -}; -struct platform_device *__init mxs_add_mxs_mmc( - const struct mxs_mxs_mmc_data *data, - const struct mxs_mmc_platform_data *pdata); - /* pwm */ struct platform_device *__init mxs_add_mxs_pwm( resource_size_t iobase, int id); diff --git a/trunk/arch/arm/mach-mxs/mach-mx23evk.c b/trunk/arch/arm/mach-mxs/mach-mx23evk.c index 214e5b641bbc..a66994f0518f 100644 --- a/trunk/arch/arm/mach-mxs/mach-mx23evk.c +++ b/trunk/arch/arm/mach-mxs/mach-mx23evk.c @@ -28,8 +28,6 @@ #define MX23EVK_LCD_ENABLE MXS_GPIO_NR(1, 18) #define MX23EVK_BL_ENABLE MXS_GPIO_NR(1, 28) -#define MX23EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(1, 30) -#define MX23EVK_MMC0_SLOT_POWER MXS_GPIO_NR(1, 29) static const iomux_cfg_t mx23evk_pads[] __initconst = { /* duart */ @@ -75,36 +73,6 @@ static const iomux_cfg_t mx23evk_pads[] __initconst = { MX23_PAD_LCD_RESET__GPIO_1_18 | MXS_PAD_CTRL, /* backlight control */ MX23_PAD_PWM2__GPIO_1_28 | MXS_PAD_CTRL, - - /* mmc */ - MX23_PAD_SSP1_DATA0__SSP1_DATA0 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_SSP1_DATA1__SSP1_DATA1 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_SSP1_DATA2__SSP1_DATA2 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_SSP1_DATA3__SSP1_DATA3 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_GPMI_D08__SSP1_DATA4 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_GPMI_D09__SSP1_DATA5 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_GPMI_D10__SSP1_DATA6 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_GPMI_D11__SSP1_DATA7 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_SSP1_CMD__SSP1_CMD | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX23_PAD_SSP1_DETECT__SSP1_DETECT | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - MX23_PAD_SSP1_SCK__SSP1_SCK | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - /* write protect */ - MX23_PAD_PWM4__GPIO_1_30 | - (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - /* slot power enable */ - MX23_PAD_PWM3__GPIO_1_29 | - (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), }; /* mxsfb (lcdif) */ @@ -133,11 +101,6 @@ static const struct mxsfb_platform_data mx23evk_mxsfb_pdata __initconst = { .ld_intf_width = STMLCDIF_24BIT, }; -static struct mxs_mmc_platform_data mx23evk_mmc_pdata __initdata = { - .wp_gpio = MX23EVK_MMC0_WRITE_PROTECT, - .flags = SLOTF_8_BIT_CAPABLE, -}; - static void __init mx23evk_init(void) { int ret; @@ -147,13 +110,6 @@ static void __init mx23evk_init(void) mx23_add_duart(); mx23_add_auart0(); - /* power on mmc slot by writing 0 to the gpio */ - ret = gpio_request_one(MX23EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT, - "mmc0-slot-power"); - if (ret) - pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); - mx23_add_mxs_mmc(0, &mx23evk_mmc_pdata); - ret = gpio_request_one(MX23EVK_LCD_ENABLE, GPIOF_DIR_OUT, "lcd-enable"); if (ret) pr_warn("failed to request gpio lcd-enable: %d\n", ret); diff --git a/trunk/arch/arm/mach-mxs/mach-mx28evk.c b/trunk/arch/arm/mach-mxs/mach-mx28evk.c index bb329b9a2608..08002d02267a 100644 --- a/trunk/arch/arm/mach-mxs/mach-mx28evk.c +++ b/trunk/arch/arm/mach-mxs/mach-mx28evk.c @@ -34,11 +34,6 @@ #define MX28EVK_LCD_ENABLE MXS_GPIO_NR(3, 30) #define MX28EVK_FEC_PHY_RESET MXS_GPIO_NR(4, 13) -#define MX28EVK_MMC0_WRITE_PROTECT MXS_GPIO_NR(2, 12) -#define MX28EVK_MMC1_WRITE_PROTECT MXS_GPIO_NR(0, 28) -#define MX28EVK_MMC0_SLOT_POWER MXS_GPIO_NR(3, 28) -#define MX28EVK_MMC1_SLOT_POWER MXS_GPIO_NR(3, 29) - static const iomux_cfg_t mx28evk_pads[] __initconst = { /* duart */ MX28_PAD_PWM0__DUART_RX | MXS_PAD_CTRL, @@ -120,65 +115,6 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = { MX28_PAD_LCD_RESET__GPIO_3_30 | MXS_PAD_CTRL, /* backlight control */ MX28_PAD_PWM2__GPIO_3_18 | MXS_PAD_CTRL, - /* mmc0 */ - MX28_PAD_SSP0_DATA0__SSP0_D0 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA1__SSP0_D1 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA2__SSP0_D2 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA3__SSP0_D3 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA4__SSP0_D4 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA5__SSP0_D5 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA6__SSP0_D6 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DATA7__SSP0_D7 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_CMD__SSP0_CMD | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - MX28_PAD_SSP0_SCK__SSP0_SCK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - /* write protect */ - MX28_PAD_SSP1_SCK__GPIO_2_12 | - (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - /* slot power enable */ - MX28_PAD_PWM3__GPIO_3_28 | - (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - - /* mmc1 */ - MX28_PAD_GPMI_D00__SSP1_D0 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D01__SSP1_D1 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D02__SSP1_D2 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D03__SSP1_D3 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D04__SSP1_D4 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D05__SSP1_D5 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D06__SSP1_D6 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_D07__SSP1_D7 | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_RDY1__SSP1_CMD | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), - MX28_PAD_GPMI_RDY0__SSP1_CARD_DETECT | - (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - MX28_PAD_GPMI_WRN__SSP1_SCK | - (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - /* write protect */ - MX28_PAD_GPMI_RESETN__GPIO_0_28 | - (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), - /* slot power enable */ - MX28_PAD_PWM4__GPIO_3_29 | - (MXS_PAD_4MA | MXS_PAD_3V3 | MXS_PAD_NOPULL), }; /* fec */ @@ -322,18 +258,6 @@ static const struct mxsfb_platform_data mx28evk_mxsfb_pdata __initconst = { .ld_intf_width = STMLCDIF_24BIT, }; -static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = { - { - /* mmc0 */ - .wp_gpio = MX28EVK_MMC0_WRITE_PROTECT, - .flags = SLOTF_8_BIT_CAPABLE, - }, { - /* mmc1 */ - .wp_gpio = MX28EVK_MMC1_WRITE_PROTECT, - .flags = SLOTF_8_BIT_CAPABLE, - }, -}; - static void __init mx28evk_init(void) { int ret; @@ -373,19 +297,6 @@ static void __init mx28evk_init(void) gpio_set_value(MX28EVK_BL_ENABLE, 1); mx28_add_mxsfb(&mx28evk_mxsfb_pdata); - - /* power on mmc slot by writing 0 to the gpio */ - ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_DIR_OUT, - "mmc0-slot-power"); - if (ret) - pr_warn("failed to request gpio mmc0-slot-power: %d\n", ret); - mx28_add_mxs_mmc(0, &mx28evk_mmc_pdata[0]); - - ret = gpio_request_one(MX28EVK_MMC1_SLOT_POWER, GPIOF_DIR_OUT, - "mmc1-slot-power"); - if (ret) - pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret); - mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); } static void __init mx28evk_timer_init(void) diff --git a/trunk/arch/arm/mach-mxs/module-tx28.c b/trunk/arch/arm/mach-mxs/module-tx28.c index 0fcff47009cf..fa0b154da67b 100644 --- a/trunk/arch/arm/mach-mxs/module-tx28.c +++ b/trunk/arch/arm/mach-mxs/module-tx28.c @@ -45,7 +45,7 @@ static const iomux_cfg_t tx28_fec_gpio_pads[] __initconst = { }; #define FEC_MODE (MXS_PAD_8MA | MXS_PAD_PULLUP | MXS_PAD_3V3) -static const iomux_cfg_t tx28_fec0_pads[] __initconst = { +static const iomux_cfg_t tx28_fec_pads[] __initconst = { MX28_PAD_ENET0_MDC__ENET0_MDC | FEC_MODE, MX28_PAD_ENET0_MDIO__ENET0_MDIO | FEC_MODE, MX28_PAD_ENET0_RX_EN__ENET0_RX_EN | FEC_MODE, @@ -57,20 +57,7 @@ static const iomux_cfg_t tx28_fec0_pads[] __initconst = { MX28_PAD_ENET_CLK__CLKCTRL_ENET | FEC_MODE, }; -static const iomux_cfg_t tx28_fec1_pads[] __initconst = { - MX28_PAD_ENET0_RXD2__ENET1_RXD0, - MX28_PAD_ENET0_RXD3__ENET1_RXD1, - MX28_PAD_ENET0_TXD2__ENET1_TXD0, - MX28_PAD_ENET0_TXD3__ENET1_TXD1, - MX28_PAD_ENET0_COL__ENET1_TX_EN, - MX28_PAD_ENET0_CRS__ENET1_RX_EN, -}; - -static struct fec_platform_data tx28_fec0_data = { - .phy = PHY_INTERFACE_MODE_RMII, -}; - -static struct fec_platform_data tx28_fec1_data = { +static const struct fec_platform_data tx28_fec_data __initconst = { .phy = PHY_INTERFACE_MODE_RMII, }; @@ -121,15 +108,15 @@ int __init tx28_add_fec0(void) pr_debug("%s: Deasserting FEC PHY RESET\n", __func__); gpio_set_value(TX28_FEC_PHY_RESET, 1); - ret = mxs_iomux_setup_multiple_pads(tx28_fec0_pads, - ARRAY_SIZE(tx28_fec0_pads)); + ret = mxs_iomux_setup_multiple_pads(tx28_fec_pads, + ARRAY_SIZE(tx28_fec_pads)); if (ret) { pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n", __func__, ret); goto free_gpios; } - pr_debug("%s: Registering FEC0 device\n", __func__); - mx28_add_fec(0, &tx28_fec0_data); + pr_debug("%s: Registering FEC device\n", __func__); + mx28_add_fec(0, &tx28_fec_data); return 0; free_gpios: @@ -142,19 +129,3 @@ int __init tx28_add_fec0(void) return ret; } - -int __init tx28_add_fec1(void) -{ - int ret; - - ret = mxs_iomux_setup_multiple_pads(tx28_fec1_pads, - ARRAY_SIZE(tx28_fec1_pads)); - if (ret) { - pr_debug("%s: mxs_iomux_setup_multiple_pads() failed with rc: %d\n", - __func__, ret); - return ret; - } - pr_debug("%s: Registering FEC1 device\n", __func__); - mx28_add_fec(1, &tx28_fec1_data); - return 0; -} diff --git a/trunk/arch/arm/mach-mxs/module-tx28.h b/trunk/arch/arm/mach-mxs/module-tx28.h index 8ed425457d30..df9e1b6e81bf 100644 --- a/trunk/arch/arm/mach-mxs/module-tx28.h +++ b/trunk/arch/arm/mach-mxs/module-tx28.h @@ -7,4 +7,3 @@ * Free Software Foundation. */ int __init tx28_add_fec0(void); -int __init tx28_add_fec1(void); diff --git a/trunk/arch/arm/mach-netx/generic.c b/trunk/arch/arm/mach-netx/generic.c index 00023b5cf12b..29ffa750fbe6 100644 --- a/trunk/arch/arm/mach-netx/generic.c +++ b/trunk/arch/arm/mach-netx/generic.c @@ -171,13 +171,13 @@ void __init netx_init_irq(void) vic_init(__io(io_p2v(NETX_PA_VIC)), 0, ~0, 0); for (irq = NETX_IRQ_HIF_CHAINED(0); irq <= NETX_IRQ_HIF_LAST; irq++) { - irq_set_chip_and_handler(irq, &netx_hif_chip, - handle_level_irq); + set_irq_chip(irq, &netx_hif_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID); } writel(NETX_DPMAS_INT_EN_GLB_EN, NETX_DPMAS_INT_EN); - irq_set_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); + set_irq_chained_handler(NETX_IRQ_HIF, netx_hif_demux_handler); } static int __init netx_init(void) diff --git a/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c b/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c index e27687d53504..0c0d5248c368 100644 --- a/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c +++ b/trunk/arch/arm/mach-ns9xxx/board-a9m9750dev.c @@ -107,8 +107,8 @@ void __init board_a9m9750dev_init_irq(void) __func__); for (i = FPGA_IRQ(0); i <= FPGA_IRQ(7); ++i) { - irq_set_chip_and_handler(i, &a9m9750dev_fpga_chip, - handle_level_irq); + set_irq_chip(i, &a9m9750dev_fpga_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } @@ -118,8 +118,8 @@ void __init board_a9m9750dev_init_irq(void) REGSET(eic, SYS_EIC, LVEDG, LEVEL); __raw_writel(eic, SYS_EIC(2)); - irq_set_chained_handler(IRQ_NS9XXX_EXT2, - a9m9750dev_fpga_demux_handler); + set_irq_chained_handler(IRQ_NS9XXX_EXT2, + a9m9750dev_fpga_demux_handler); } void __init board_a9m9750dev_init_machine(void) diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/board.h b/trunk/arch/arm/mach-ns9xxx/include/mach/board.h index 19ca6de46a45..f7e9196eb9ab 100644 --- a/trunk/arch/arm/mach-ns9xxx/include/mach/board.h +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/board.h @@ -14,10 +14,12 @@ #include #define board_is_a9m9750dev() (0 \ + || machine_is_cc9p9360dev() \ || machine_is_cc9p9750dev() \ ) #define board_is_a9mvali() (0 \ + || machine_is_cc9p9360val() \ || machine_is_cc9p9750val() \ ) diff --git a/trunk/arch/arm/mach-ns9xxx/include/mach/module.h b/trunk/arch/arm/mach-ns9xxx/include/mach/module.h index 628e9752589b..f851a6b7da6c 100644 --- a/trunk/arch/arm/mach-ns9xxx/include/mach/module.h +++ b/trunk/arch/arm/mach-ns9xxx/include/mach/module.h @@ -18,6 +18,7 @@ ) #define module_is_cc9c() (0 \ + || machine_is_cc9c() \ ) #define module_is_cc9p9210() (0 \ @@ -31,17 +32,21 @@ ) #define module_is_cc9p9360() (0 \ + || machine_is_a9m9360() \ || machine_is_cc9p9360dev() \ || machine_is_cc9p9360js() \ + || machine_is_cc9p9360val() \ ) #define module_is_cc9p9750() (0 \ || machine_is_a9m9750() \ + || machine_is_cc9p9750dev() \ || machine_is_cc9p9750js() \ || machine_is_cc9p9750val() \ ) #define module_is_ccw9c() (0 \ + || machine_is_ccw9c() \ ) #define module_is_inc20otter() (0 \ diff --git a/trunk/arch/arm/mach-ns9xxx/irq.c b/trunk/arch/arm/mach-ns9xxx/irq.c index 37ab0a2b83ad..bf0fd48cbd80 100644 --- a/trunk/arch/arm/mach-ns9xxx/irq.c +++ b/trunk/arch/arm/mach-ns9xxx/irq.c @@ -67,7 +67,8 @@ void __init ns9xxx_init_irq(void) __raw_writel(prio2irq(i), SYS_IVA(i)); for (i = 0; i <= 31; ++i) { - irq_set_chip_and_handler(i, &ns9xxx_chip, handle_fasteoi_irq); + set_irq_chip(i, &ns9xxx_chip); + set_irq_handler(i, handle_fasteoi_irq); set_irq_flags(i, IRQF_VALID); irq_set_status_flags(i, IRQ_LEVEL); } diff --git a/trunk/arch/arm/mach-nuc93x/irq.c b/trunk/arch/arm/mach-nuc93x/irq.c index aa279f23e342..1f8a05a22834 100644 --- a/trunk/arch/arm/mach-nuc93x/irq.c +++ b/trunk/arch/arm/mach-nuc93x/irq.c @@ -59,8 +59,8 @@ void __init nuc93x_init_irq(void) __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); for (irqno = IRQ_WDT; irqno <= NR_IRQS; irqno++) { - irq_set_chip_and_handler(irqno, &nuc93x_irq_chip, - handle_level_irq); + set_irq_chip(irqno, &nuc93x_irq_chip); + set_irq_handler(irqno, handle_level_irq); set_irq_flags(irqno, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index e68dfde1918e..7c5e2112c776 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -276,7 +276,7 @@ static void __init osk_init_cf(void) return; } /* the CF I/O IRQ is really active-low */ - irq_set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); + set_irq_type(gpio_to_irq(62), IRQ_TYPE_EDGE_FALLING); } static void __init osk_init_irq(void) @@ -482,7 +482,7 @@ static void __init osk_mistral_init(void) omap_cfg_reg(P20_1610_GPIO4); /* PENIRQ */ gpio_request(4, "ts_int"); gpio_direction_input(4); - irq_set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); + set_irq_type(gpio_to_irq(4), IRQ_TYPE_EDGE_FALLING); spi_register_board_info(mistral_boardinfo, ARRAY_SIZE(mistral_boardinfo)); @@ -500,7 +500,7 @@ static void __init osk_mistral_init(void) int irq = gpio_to_irq(OMAP_MPUIO(2)); gpio_direction_input(OMAP_MPUIO(2)); - irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); + set_irq_type(irq, IRQ_TYPE_EDGE_RISING); #ifdef CONFIG_PM /* share the IRQ in case someone wants to use the * button for more than wakeup from system sleep. diff --git a/trunk/arch/arm/mach-omap1/board-palmz71.c b/trunk/arch/arm/mach-omap1/board-palmz71.c index 45f01d2c3a7a..d7bbbe721a75 100644 --- a/trunk/arch/arm/mach-omap1/board-palmz71.c +++ b/trunk/arch/arm/mach-omap1/board-palmz71.c @@ -256,12 +256,12 @@ palmz71_powercable(int irq, void *dev_id) { if (gpio_get_value(PALMZ71_USBDETECT_GPIO)) { printk(KERN_INFO "PM: Power cable connected\n"); - irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - IRQ_TYPE_EDGE_FALLING); + set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), + IRQ_TYPE_EDGE_FALLING); } else { printk(KERN_INFO "PM: Power cable disconnected\n"); - irq_set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), - IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(PALMZ71_USBDETECT_GPIO), + IRQ_TYPE_EDGE_RISING); } return IRQ_HANDLED; } diff --git a/trunk/arch/arm/mach-omap1/board-voiceblue.c b/trunk/arch/arm/mach-omap1/board-voiceblue.c index 65d24204937a..bdc0ac8dc21f 100644 --- a/trunk/arch/arm/mach-omap1/board-voiceblue.c +++ b/trunk/arch/arm/mach-omap1/board-voiceblue.c @@ -279,10 +279,10 @@ static void __init voiceblue_init(void) gpio_request(13, "16C554 irq"); gpio_request(14, "16C554 irq"); gpio_request(15, "16C554 irq"); - irq_set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING); - irq_set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(12), IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(14), IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(15), IRQ_TYPE_EDGE_RISING); platform_add_devices(voiceblue_devices, ARRAY_SIZE(voiceblue_devices)); omap_board_config = voiceblue_config; diff --git a/trunk/arch/arm/mach-omap1/fpga.c b/trunk/arch/arm/mach-omap1/fpga.c index cddbf8b089ce..0ace7998aaa5 100644 --- a/trunk/arch/arm/mach-omap1/fpga.c +++ b/trunk/arch/arm/mach-omap1/fpga.c @@ -156,17 +156,17 @@ void omap1510_fpga_init_irq(void) * The touchscreen interrupt is level-sensitive, so * we'll use the regular mask_ack routine for it. */ - irq_set_chip(i, &omap_fpga_irq_ack); + set_irq_chip(i, &omap_fpga_irq_ack); } else { /* * All FPGA interrupts except the touchscreen are * edge-sensitive, so we won't mask them. */ - irq_set_chip(i, &omap_fpga_irq); + set_irq_chip(i, &omap_fpga_irq); } - irq_set_handler(i, handle_edge_irq); + set_irq_handler(i, handle_edge_irq); set_irq_flags(i, IRQF_VALID); } @@ -183,6 +183,6 @@ void omap1510_fpga_init_irq(void) return; } gpio_direction_input(13); - irq_set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); - irq_set_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); + set_irq_type(gpio_to_irq(13), IRQ_TYPE_EDGE_RISING); + set_irq_chained_handler(OMAP1510_INT_FPGA, innovator_fpga_IRQ_demux); } diff --git a/trunk/arch/arm/mach-omap1/irq.c b/trunk/arch/arm/mach-omap1/irq.c index 5d3da7a63af3..731dd33bff51 100644 --- a/trunk/arch/arm/mach-omap1/irq.c +++ b/trunk/arch/arm/mach-omap1/irq.c @@ -230,8 +230,8 @@ void __init omap_init_irq(void) irq_trigger = irq_banks[i].trigger_map >> IRQ_BIT(j); omap_irq_set_cfg(j, 0, 0, irq_trigger); - irq_set_chip_and_handler(j, &omap_irq_chip, - handle_level_irq); + set_irq_chip(j, &omap_irq_chip); + set_irq_handler(j, handle_level_irq); set_irq_flags(j, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-omap2/gpmc.c b/trunk/arch/arm/mach-omap2/gpmc.c index 130034bf01d5..493505c3b2f5 100644 --- a/trunk/arch/arm/mach-omap2/gpmc.c +++ b/trunk/arch/arm/mach-omap2/gpmc.c @@ -743,7 +743,7 @@ static int __init gpmc_init(void) /* initalize the irq_chained */ irq = OMAP_GPMC_IRQ_BASE; for (cs = 0; cs < GPMC_CS_NUM; cs++) { - irq_set_chip_and_handler(irq, &dummy_irq_chip, + set_irq_chip_and_handler(irq, &dummy_irq_chip, handle_simple_irq); set_irq_flags(irq, IRQF_VALID); irq++; diff --git a/trunk/arch/arm/mach-omap2/irq.c b/trunk/arch/arm/mach-omap2/irq.c index 237e4530abf2..bc524b94fd59 100644 --- a/trunk/arch/arm/mach-omap2/irq.c +++ b/trunk/arch/arm/mach-omap2/irq.c @@ -223,7 +223,8 @@ void __init omap_init_irq(void) nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); for (i = 0; i < nr_of_irqs; i++) { - irq_set_chip_and_handler(i, &omap_irq_chip, handle_level_irq); + set_irq_chip(i, &omap_irq_chip); + set_irq_handler(i, handle_level_irq); set_irq_flags(i, IRQF_VALID); } } diff --git a/trunk/arch/arm/mach-orion5x/db88f5281-setup.c b/trunk/arch/arm/mach-orion5x/db88f5281-setup.c index b7d4591214e0..c10a11715376 100644 --- a/trunk/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/trunk/arch/arm/mach-orion5x/db88f5281-setup.c @@ -213,7 +213,7 @@ void __init db88f5281_pci_preinit(void) pin = DB88F5281_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "db88f5281_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -226,7 +226,7 @@ void __init db88f5281_pci_preinit(void) pin = DB88F5281_PCI_SLOT1_SLOT2_IRQ_PIN; if (gpio_request(pin, "PCI Int2") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "db88f5281_pci_preinit faield " "to set_irq_type pin %d\n", pin); diff --git a/trunk/arch/arm/mach-orion5x/irq.c b/trunk/arch/arm/mach-orion5x/irq.c index 43cf8bc9767b..ed85891f8699 100644 --- a/trunk/arch/arm/mach-orion5x/irq.c +++ b/trunk/arch/arm/mach-orion5x/irq.c @@ -34,8 +34,8 @@ void __init orion5x_init_irq(void) * Initialize gpiolib for GPIOs 0-31. */ orion_gpio_init(0, 32, GPIO_VIRT_BASE, 0, IRQ_ORION5X_GPIO_START); - irq_set_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); - irq_set_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); + set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); } diff --git a/trunk/arch/arm/mach-orion5x/rd88f5182-setup.c b/trunk/arch/arm/mach-orion5x/rd88f5182-setup.c index 4fc46772a087..67ec6959b267 100644 --- a/trunk/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/trunk/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -148,7 +148,7 @@ void __init rd88f5182_pci_preinit(void) pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; if (gpio_request(pin, "PCI IntA") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "rd88f5182_pci_preinit faield to " "set_irq_type pin %d\n", pin); @@ -161,7 +161,7 @@ void __init rd88f5182_pci_preinit(void) pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; if (gpio_request(pin, "PCI IntB") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "rd88f5182_pci_preinit faield to " "set_irq_type pin %d\n", pin); diff --git a/trunk/arch/arm/mach-orion5x/terastation_pro2-setup.c b/trunk/arch/arm/mach-orion5x/terastation_pro2-setup.c index 616004143912..5653ee6c71d8 100644 --- a/trunk/arch/arm/mach-orion5x/terastation_pro2-setup.c +++ b/trunk/arch/arm/mach-orion5x/terastation_pro2-setup.c @@ -88,7 +88,7 @@ void __init tsp2_pci_preinit(void) pin = TSP2_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "tsp2_pci_preinit failed " "to set_irq_type pin %d\n", pin); diff --git a/trunk/arch/arm/mach-orion5x/ts209-setup.c b/trunk/arch/arm/mach-orion5x/ts209-setup.c index f0f43e13ac87..8bbd27ea6735 100644 --- a/trunk/arch/arm/mach-orion5x/ts209-setup.c +++ b/trunk/arch/arm/mach-orion5x/ts209-setup.c @@ -117,7 +117,7 @@ void __init qnap_ts209_pci_preinit(void) pin = QNAP_TS209_PCI_SLOT0_IRQ_PIN; if (gpio_request(pin, "PCI Int1") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "qnap_ts209_pci_preinit failed to " "set_irq_type pin %d\n", pin); @@ -131,7 +131,7 @@ void __init qnap_ts209_pci_preinit(void) pin = QNAP_TS209_PCI_SLOT1_IRQ_PIN; if (gpio_request(pin, "PCI Int2") == 0) { if (gpio_direction_input(pin) == 0) { - irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); + set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); } else { printk(KERN_ERR "qnap_ts209_pci_preinit failed " "to set_irq_type pin %d\n", pin); diff --git a/trunk/arch/arm/mach-orion5x/ts78xx-setup.c b/trunk/arch/arm/mach-orion5x/ts78xx-setup.c index edb1dd2d1611..8554707d20a9 100644 --- a/trunk/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/trunk/arch/arm/mach-orion5x/ts78xx-setup.c @@ -402,7 +402,7 @@ static void ts78xx_fpga_supports(void) /* enable devices if magic matches */ switch ((ts78xx_fpga.id >> 8) & 0xffffff) { case TS7800_FPGA_MAGIC: - pr_warning("TS-7800 FPGA: unrecognized revision 0x%.2x\n", + printk(KERN_WARNING "TS-7800 FPGA: unrecognized revision 0x%.2x\n", ts78xx_fpga.id & 0xff); ts78xx_fpga.supports.ts_rtc.present = 1; ts78xx_fpga.supports.ts_nand.present = 1; @@ -423,7 +423,7 @@ static int ts78xx_fpga_load_devices(void) if (ts78xx_fpga.supports.ts_rtc.present == 1) { tmp = ts78xx_ts_rtc_load(); if (tmp) { - pr_info("TS-78xx: RTC not registered\n"); + printk(KERN_INFO "TS-78xx: RTC not registered\n"); ts78xx_fpga.supports.ts_rtc.present = 0; } ret |= tmp; @@ -431,7 +431,7 @@ static int ts78xx_fpga_load_devices(void) if (ts78xx_fpga.supports.ts_nand.present == 1) { tmp = ts78xx_ts_nand_load(); if (tmp) { - pr_info("TS-78xx: NAND not registered\n"); + printk(KERN_INFO "TS-78xx: NAND not registered\n"); ts78xx_fpga.supports.ts_nand.present = 0; } ret |= tmp; @@ -439,7 +439,7 @@ static int ts78xx_fpga_load_devices(void) if (ts78xx_fpga.supports.ts_rng.present == 1) { tmp = ts78xx_ts_rng_load(); if (tmp) { - pr_info("TS-78xx: RNG not registered\n"); + printk(KERN_INFO "TS-78xx: RNG not registered\n"); ts78xx_fpga.supports.ts_rng.present = 0; } ret |= tmp; @@ -466,7 +466,7 @@ static int ts78xx_fpga_load(void) { ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE); - pr_info("TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", + printk(KERN_INFO "TS-78xx FPGA: magic=0x%.6x, rev=0x%.2x\n", (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff); @@ -494,7 +494,7 @@ static int ts78xx_fpga_unload(void) * UrJTAG SVN since r1381 can be used to reprogram the FPGA */ if (ts78xx_fpga.id != fpga_id) { - pr_err("TS-78xx FPGA: magic/rev mismatch\n" + printk(KERN_ERR "TS-78xx FPGA: magic/rev mismatch\n" "TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n", (ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff, (fpga_id >> 8) & 0xffffff, fpga_id & 0xff); @@ -525,7 +525,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj, int value, ret; if (ts78xx_fpga.state < 0) { - pr_err("TS-78xx FPGA: borked, you must powercycle asap\n"); + printk(KERN_ERR "TS-78xx FPGA: borked, you must powercycle asap\n"); return -EBUSY; } @@ -534,7 +534,7 @@ static ssize_t ts78xx_fpga_store(struct kobject *kobj, else if (strncmp(buf, "offline", sizeof("offline") - 1) == 0) value = 0; else { - pr_err("ts78xx_fpga_store: Invalid value\n"); + printk(KERN_ERR "ts78xx_fpga_store: Invalid value\n"); return -EINVAL; } @@ -616,7 +616,7 @@ static void __init ts78xx_init(void) ret = ts78xx_fpga_load(); ret = sysfs_create_file(power_kobj, &ts78xx_fpga_attr.attr); if (ret) - pr_err("sysfs_create_file failed: %d\n", ret); + printk(KERN_ERR "sysfs_create_file failed: %d\n", ret); } MACHINE_START(TS78XX, "Technologic Systems TS-78xx SBC") diff --git a/trunk/arch/arm/mach-pnx4008/irq.c b/trunk/arch/arm/mach-pnx4008/irq.c index 7608c7a288cf..c69c180aec76 100644 --- a/trunk/arch/arm/mach-pnx4008/irq.c +++ b/trunk/arch/arm/mach-pnx4008/irq.c @@ -58,22 +58,22 @@ static int pnx4008_set_irq_type(struct irq_data *d, unsigned int type) case IRQ_TYPE_EDGE_RISING: __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /*rising edge */ - irq_set_handler(d->irq, handle_edge_irq); + set_irq_handler(d->irq, handle_edge_irq); break; case IRQ_TYPE_EDGE_FALLING: __raw_writel(__raw_readl(INTC_ATR(d->irq)) | INTC_BIT(d->irq), INTC_ATR(d->irq)); /*edge sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*falling edge */ - irq_set_handler(d->irq, handle_edge_irq); + set_irq_handler(d->irq, handle_edge_irq); break; case IRQ_TYPE_LEVEL_LOW: __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) & ~INTC_BIT(d->irq), INTC_APR(d->irq)); /*low level */ - irq_set_handler(d->irq, handle_level_irq); + set_irq_handler(d->irq, handle_level_irq); break; case IRQ_TYPE_LEVEL_HIGH: __raw_writel(__raw_readl(INTC_ATR(d->irq)) & ~INTC_BIT(d->irq), INTC_ATR(d->irq)); /*level sensitive */ __raw_writel(__raw_readl(INTC_APR(d->irq)) | INTC_BIT(d->irq), INTC_APR(d->irq)); /* high level */ - irq_set_handler(d->irq, handle_level_irq); + set_irq_handler(d->irq, handle_level_irq); break; /* IRQ_TYPE_EDGE_BOTH is not supported */ @@ -98,7 +98,7 @@ void __init pnx4008_init_irq(void) /* configure IRQ's */ for (i = 0; i < NR_IRQS; i++) { set_irq_flags(i, IRQF_VALID); - irq_set_chip(i, &pnx4008_irq_chip); + set_irq_chip(i, &pnx4008_irq_chip); pnx4008_set_irq_type(irq_get_irq_data(i), pnx4008_irq_type[i]); } diff --git a/trunk/arch/arm/mach-pxa/am200epd.c b/trunk/arch/arm/mach-pxa/am200epd.c index 4cb069fd9af2..3499fada73ae 100644 --- a/trunk/arch/arm/mach-pxa/am200epd.c +++ b/trunk/arch/arm/mach-pxa/am200epd.c @@ -128,8 +128,8 @@ static int am200_init_gpio_regs(struct metronomefb_par *par) return 0; err_req_gpio: - while (--i >= 0) - gpio_free(gpios[i]); + while (i > 0) + gpio_free(gpios[i--]); return err; } @@ -194,7 +194,7 @@ static struct notifier_block am200_fb_notif = { }; /* this gets called as part of our init. these steps must be done now so - * that we can use pxa_set_fb_info */ + * that we can use set_pxa_fb_info */ static void __init am200_presetup_fb(void) { int fw; @@ -249,7 +249,7 @@ static void __init am200_presetup_fb(void) /* we divide since we told the LCD controller we're 16bpp */ am200_fb_info.modes->xres /= 2; - pxa_set_fb_info(NULL, &am200_fb_info); + set_pxa_fb_info(&am200_fb_info); } diff --git a/trunk/arch/arm/mach-pxa/am300epd.c b/trunk/arch/arm/mach-pxa/am300epd.c index fa8bad235d9f..993d75e66390 100644 --- a/trunk/arch/arm/mach-pxa/am300epd.c +++ b/trunk/arch/arm/mach-pxa/am300epd.c @@ -125,7 +125,10 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par) if (err) { dev_err(&am300_device->dev, "failed requesting " "gpio %d, err=%d\n", i, err); - goto err_req_gpio2; + while (i >= DB0_GPIO_PIN) + gpio_free(i--); + i = ARRAY_SIZE(gpios) - 1; + goto err_req_gpio; } } @@ -156,13 +159,9 @@ static int am300_init_gpio_regs(struct broadsheetfb_par *par) return 0; -err_req_gpio2: - while (--i >= DB0_GPIO_PIN) - gpio_free(i); - i = ARRAY_SIZE(gpios); err_req_gpio: - while (--i >= 0) - gpio_free(gpios[i]); + while (i > 0) + gpio_free(gpios[i--]); return err; } diff --git a/trunk/arch/arm/mach-pxa/balloon3.c b/trunk/arch/arm/mach-pxa/balloon3.c index bfbecec6d05f..d2af73321dae 100644 --- a/trunk/arch/arm/mach-pxa/balloon3.c +++ b/trunk/arch/arm/mach-pxa/balloon3.c @@ -263,7 +263,7 @@ static void __init balloon3_lcd_init(void) } balloon3_lcd_screen.pxafb_backlight_power = balloon3_backlight_power; - pxa_set_fb_info(NULL, &balloon3_lcd_screen); + set_pxa_fb_info(&balloon3_lcd_screen); return; err2: @@ -527,13 +527,13 @@ static void __init balloon3_init_irq(void) pxa27x_init_irq(); /* setup extra Balloon3 irqs */ for (irq = BALLOON3_IRQ(0); irq <= BALLOON3_IRQ(7); irq++) { - irq_set_chip_and_handler(irq, &balloon3_irq_chip, - handle_level_irq); + set_irq_chip(irq, &balloon3_irq_chip); + set_irq_handler(irq, handle_level_irq); set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); } - irq_set_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); - irq_set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); + set_irq_chained_handler(BALLOON3_AUX_NIRQ, balloon3_irq_handler); + set_irq_type(BALLOON3_AUX_NIRQ, IRQ_TYPE_EDGE_FALLING); pr_debug("%s: chained handler installed - irq %d automatically " "enabled\n", __func__, BALLOON3_AUX_NIRQ); diff --git a/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c b/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c index 8b1a30959fae..a2380cd76f80 100644 --- a/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c +++ b/trunk/arch/arm/mach-pxa/cm-x2xx-pci.c @@ -70,10 +70,9 @@ void __cmx2xx_pci_init_irq(int irq_gpio) cmx2xx_it8152_irq_gpio = irq_gpio; - irq_set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); + set_irq_type(gpio_to_irq(irq_gpio), IRQ_TYPE_EDGE_RISING); - irq_set_chained_handler(gpio_to_irq(irq_gpio), - cmx2xx_it8152_irq_demux); + set_irq_chained_handler(gpio_to_irq(irq_gpio), cmx2xx_it8152_irq_demux); } #ifdef CONFIG_PM diff --git a/trunk/arch/arm/mach-pxa/cm-x2xx.c b/trunk/arch/arm/mach-pxa/cm-x2xx.c index 8225e2e58c6e..b734d8468168 100644 --- a/trunk/arch/arm/mach-pxa/cm-x2xx.c +++ b/trunk/arch/arm/mach-pxa/cm-x2xx.c @@ -379,7 +379,7 @@ __setup("monitor=", cmx2xx_set_display); static void __init cmx2xx_init_display(void) { - pxa_set_fb_info(NULL, cmx2xx_display); + set_pxa_fb_info(cmx2xx_display); } #else static inline void cmx2xx_init_display(void) {} diff --git a/trunk/arch/arm/mach-pxa/cm-x300.c b/trunk/arch/arm/mach-pxa/cm-x300.c index b2248e76ec8b..bfca7ed2fea3 100644 --- a/trunk/arch/arm/mach-pxa/cm-x300.c +++ b/trunk/arch/arm/mach-pxa/cm-x300.c @@ -296,7 +296,7 @@ static struct pxafb_mach_info cm_x300_lcd = { static void __init cm_x300_init_lcd(void) { - pxa_set_fb_info(NULL, &cm_x300_lcd); + set_pxa_fb_info(&cm_x300_lcd); } #else static inline void cm_x300_init_lcd(void) {} @@ -765,7 +765,7 @@ static void __init cm_x300_init_da9030(void) { pxa3xx_set_i2c_power_info(&cm_x300_pwr_i2c_info); i2c_register_board_info(1, &cm_x300_pmic_info, 1); - irq_set_irq_wake(IRQ_WAKEUP0, 1); + set_irq_wake(IRQ_WAKEUP0, 1); } static void __init cm_x300_init_wi2wi(void) diff --git a/trunk/arch/arm/mach-pxa/colibri-pxa270-income.c b/trunk/arch/arm/mach-pxa/colibri-pxa270-income.c index 44c1b77ece67..ee797397dc5b 100644 --- a/trunk/arch/arm/mach-pxa/colibri-pxa270-income.c +++ b/trunk/arch/arm/mach-pxa/colibri-pxa270-income.c @@ -175,7 +175,7 @@ static struct pxafb_mach_info income_lcd_screen = { static void __init income_lcd_init(void) { - pxa_set_fb_info(NULL, &income_lcd_screen); + set_pxa_fb_info(&income_lcd_screen); } #else static inline void income_lcd_init(void) {} diff --git a/trunk/arch/arm/mach-pxa/colibri-pxa3xx.c b/trunk/arch/arm/mach-pxa/colibri-pxa3xx.c index 3f9be419959d..96b2d9fbfef0 100644 --- a/trunk/arch/arm/mach-pxa/colibri-pxa3xx.c +++ b/trunk/arch/arm/mach-pxa/colibri-pxa3xx.c @@ -105,7 +105,7 @@ void __init colibri_pxa3xx_init_lcd(int bl_pin) lcd_bl_pin = bl_pin; gpio_request(bl_pin, "lcd backlight"); gpio_direction_output(bl_pin, 0); - pxa_set_fb_info(NULL, &sharp_lq43_info); + set_pxa_fb_info(&sharp_lq43_info); } #endif diff --git a/trunk/arch/arm/mach-pxa/corgi.c b/trunk/arch/arm/mach-pxa/corgi.c index 3a5507e31919..d4e705caefea 100644 --- a/trunk/arch/arm/mach-pxa/corgi.c +++ b/trunk/arch/arm/mach-pxa/corgi.c @@ -462,6 +462,7 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = { * USB Device Controller */ static struct pxa2xx_udc_mach_info udc_info __initdata = { + .gpio_vbus = -1, /* no connect GPIO; corgi can't tell connection status */ .gpio_pullup = CORGI_GPIO_USB_PULLUP, }; diff --git a/trunk/arch/arm/mach-pxa/devices.c b/trunk/arch/arm/mach-pxa/devices.c index 2e0425404de5..c4bf08b3eb61 100644 --- a/trunk/arch/arm/mach-pxa/devices.c +++ b/trunk/arch/arm/mach-pxa/devices.c @@ -90,6 +90,7 @@ void __init pxa_set_mci_info(struct pxamci_platform_data *info) static struct pxa2xx_udc_mach_info pxa_udc_info = { .gpio_pullup = -1, + .gpio_vbus = -1, }; void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info) @@ -187,12 +188,16 @@ struct platform_device pxa_device_fb = { .resource = pxafb_resources, }; -void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info) +void __init set_pxa_fb_info(struct pxafb_mach_info *info) { - pxa_device_fb.dev.parent = parent; pxa_register_device(&pxa_device_fb, info); } +void __init set_pxa_fb_parent(struct device *parent_dev) +{ + pxa_device_fb.dev.parent = parent_dev; +} + static struct resource pxa_resource_ffuart[] = { { .start = 0x40100000, diff --git a/trunk/arch/arm/mach-pxa/em-x270.c b/trunk/arch/arm/mach-pxa/em-x270.c index f8a6e9d79a3a..b411d7cbf5a1 100644 --- a/trunk/arch/arm/mach-pxa/em-x270.c +++ b/trunk/arch/arm/mach-pxa/em-x270.c @@ -689,7 +689,7 @@ static struct pxafb_mach_info em_x270_lcd = { static void __init em_x270_init_lcd(void) { - pxa_set_fb_info(NULL, &em_x270_lcd); + set_pxa_fb_info(&em_x270_lcd); } #else static inline void em_x270_init_lcd(void) {} diff --git a/trunk/arch/arm/mach-pxa/eseries.c b/trunk/arch/arm/mach-pxa/eseries.c index 2e3970fdde0b..edca0a043293 100644 --- a/trunk/arch/arm/mach-pxa/eseries.c +++ b/trunk/arch/arm/mach-pxa/eseries.c @@ -20,7 +20,6 @@ #include #include #include -#include #include