From a06b9c939577d4248e8d931fe7b6e667ff9094aa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?fran=C3=A7ois=20romieu?= Date: Fri, 30 Sep 2011 00:38:02 +0000 Subject: [PATCH] --- yaml --- r: 266412 b: refs/heads/master c: 3235de1684ae88e5e380de254a2a674dcd558acc h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/ethernet/realtek/sc92031.c | 8 +------- 2 files changed, 2 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index bbfbc0f9cb17..a330bfcc0a1b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 26c5c44d63824f7c397d27b10c2c43a3bab4a2f0 +refs/heads/master: 3235de1684ae88e5e380de254a2a674dcd558acc diff --git a/trunk/drivers/net/ethernet/realtek/sc92031.c b/trunk/drivers/net/ethernet/realtek/sc92031.c index 128f8ebb81ec..a284d6440538 100644 --- a/trunk/drivers/net/ethernet/realtek/sc92031.c +++ b/trunk/drivers/net/ethernet/realtek/sc92031.c @@ -31,6 +31,7 @@ #include #include #include +#include #include #include @@ -116,16 +117,9 @@ enum silan_registers { TestD8 = 0xD8, }; -#define MII_BMCR 0 // Basic mode control register -#define MII_BMSR 1 // Basic mode status register #define MII_JAB 16 #define MII_OutputStatus 24 -#define BMCR_FULLDPLX 0x0100 // Full duplex -#define BMCR_ANRESTART 0x0200 // Auto negotiation restart -#define BMCR_ANENABLE 0x1000 // Enable auto negotiation -#define BMCR_SPEED100 0x2000 // Select 100Mbps -#define BMSR_LSTATUS 0x0004 // Link status #define PHY_16_JAB_ENB 0x1000 #define PHY_16_PORT_ENB 0x1