From a2ada5f24e503a310bfeb54f5f38377255d4259d Mon Sep 17 00:00:00 2001 From: Muli Ben-Yehuda Date: Tue, 26 Sep 2006 10:52:33 +0200 Subject: [PATCH] --- yaml --- r: 35866 b: refs/heads/master c: 4ea8a5d8b57cd504b4b2de1212523848e7ab50cf h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/x86_64/kernel/pci-calgary.c | 3 ++- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index 98475d09148d..cf03c0bb7f25 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4ccf4ae3144360ab9c00d0b53427f43369287bfb +refs/heads/master: 4ea8a5d8b57cd504b4b2de1212523848e7ab50cf diff --git a/trunk/arch/x86_64/kernel/pci-calgary.c b/trunk/arch/x86_64/kernel/pci-calgary.c index cd866135e4ef..466588f95601 100644 --- a/trunk/arch/x86_64/kernel/pci-calgary.c +++ b/trunk/arch/x86_64/kernel/pci-calgary.c @@ -86,7 +86,8 @@ #define MAX_NUM_OF_PHBS 8 /* how many PHBs in total? */ #define MAX_NUM_CHASSIS 8 /* max number of chassis */ -#define MAX_PHB_BUS_NUM (MAX_NUM_OF_PHBS * MAX_NUM_CHASSIS * 2) /* max dev->bus->number */ +/* MAX_PHB_BUS_NUM is the maximal possible dev->bus->number */ +#define MAX_PHB_BUS_NUM (MAX_NUM_OF_PHBS * MAX_NUM_CHASSIS * 2) #define PHBS_PER_CALGARY 4 /* register offsets in Calgary's internal register space */