From a2e040db60918cf3ccf90ce3af4eec23f706fbd7 Mon Sep 17 00:00:00 2001
From: Ralf Baechle <ralf@linux-mips.org>
Date: Fri, 4 Feb 2005 15:51:26 +0000
Subject: [PATCH] --- yaml --- r: 10977 b: refs/heads/master c:
 d1e344e500cc693139a69d29122db18190916448 h: refs/heads/master i:   10975:
 a3a4aad514c2ce36b52a43a3ed7332cf4acc454f v: v3

---
 [refs]                     |  2 +-
 trunk/arch/mips/mm/c-r4k.c | 12 ++++++++++--
 2 files changed, 11 insertions(+), 3 deletions(-)

diff --git a/[refs] b/[refs]
index 393f6268d2c7..c26d18b49211 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 28ecca4786bd8af209ae65689faa6aeea80adba2
+refs/heads/master: d1e344e500cc693139a69d29122db18190916448
diff --git a/trunk/arch/mips/mm/c-r4k.c b/trunk/arch/mips/mm/c-r4k.c
index c08fa366b189..1466c497beab 100644
--- a/trunk/arch/mips/mm/c-r4k.c
+++ b/trunk/arch/mips/mm/c-r4k.c
@@ -1011,9 +1011,17 @@ static void __init probe_pcache(void)
 	 * normally they'd suffer from aliases but magic in the hardware deals
 	 * with that for us so we don't need to take care ourselves.
 	 */
-	if (c->cputype != CPU_R10000 && c->cputype != CPU_R12000)
+	switch (c->cputype) {
 		if (c->dcache.waysize > PAGE_SIZE)
-		        c->dcache.flags |= MIPS_CACHE_ALIASES;
+
+	case CPU_R10000:
+	case CPU_R12000:
+		break;
+	case CPU_24K:
+		if (!(read_c0_config7() & (1 << 16)))
+	default:
+			c->dcache.flags |= MIPS_CACHE_ALIASES;
+	}
 
 	switch (c->cputype) {
 	case CPU_20KC: