From a46280ac432c8fe965d8992420f3eec56de0159c Mon Sep 17 00:00:00 2001
From: Will Deacon <will.deacon@arm.com>
Date: Tue, 6 Mar 2012 17:34:22 +0100
Subject: [PATCH] --- yaml --- r: 288320 b: refs/heads/master c:
 99c1745b9c76910e195889044f914b4898b7c9a5 h: refs/heads/master v: v3

---
 [refs]                                | 2 +-
 trunk/arch/arm/kernel/perf_event_v7.c | 5 +++++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index 947df304ca4b..a20b7cc4f4c9 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5727347180ebc6b4a866fcbe00dcb39cc03acb37
+refs/heads/master: 99c1745b9c76910e195889044f914b4898b7c9a5
diff --git a/trunk/arch/arm/kernel/perf_event_v7.c b/trunk/arch/arm/kernel/perf_event_v7.c
index 6f488610f8fc..050cc8bf7246 100644
--- a/trunk/arch/arm/kernel/perf_event_v7.c
+++ b/trunk/arch/arm/kernel/perf_event_v7.c
@@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
 
 	counter = ARMV7_IDX_TO_COUNTER(idx);
 	asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
+	isb();
+	/* Clear the overflow flag in case an interrupt is pending. */
+	asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
+	isb();
+
 	return idx;
 }