diff --git a/[refs] b/[refs] index d49ba2adc888..2eac340687e0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 45bcc91aca328ba33f39cd711cf70b46ddd41ba0 +refs/heads/master: 57370aed40bfb8bfd2daab2eddbdc4faa459e784 diff --git a/trunk/Documentation/devicetree/bindings/arm/atmel-aic.txt b/trunk/Documentation/devicetree/bindings/arm/atmel-aic.txt index 19078bf5cca8..aabca4f83402 100644 --- a/trunk/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ b/trunk/Documentation/devicetree/bindings/arm/atmel-aic.txt @@ -4,7 +4,7 @@ Required properties: - compatible: Should be "atmel,-aic" - interrupt-controller: Identifies the node as an interrupt controller. - interrupt-parent: For single AIC system, it is an empty property. -- #interrupt-cells: The number of cells to define the interrupts. It sould be 3. +- #interrupt-cells: The number of cells to define the interrupts. It sould be 2. The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). The second cell is used to specify flags: bits[3:0] trigger type and level flags: @@ -14,10 +14,7 @@ Required properties: 8 = active low level-sensitive. Valid combinations are 1, 2, 3, 4, 8. Default flag for internal sources should be set to 4 (active high). - The third cell is used to specify the irq priority from 0 (lowest) to 7 - (highest). - reg: Should contain AIC registers location and length -- atmel,external-irqs: u32 array of external irqs. Examples: /* @@ -27,7 +24,7 @@ Examples: compatible = "atmel,at91rm9200-aic"; interrupt-controller; interrupt-parent; - #interrupt-cells = <3>; + #interrupt-cells = <2>; reg = <0xfffff000 0x200>; }; @@ -37,5 +34,5 @@ Examples: dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4 5>; + interrupts = <21 4>; }; diff --git a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt b/trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt similarity index 99% rename from trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt rename to trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt index 4c33b29dc660..09335f8eee00 100644 --- a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-emc.txt +++ b/trunk/Documentation/devicetree/bindings/arm/tegra/emc.txt @@ -15,7 +15,7 @@ Child device nodes describe the memory settings for different configurations and Example: - memory-controller@7000f400 { + emc@7000f400 { #address-cells = < 1 >; #size-cells = < 0 >; compatible = "nvidia,tegra20-emc"; diff --git a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt index 866d93421eba..c25a0a55151d 100644 --- a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt +++ b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-mc.txt @@ -8,7 +8,7 @@ Required properties: - interrupts : Should contain MC General interrupt. Example: - memory-controller@0x7000f000 { + mc { compatible = "nvidia,tegra20-mc"; reg = <0x7000f000 0x024 0x7000f03c 0x3c4>; diff --git a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt index bdf1a612422b..e47e73f612f4 100644 --- a/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt +++ b/trunk/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra30-mc.txt @@ -8,7 +8,7 @@ Required properties: - interrupts : Should contain MC General interrupt. Example: - memory-controller { + mc { compatible = "nvidia,tegra30-mc"; reg = <0x7000f000 0x010 0x7000f03c 0x1b4 diff --git a/trunk/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt b/trunk/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt rename to trunk/Documentation/devicetree/bindings/gpio/gpio_nvidia.txt diff --git a/trunk/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt b/trunk/Documentation/devicetree/bindings/input/tegra-kbc.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/input/nvidia,tegra20-kbc.txt rename to trunk/Documentation/devicetree/bindings/input/tegra-kbc.txt diff --git a/trunk/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/trunk/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt rename to trunk/Documentation/devicetree/bindings/mmc/nvidia-sdhci.txt diff --git a/trunk/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt b/trunk/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/nvec/nvidia,nvec.txt rename to trunk/Documentation/devicetree/bindings/nvec/nvec_nvidia.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-alc5632.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-alc5632.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-trimslice.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-trimslice.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8753.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8753.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt b/trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra-audio-wm8903.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra-audio-wm8903.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt b/trunk/Documentation/devicetree/bindings/sound/tegra20-das.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-das.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra20-das.txt diff --git a/trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt b/trunk/Documentation/devicetree/bindings/sound/tegra20-i2s.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/sound/nvidia,tegra20-i2s.txt rename to trunk/Documentation/devicetree/bindings/sound/tegra20-i2s.txt diff --git a/trunk/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt b/trunk/Documentation/devicetree/bindings/spi/spi_nvidia.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/spi/nvidia,tegra20-spi.txt rename to trunk/Documentation/devicetree/bindings/spi/spi_nvidia.txt diff --git a/trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt b/trunk/Documentation/devicetree/bindings/usb/tegra-usb.txt similarity index 100% rename from trunk/Documentation/devicetree/bindings/usb/nvidia,tegra20-ehci.txt rename to trunk/Documentation/devicetree/bindings/usb/tegra-usb.txt diff --git a/trunk/arch/arm/boot/dts/at91sam9260.dtsi b/trunk/arch/arm/boot/dts/at91sam9260.dtsi index 66389c1c6f62..f449efc9825f 100644 --- a/trunk/arch/arm/boot/dts/at91sam9260.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9260.dtsi @@ -52,11 +52,10 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; + #interrupt-cells = <2>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; - atmel,external-irqs = <29 30 31>; }; ramc0: ramc@ffffea00 { @@ -82,25 +81,25 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 4>; }; tcb0: timer@fffa0000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffa0000 0x100>; - interrupts = <17 4 0 18 4 0 19 4 0>; + interrupts = <17 4 18 4 19 4>; }; tcb1: timer@fffdc000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffdc000 0x100>; - interrupts = <26 4 0 27 4 0 28 4 0>; + interrupts = <26 4 27 4 28 4>; }; pioA: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -109,7 +108,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -118,7 +117,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4 1>; + interrupts = <4 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -127,14 +126,14 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 4>; status = "disabled"; }; usart0: serial@fffb0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb0000 0x200>; - interrupts = <6 4 5>; + interrupts = <6 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -143,7 +142,7 @@ usart1: serial@fffb4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb4000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -152,7 +151,7 @@ usart2: serial@fffb8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffb8000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -161,7 +160,7 @@ usart3: serial@fffd0000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd0000 0x200>; - interrupts = <23 4 5>; + interrupts = <23 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -170,7 +169,7 @@ usart4: serial@fffd4000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd4000 0x200>; - interrupts = <24 4 5>; + interrupts = <24 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -179,7 +178,7 @@ usart5: serial@fffd8000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffd8000 0x200>; - interrupts = <25 4 5>; + interrupts = <25 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -188,21 +187,21 @@ macb0: ethernet@fffc4000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffc4000 0x100>; - interrupts = <21 4 3>; + interrupts = <21 4>; status = "disabled"; }; usb1: gadget@fffa4000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfffa4000 0x4000>; - interrupts = <10 4 2>; + interrupts = <10 4>; status = "disabled"; }; adc0: adc@fffe0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffe0000 0x100>; - interrupts = <5 4 0>; + interrupts = <5 4>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xf>; atmel,adc-vref = <3300>; @@ -254,7 +253,7 @@ usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x100000>; - interrupts = <20 4 2>; + interrupts = <20 4>; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/at91sam9263.dtsi b/trunk/arch/arm/boot/dts/at91sam9263.dtsi index b460d6ce9eb5..0209913a65a2 100644 --- a/trunk/arch/arm/boot/dts/at91sam9263.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9263.dtsi @@ -48,11 +48,10 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; + #interrupt-cells = <2>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; - atmel,external-irqs = <30 31>; }; pmc: pmc@fffffc00 { @@ -69,13 +68,13 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 4>; }; tcb0: timer@fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <19 4 0>; + interrupts = <19 4>; }; rstc@fffffd00 { @@ -91,7 +90,7 @@ pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -100,7 +99,7 @@ pioB: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -109,7 +108,7 @@ pioC: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4 1>; + interrupts = <4 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -118,7 +117,7 @@ pioD: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <4 4 1>; + interrupts = <4 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -127,7 +126,7 @@ pioE: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <4 4 1>; + interrupts = <4 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -136,14 +135,14 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4 7>; + interrupts = <1 4>; status = "disabled"; }; usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -152,7 +151,7 @@ usart1: serial@fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -161,7 +160,7 @@ usart2: serial@fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4 5>; + interrupts = <9 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -170,14 +169,14 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <21 4 3>; + interrupts = <21 4>; status = "disabled"; }; usb1: gadget@fff78000 { compatible = "atmel,at91rm9200-udc"; reg = <0xfff78000 0x4000>; - interrupts = <24 4 2>; + interrupts = <24 4>; status = "disabled"; }; }; @@ -201,7 +200,7 @@ usb0: ohci@00a00000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00a00000 0x100000>; - interrupts = <29 4 2>; + interrupts = <29 4>; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/at91sam9g45.dtsi b/trunk/arch/arm/boot/dts/at91sam9g45.dtsi index bafa8806fc17..7dbccaf199f7 100644 --- a/trunk/arch/arm/boot/dts/at91sam9g45.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9g45.dtsi @@ -53,11 +53,10 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; + #interrupt-cells = <2>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; - atmel,external-irqs = <31>; }; ramc0: ramc@ffffe400 { @@ -79,7 +78,7 @@ pit: timer@fffffd30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffd30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 4>; }; @@ -91,25 +90,25 @@ tcb0: timer@fff7c000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfff7c000 0x100>; - interrupts = <18 4 0>; + interrupts = <18 4>; }; tcb1: timer@fffd4000 { compatible = "atmel,at91rm9200-tcb"; reg = <0xfffd4000 0x100>; - interrupts = <18 4 0>; + interrupts = <18 4>; }; dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <21 4 0>; + interrupts = <21 4>; }; pioA: gpio@fffff200 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff200 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -118,7 +117,7 @@ pioB: gpio@fffff400 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -127,7 +126,7 @@ pioC: gpio@fffff600 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <4 4 1>; + interrupts = <4 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -136,7 +135,7 @@ pioD: gpio@fffff800 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <5 4 1>; + interrupts = <5 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -145,7 +144,7 @@ pioE: gpio@fffffa00 { compatible = "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <5 4 1>; + interrupts = <5 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -154,14 +153,14 @@ dbgu: serial@ffffee00 { compatible = "atmel,at91sam9260-usart"; reg = <0xffffee00 0x200>; - interrupts = <1 4 7>; + interrupts = <1 4>; status = "disabled"; }; usart0: serial@fff8c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff8c000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -170,7 +169,7 @@ usart1: serial@fff90000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff90000 0x200>; - interrupts = <8 4 5>; + interrupts = <8 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -179,7 +178,7 @@ usart2: serial@fff94000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff94000 0x200>; - interrupts = <9 4 5>; + interrupts = <9 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -188,7 +187,7 @@ usart3: serial@fff98000 { compatible = "atmel,at91sam9260-usart"; reg = <0xfff98000 0x200>; - interrupts = <10 4 5>; + interrupts = <10 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -197,14 +196,14 @@ macb0: ethernet@fffbc000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xfffbc000 0x100>; - interrupts = <25 4 3>; + interrupts = <25 4>; status = "disabled"; }; adc0: adc@fffb0000 { compatible = "atmel,at91sam9260-adc"; reg = <0xfffb0000 0x100>; - interrupts = <20 4 0>; + interrupts = <20 4>; atmel,adc-use-external-triggers; atmel,adc-channels-used = <0xff>; atmel,adc-vref = <3300>; @@ -258,14 +257,14 @@ usb0: ohci@00700000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00700000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 4>; status = "disabled"; }; usb1: ehci@00800000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00800000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 4>; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/at91sam9n12.dtsi b/trunk/arch/arm/boot/dts/at91sam9n12.dtsi index bfac0dfc332c..cb84de791b5a 100644 --- a/trunk/arch/arm/boot/dts/at91sam9n12.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9n12.dtsi @@ -50,7 +50,7 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; + #interrupt-cells = <2>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; @@ -74,7 +74,7 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 4>; }; shdwc@fffffe10 { @@ -85,25 +85,25 @@ tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 4>; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 4>; }; dma: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4 0>; + interrupts = <20 4>; }; pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -112,7 +112,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -121,7 +121,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -130,7 +130,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -139,14 +139,14 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 4>; status = "disabled"; }; usart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x4000>; - interrupts = <5 4 5>; + interrupts = <5 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -155,7 +155,7 @@ usart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x4000>; - interrupts = <6 4 5>; + interrupts = <6 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -164,7 +164,7 @@ usart2: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x4000>; - interrupts = <7 4 5>; + interrupts = <7 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -173,7 +173,7 @@ usart3: serial@f8028000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8028000 0x4000>; - interrupts = <8 4 5>; + interrupts = <8 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -201,7 +201,7 @@ usb0: ohci@00500000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00500000 0x00100000>; - interrupts = <22 4 2>; + interrupts = <22 4>; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/at91sam9x5.dtsi b/trunk/arch/arm/boot/dts/at91sam9x5.dtsi index 4a18c393b136..6b3ef4339ae7 100644 --- a/trunk/arch/arm/boot/dts/at91sam9x5.dtsi +++ b/trunk/arch/arm/boot/dts/at91sam9x5.dtsi @@ -51,11 +51,10 @@ ranges; aic: interrupt-controller@fffff000 { - #interrupt-cells = <3>; + #interrupt-cells = <2>; compatible = "atmel,at91rm9200-aic"; interrupt-controller; reg = <0xfffff000 0x200>; - atmel,external-irqs = <31>; }; ramc0: ramc@ffffe800 { @@ -81,37 +80,37 @@ pit: timer@fffffe30 { compatible = "atmel,at91sam9260-pit"; reg = <0xfffffe30 0xf>; - interrupts = <1 4 7>; + interrupts = <1 4>; }; tcb0: timer@f8008000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf8008000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 4>; }; tcb1: timer@f800c000 { compatible = "atmel,at91sam9x5-tcb"; reg = <0xf800c000 0x100>; - interrupts = <17 4 0>; + interrupts = <17 4>; }; dma0: dma-controller@ffffec00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffec00 0x200>; - interrupts = <20 4 0>; + interrupts = <20 4>; }; dma1: dma-controller@ffffee00 { compatible = "atmel,at91sam9g45-dma"; reg = <0xffffee00 0x200>; - interrupts = <21 4 0>; + interrupts = <21 4>; }; pioA: gpio@fffff400 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff400 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -120,7 +119,7 @@ pioB: gpio@fffff600 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff600 0x100>; - interrupts = <2 4 1>; + interrupts = <2 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -129,7 +128,7 @@ pioC: gpio@fffff800 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffff800 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -138,7 +137,7 @@ pioD: gpio@fffffa00 { compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio"; reg = <0xfffffa00 0x100>; - interrupts = <3 4 1>; + interrupts = <3 4>; #gpio-cells = <2>; gpio-controller; interrupt-controller; @@ -147,14 +146,14 @@ dbgu: serial@fffff200 { compatible = "atmel,at91sam9260-usart"; reg = <0xfffff200 0x200>; - interrupts = <1 4 7>; + interrupts = <1 4>; status = "disabled"; }; usart0: serial@f801c000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf801c000 0x200>; - interrupts = <5 4 5>; + interrupts = <5 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -163,7 +162,7 @@ usart1: serial@f8020000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8020000 0x200>; - interrupts = <6 4 5>; + interrupts = <6 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -172,7 +171,7 @@ usart2: serial@f8024000 { compatible = "atmel,at91sam9260-usart"; reg = <0xf8024000 0x200>; - interrupts = <7 4 5>; + interrupts = <7 4>; atmel,use-dma-rx; atmel,use-dma-tx; status = "disabled"; @@ -181,21 +180,21 @@ macb0: ethernet@f802c000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf802c000 0x100>; - interrupts = <24 4 3>; + interrupts = <24 4>; status = "disabled"; }; macb1: ethernet@f8030000 { compatible = "cdns,at32ap7000-macb", "cdns,macb"; reg = <0xf8030000 0x100>; - interrupts = <27 4 3>; + interrupts = <27 4>; status = "disabled"; }; adc0: adc@f804c000 { compatible = "atmel,at91sam9260-adc"; reg = <0xf804c000 0x100>; - interrupts = <19 4 0>; + interrupts = <19 4>; atmel,adc-use-external; atmel,adc-channels-used = <0xffff>; atmel,adc-vref = <3300>; @@ -249,14 +248,14 @@ usb0: ohci@00600000 { compatible = "atmel,at91rm9200-ohci", "usb-ohci"; reg = <0x00600000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 4>; status = "disabled"; }; usb1: ehci@00700000 { compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; reg = <0x00700000 0x100000>; - interrupts = <22 4 2>; + interrupts = <22 4>; status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/tegra30-cardhu.dts b/trunk/arch/arm/boot/dts/tegra-cardhu.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra30-cardhu.dts rename to trunk/arch/arm/boot/dts/tegra-cardhu.dts index c169bced131e..36321bceec46 100644 --- a/trunk/arch/arm/boot/dts/tegra30-cardhu.dts +++ b/trunk/arch/arm/boot/dts/tegra-cardhu.dts @@ -144,6 +144,7 @@ sdhci@78000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-harmony.dts b/trunk/arch/arm/boot/dts/tegra-harmony.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-harmony.dts rename to trunk/arch/arm/boot/dts/tegra-harmony.dts index f146dbf6f7f8..7de701365fce 100644 --- a/trunk/arch/arm/boot/dts/tegra20-harmony.dts +++ b/trunk/arch/arm/boot/dts/tegra-harmony.dts @@ -307,6 +307,7 @@ cd-gpios = <&gpio 58 0>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-paz00.dts b/trunk/arch/arm/boot/dts/tegra-paz00.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-paz00.dts rename to trunk/arch/arm/boot/dts/tegra-paz00.dts index 684a9e1ff7e9..bfeb117d5aea 100644 --- a/trunk/arch/arm/boot/dts/tegra20-paz00.dts +++ b/trunk/arch/arm/boot/dts/tegra-paz00.dts @@ -301,6 +301,7 @@ sdhci@c8000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts b/trunk/arch/arm/boot/dts/tegra-seaboard.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-seaboard.dts rename to trunk/arch/arm/boot/dts/tegra-seaboard.dts index b797901d040d..89cb7f2acd92 100644 --- a/trunk/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/trunk/arch/arm/boot/dts/tegra-seaboard.dts @@ -334,7 +334,7 @@ }; }; - memory-controller@0x7000f400 { + emc { emc-table@190000 { reg = <190000>; compatible = "nvidia,tegra20-emc-table"; @@ -397,6 +397,7 @@ sdhci@c8000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20-trimslice.dts b/trunk/arch/arm/boot/dts/tegra-trimslice.dts similarity index 100% rename from trunk/arch/arm/boot/dts/tegra20-trimslice.dts rename to trunk/arch/arm/boot/dts/tegra-trimslice.dts diff --git a/trunk/arch/arm/boot/dts/tegra20-ventana.dts b/trunk/arch/arm/boot/dts/tegra-ventana.dts similarity index 99% rename from trunk/arch/arm/boot/dts/tegra20-ventana.dts rename to trunk/arch/arm/boot/dts/tegra-ventana.dts index be90544e6b59..445343b0fbdd 100644 --- a/trunk/arch/arm/boot/dts/tegra20-ventana.dts +++ b/trunk/arch/arm/boot/dts/tegra-ventana.dts @@ -314,6 +314,7 @@ sdhci@c8000600 { status = "okay"; + support-8bit; bus-width = <8>; }; diff --git a/trunk/arch/arm/boot/dts/tegra20.dtsi b/trunk/arch/arm/boot/dts/tegra20.dtsi index 9f1921634eb7..c417d67e9027 100644 --- a/trunk/arch/arm/boot/dts/tegra20.dtsi +++ b/trunk/arch/arm/boot/dts/tegra20.dtsi @@ -72,7 +72,7 @@ reg = <0x70002800 0x200>; interrupts = <0 13 0x04>; nvidia,dma-request-selector = <&apbdma 2>; - status = "disabled"; + status = "disable"; }; tegra_i2s2: i2s@70002a00 { @@ -80,7 +80,7 @@ reg = <0x70002a00 0x200>; interrupts = <0 3 0x04>; nvidia,dma-request-selector = <&apbdma 1>; - status = "disabled"; + status = "disable"; }; serial@70006000 { @@ -88,7 +88,7 @@ reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = <0 36 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006040 { @@ -96,7 +96,7 @@ reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = <0 37 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006200 { @@ -104,7 +104,7 @@ reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = <0 46 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006300 { @@ -112,7 +112,7 @@ reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = <0 90 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006400 { @@ -120,7 +120,7 @@ reg = <0x70006400 0x100>; reg-shift = <2>; interrupts = <0 91 0x04>; - status = "disabled"; + status = "disable"; }; i2c@7000c000 { @@ -129,7 +129,7 @@ interrupts = <0 38 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000c400 { @@ -138,7 +138,7 @@ interrupts = <0 84 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000c500 { @@ -147,7 +147,7 @@ interrupts = <0 92 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000d000 { @@ -156,7 +156,7 @@ interrupts = <0 53 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; pmc { @@ -164,7 +164,7 @@ reg = <0x7000e400 0x400>; }; - memory-controller@0x7000f000 { + mc { compatible = "nvidia,tegra20-mc"; reg = <0x7000f000 0x024 0x7000f03c 0x3c4>; @@ -177,7 +177,7 @@ 0x58000000 0x02000000>; /* GART aperture */ }; - memory-controller@0x7000f400 { + emc { compatible = "nvidia,tegra20-emc"; reg = <0x7000f400 0x200>; #address-cells = <1>; @@ -190,7 +190,7 @@ interrupts = <0 20 0x04>; phy_type = "utmi"; nvidia,has-legacy-mode; - status = "disabled"; + status = "disable"; }; usb@c5004000 { @@ -198,7 +198,7 @@ reg = <0xc5004000 0x4000>; interrupts = <0 21 0x04>; phy_type = "ulpi"; - status = "disabled"; + status = "disable"; }; usb@c5008000 { @@ -206,35 +206,35 @@ reg = <0xc5008000 0x4000>; interrupts = <0 97 0x04>; phy_type = "utmi"; - status = "disabled"; + status = "disable"; }; sdhci@c8000000 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000000 0x200>; interrupts = <0 14 0x04>; - status = "disabled"; + status = "disable"; }; sdhci@c8000200 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000200 0x200>; interrupts = <0 15 0x04>; - status = "disabled"; + status = "disable"; }; sdhci@c8000400 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000400 0x200>; interrupts = <0 19 0x04>; - status = "disabled"; + status = "disable"; }; sdhci@c8000600 { compatible = "nvidia,tegra20-sdhci"; reg = <0xc8000600 0x200>; interrupts = <0 31 0x04>; - status = "disabled"; + status = "disable"; }; pmu { diff --git a/trunk/arch/arm/boot/dts/tegra30.dtsi b/trunk/arch/arm/boot/dts/tegra30.dtsi index da740191771f..2dcc09e784b5 100644 --- a/trunk/arch/arm/boot/dts/tegra30.dtsi +++ b/trunk/arch/arm/boot/dts/tegra30.dtsi @@ -82,7 +82,7 @@ reg = <0x70006000 0x40>; reg-shift = <2>; interrupts = <0 36 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006040 { @@ -90,7 +90,7 @@ reg = <0x70006040 0x40>; reg-shift = <2>; interrupts = <0 37 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006200 { @@ -98,7 +98,7 @@ reg = <0x70006200 0x100>; reg-shift = <2>; interrupts = <0 46 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006300 { @@ -106,7 +106,7 @@ reg = <0x70006300 0x100>; reg-shift = <2>; interrupts = <0 90 0x04>; - status = "disabled"; + status = "disable"; }; serial@70006400 { @@ -114,7 +114,7 @@ reg = <0x70006400 0x100>; reg-shift = <2>; interrupts = <0 91 0x04>; - status = "disabled"; + status = "disable"; }; i2c@7000c000 { @@ -123,7 +123,7 @@ interrupts = <0 38 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000c400 { @@ -132,7 +132,7 @@ interrupts = <0 84 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000c500 { @@ -141,7 +141,7 @@ interrupts = <0 92 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000c700 { @@ -150,7 +150,7 @@ interrupts = <0 120 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; i2c@7000d000 { @@ -159,7 +159,7 @@ interrupts = <0 53 0x04>; #address-cells = <1>; #size-cells = <0>; - status = "disabled"; + status = "disable"; }; pmc { @@ -167,7 +167,7 @@ reg = <0x7000e400 0x400>; }; - memory-controller { + mc { compatible = "nvidia,tegra30-mc"; reg = <0x7000f000 0x010 0x7000f03c 0x1b4 @@ -201,35 +201,35 @@ compatible = "nvidia,tegra30-i2s"; reg = <0x70080300 0x100>; nvidia,ahub-cif-ids = <4 4>; - status = "disabled"; + status = "disable"; }; tegra_i2s1: i2s@70080400 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080400 0x100>; nvidia,ahub-cif-ids = <5 5>; - status = "disabled"; + status = "disable"; }; tegra_i2s2: i2s@70080500 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080500 0x100>; nvidia,ahub-cif-ids = <6 6>; - status = "disabled"; + status = "disable"; }; tegra_i2s3: i2s@70080600 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080600 0x100>; nvidia,ahub-cif-ids = <7 7>; - status = "disabled"; + status = "disable"; }; tegra_i2s4: i2s@70080700 { compatible = "nvidia,tegra30-i2s"; reg = <0x70080700 0x100>; nvidia,ahub-cif-ids = <8 8>; - status = "disabled"; + status = "disable"; }; }; @@ -237,28 +237,28 @@ compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000000 0x200>; interrupts = <0 14 0x04>; - status = "disabled"; + status = "disable"; }; sdhci@78000200 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000200 0x200>; interrupts = <0 15 0x04>; - status = "disabled"; + status = "disable"; }; sdhci@78000400 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000400 0x200>; interrupts = <0 19 0x04>; - status = "disabled"; + status = "disable"; }; sdhci@78000600 { compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci"; reg = <0x78000600 0x200>; interrupts = <0 31 0x04>; - status = "disabled"; + status = "disable"; }; pmu { diff --git a/trunk/arch/arm/kernel/irq.c b/trunk/arch/arm/kernel/irq.c index 16cedb42c0c3..8349d4e97e2b 100644 --- a/trunk/arch/arm/kernel/irq.c +++ b/trunk/arch/arm/kernel/irq.c @@ -40,6 +40,13 @@ #include #include +/* + * No architecture-specific irq_finish function defined in arm/arch/irqs.h. + */ +#ifndef irq_finish +#define irq_finish(irq) do { } while (0) +#endif + unsigned long irq_err_count; int arch_show_interrupts(struct seq_file *p, int prec) @@ -78,6 +85,9 @@ void handle_IRQ(unsigned int irq, struct pt_regs *regs) generic_handle_irq(irq); } + /* AT91 specific workaround */ + irq_finish(irq); + irq_exit(); set_irq_regs(old_regs); } diff --git a/trunk/arch/arm/mach-at91/Kconfig b/trunk/arch/arm/mach-at91/Kconfig index c8050b14e615..19505c0a3f01 100644 --- a/trunk/arch/arm/mach-at91/Kconfig +++ b/trunk/arch/arm/mach-at91/Kconfig @@ -29,16 +29,12 @@ comment "Atmel AT91 Processor" config SOC_AT91SAM9 bool select CPU_ARM926T - select MULTI_IRQ_HANDLER - select SPARSE_IRQ select AT91_SAM9_TIME select AT91_SAM9_SMC config SOC_AT91RM9200 bool "AT91RM9200" select CPU_ARM920T - select MULTI_IRQ_HANDLER - select SPARSE_IRQ select GENERIC_CLOCKEVENTS select HAVE_AT91_DBGU0 @@ -144,8 +140,6 @@ config ARCH_AT91SAM9G45 config ARCH_AT91X40 bool "AT91x40" depends on !MMU - select MULTI_IRQ_HANDLER - select SPARSE_IRQ select ARCH_USES_GETTIMEOFFSET endchoice diff --git a/trunk/arch/arm/mach-at91/at91rm9200.c b/trunk/arch/arm/mach-at91/at91rm9200.c index 6f50c6722276..26917687fc30 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200.c +++ b/trunk/arch/arm/mach-at91/at91rm9200.c @@ -17,7 +17,6 @@ #include #include #include -#include #include #include #include diff --git a/trunk/arch/arm/mach-at91/at91rm9200_devices.c b/trunk/arch/arm/mach-at91/at91rm9200_devices.c index 01fb7325fecc..e6b7d0533dd7 100644 --- a/trunk/arch/arm/mach-at91/at91rm9200_devices.c +++ b/trunk/arch/arm/mach-at91/at91rm9200_devices.c @@ -41,8 +41,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_UHP, + .start = AT91RM9200_ID_UHP, + .end = AT91RM9200_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -94,8 +94,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_UDP, + .start = AT91RM9200_ID_UDP, + .end = AT91RM9200_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -145,8 +145,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_EMAC, + .start = AT91RM9200_ID_EMAC, + .end = AT91RM9200_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_MCI, + .start = AT91RM9200_ID_MCI, + .end = AT91RM9200_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -488,8 +488,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TWI, + .start = AT91RM9200_ID_TWI, + .end = AT91RM9200_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -532,8 +532,8 @@ static struct resource spi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_SPI, + .start = AT91RM9200_ID_SPI, + .end = AT91RM9200_ID_SPI, .flags = IORESOURCE_IRQ, }, }; @@ -598,18 +598,18 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC0, + .start = AT91RM9200_ID_TC0, + .end = AT91RM9200_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC1, + .start = AT91RM9200_ID_TC1, + .end = AT91RM9200_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC2, + .start = AT91RM9200_ID_TC2, + .end = AT91RM9200_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -628,18 +628,18 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC3, + .start = AT91RM9200_ID_TC3, + .end = AT91RM9200_ID_TC3, .flags = IORESOURCE_IRQ, }, [2] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC4, + .start = AT91RM9200_ID_TC4, + .end = AT91RM9200_ID_TC4, .flags = IORESOURCE_IRQ, }, [3] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_TC5, + .start = AT91RM9200_ID_TC5, + .end = AT91RM9200_ID_TC5, .flags = IORESOURCE_IRQ, }, }; @@ -673,8 +673,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -729,8 +729,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC0, + .start = AT91RM9200_ID_SSC0, + .end = AT91RM9200_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -771,8 +771,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC1, + .start = AT91RM9200_ID_SSC1, + .end = AT91RM9200_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -813,8 +813,8 @@ static struct resource ssc2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_SSC2, + .start = AT91RM9200_ID_SSC2, + .end = AT91RM9200_ID_SSC2, .flags = IORESOURCE_IRQ, }, }; @@ -897,8 +897,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -935,8 +935,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_US0, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_US0, + .start = AT91RM9200_ID_US0, + .end = AT91RM9200_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -984,8 +984,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_US1, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_US1, + .start = AT91RM9200_ID_US1, + .end = AT91RM9200_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1035,8 +1035,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_US2, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_US2, + .start = AT91RM9200_ID_US2, + .end = AT91RM9200_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1078,8 +1078,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91RM9200_ID_US3, - .end = NR_IRQS_LEGACY + AT91RM9200_ID_US3, + .start = AT91RM9200_ID_US3, + .end = AT91RM9200_ID_US3, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-at91/at91sam9260.c b/trunk/arch/arm/mach-at91/at91sam9260.c index 30c7f26a4668..2b1e438ed878 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260.c +++ b/trunk/arch/arm/mach-at91/at91sam9260.c @@ -20,7 +20,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-at91/at91sam9260_devices.c b/trunk/arch/arm/mach-at91/at91sam9260_devices.c index 7b9c2ba396ed..0ded951f785a 100644 --- a/trunk/arch/arm/mach-at91/at91sam9260_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9260_devices.c @@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UHP, + .start = AT91SAM9260_ID_UHP, + .end = AT91SAM9260_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -98,8 +98,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_UDP, + .start = AT91SAM9260_ID_UDP, + .end = AT91SAM9260_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -149,8 +149,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_EMAC, + .start = AT91SAM9260_ID_EMAC, + .end = AT91SAM9260_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -223,8 +223,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .start = AT91SAM9260_ID_MCI, + .end = AT91SAM9260_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -305,8 +305,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_MCI, + .start = AT91SAM9260_ID_MCI, + .end = AT91SAM9260_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -496,8 +496,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TWI, + .start = AT91SAM9260_ID_TWI, + .end = AT91SAM9260_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -540,8 +540,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI0, + .start = AT91SAM9260_ID_SPI0, + .end = AT91SAM9260_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -566,8 +566,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SPI1, + .start = AT91SAM9260_ID_SPI1, + .end = AT91SAM9260_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -652,18 +652,18 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC0, + .start = AT91SAM9260_ID_TC0, + .end = AT91SAM9260_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC1, + .start = AT91SAM9260_ID_TC1, + .end = AT91SAM9260_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC2, + .start = AT91SAM9260_ID_TC2, + .end = AT91SAM9260_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -682,18 +682,18 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC3, + .start = AT91SAM9260_ID_TC3, + .end = AT91SAM9260_ID_TC3, .flags = IORESOURCE_IRQ, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC4, + .start = AT91SAM9260_ID_TC4, + .end = AT91SAM9260_ID_TC4, .flags = IORESOURCE_IRQ, }, [3] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_TC5, + .start = AT91SAM9260_ID_TC5, + .end = AT91SAM9260_ID_TC5, .flags = IORESOURCE_IRQ, }, }; @@ -807,8 +807,8 @@ static struct resource ssc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_SSC, + .start = AT91SAM9260_ID_SSC, + .end = AT91SAM9260_ID_SSC, .flags = IORESOURCE_IRQ, }, }; @@ -882,8 +882,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -920,8 +920,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US0, + .start = AT91SAM9260_ID_US0, + .end = AT91SAM9260_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -971,8 +971,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US1, + .start = AT91SAM9260_ID_US1, + .end = AT91SAM9260_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1014,8 +1014,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US2, + .start = AT91SAM9260_ID_US2, + .end = AT91SAM9260_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1057,8 +1057,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US3, + .start = AT91SAM9260_ID_US3, + .end = AT91SAM9260_ID_US3, .flags = IORESOURCE_IRQ, }, }; @@ -1100,8 +1100,8 @@ static struct resource uart4_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US4, + .start = AT91SAM9260_ID_US4, + .end = AT91SAM9260_ID_US4, .flags = IORESOURCE_IRQ, }, }; @@ -1138,8 +1138,8 @@ static struct resource uart5_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_US5, + .start = AT91SAM9260_ID_US5, + .end = AT91SAM9260_ID_US5, .flags = IORESOURCE_IRQ, }, }; @@ -1357,8 +1357,8 @@ static struct resource adc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, - .end = NR_IRQS_LEGACY + AT91SAM9260_ID_ADC, + .start = AT91SAM9260_ID_ADC, + .end = AT91SAM9260_ID_ADC, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-at91/at91sam9261.c b/trunk/arch/arm/mach-at91/at91sam9261.c index f40762c5fede..c77d503d09d1 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261.c +++ b/trunk/arch/arm/mach-at91/at91sam9261.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-at91/at91sam9261_devices.c b/trunk/arch/arm/mach-at91/at91sam9261_devices.c index 8df5c1bdff92..9295e90b08ff 100644 --- a/trunk/arch/arm/mach-at91/at91sam9261_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9261_devices.c @@ -45,8 +45,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UHP, + .start = AT91SAM9261_ID_UHP, + .end = AT91SAM9261_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -98,8 +98,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_UDP, + .start = AT91SAM9261_ID_UDP, + .end = AT91SAM9261_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -148,8 +148,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_MCI, + .start = AT91SAM9261_ID_MCI, + .end = AT91SAM9261_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -310,8 +310,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TWI, + .start = AT91SAM9261_ID_TWI, + .end = AT91SAM9261_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -354,8 +354,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI0, + .start = AT91SAM9261_ID_SPI0, + .end = AT91SAM9261_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -380,8 +380,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SPI1, + .start = AT91SAM9261_ID_SPI1, + .end = AT91SAM9261_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -468,8 +468,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_LCDC, + .start = AT91SAM9261_ID_LCDC, + .end = AT91SAM9261_ID_LCDC, .flags = IORESOURCE_IRQ, }, #if defined(CONFIG_FB_INTSRAM) @@ -566,18 +566,18 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC0, + .start = AT91SAM9261_ID_TC0, + .end = AT91SAM9261_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC1, + .start = AT91SAM9261_ID_TC1, + .end = AT91SAM9261_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_TC2, + .start = AT91SAM9261_ID_TC2, + .end = AT91SAM9261_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -689,8 +689,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC0, + .start = AT91SAM9261_ID_SSC0, + .end = AT91SAM9261_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -731,8 +731,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC1, + .start = AT91SAM9261_ID_SSC1, + .end = AT91SAM9261_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -773,8 +773,8 @@ static struct resource ssc2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_SSC2, + .start = AT91SAM9261_ID_SSC2, + .end = AT91SAM9261_ID_SSC2, .flags = IORESOURCE_IRQ, }, }; @@ -857,8 +857,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -895,8 +895,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US0, + .start = AT91SAM9261_ID_US0, + .end = AT91SAM9261_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -938,8 +938,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US1, + .start = AT91SAM9261_ID_US1, + .end = AT91SAM9261_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -981,8 +981,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, - .end = NR_IRQS_LEGACY + AT91SAM9261_ID_US2, + .start = AT91SAM9261_ID_US2, + .end = AT91SAM9261_ID_US2, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-at91/at91sam9263.c b/trunk/arch/arm/mach-at91/at91sam9263.c index 84b38105231e..ed91c7e9f7c2 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263.c +++ b/trunk/arch/arm/mach-at91/at91sam9263.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-at91/at91sam9263_devices.c b/trunk/arch/arm/mach-at91/at91sam9263_devices.c index eb6bbf86fb9f..175e0009eaa9 100644 --- a/trunk/arch/arm/mach-at91/at91sam9263_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9263_devices.c @@ -44,8 +44,8 @@ static struct resource usbh_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UHP, + .start = AT91SAM9263_ID_UHP, + .end = AT91SAM9263_ID_UHP, .flags = IORESOURCE_IRQ, }, }; @@ -104,8 +104,8 @@ static struct resource udc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_UDP, + .start = AT91SAM9263_ID_UDP, + .end = AT91SAM9263_ID_UDP, .flags = IORESOURCE_IRQ, }, }; @@ -155,8 +155,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_EMAC, + .start = AT91SAM9263_ID_EMAC, + .end = AT91SAM9263_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -229,8 +229,8 @@ static struct resource mmc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI0, + .start = AT91SAM9263_ID_MCI0, + .end = AT91SAM9263_ID_MCI0, .flags = IORESOURCE_IRQ, }, }; @@ -254,8 +254,8 @@ static struct resource mmc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_MCI1, + .start = AT91SAM9263_ID_MCI1, + .end = AT91SAM9263_ID_MCI1, .flags = IORESOURCE_IRQ, }, }; @@ -567,8 +567,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TWI, + .start = AT91SAM9263_ID_TWI, + .end = AT91SAM9263_ID_TWI, .flags = IORESOURCE_IRQ, }, }; @@ -611,8 +611,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI0, + .start = AT91SAM9263_ID_SPI0, + .end = AT91SAM9263_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -637,8 +637,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SPI1, + .start = AT91SAM9263_ID_SPI1, + .end = AT91SAM9263_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -725,8 +725,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_AC97C, + .start = AT91SAM9263_ID_AC97C, + .end = AT91SAM9263_ID_AC97C, .flags = IORESOURCE_IRQ, }, }; @@ -776,8 +776,8 @@ static struct resource can_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_CAN, + .start = AT91SAM9263_ID_CAN, + .end = AT91SAM9263_ID_CAN, .flags = IORESOURCE_IRQ, }, }; @@ -816,8 +816,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_LCDC, + .start = AT91SAM9263_ID_LCDC, + .end = AT91SAM9263_ID_LCDC, .flags = IORESOURCE_IRQ, }, }; @@ -883,8 +883,8 @@ struct resource isi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_ISI, + .start = AT91SAM9263_ID_ISI, + .end = AT91SAM9263_ID_ISI, .flags = IORESOURCE_IRQ, }, }; @@ -940,8 +940,8 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_TCB, + .start = AT91SAM9263_ID_TCB, + .end = AT91SAM9263_ID_TCB, .flags = IORESOURCE_IRQ, }, }; @@ -1108,8 +1108,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_PWMC, + .start = AT91SAM9263_ID_PWMC, + .end = AT91SAM9263_ID_PWMC, .flags = IORESOURCE_IRQ, }, }; @@ -1161,8 +1161,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC0, + .start = AT91SAM9263_ID_SSC0, + .end = AT91SAM9263_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -1203,8 +1203,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_SSC1, + .start = AT91SAM9263_ID_SSC1, + .end = AT91SAM9263_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -1284,8 +1284,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -1322,8 +1322,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US0, + .start = AT91SAM9263_ID_US0, + .end = AT91SAM9263_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -1365,8 +1365,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US1, + .start = AT91SAM9263_ID_US1, + .end = AT91SAM9263_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1408,8 +1408,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, - .end = NR_IRQS_LEGACY + AT91SAM9263_ID_US2, + .start = AT91SAM9263_ID_US2, + .end = AT91SAM9263_ID_US2, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-at91/at91sam926x_time.c b/trunk/arch/arm/mach-at91/at91sam926x_time.c index ffc0957d7623..a94758b42737 100644 --- a/trunk/arch/arm/mach-at91/at91sam926x_time.c +++ b/trunk/arch/arm/mach-at91/at91sam926x_time.c @@ -137,7 +137,7 @@ static struct irqaction at91sam926x_pit_irq = { .name = "at91_tick", .flags = IRQF_SHARED | IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, .handler = at91sam926x_pit_interrupt, - .irq = NR_IRQS_LEGACY + AT91_ID_SYS, + .irq = AT91_ID_SYS, }; static void at91sam926x_pit_reset(void) diff --git a/trunk/arch/arm/mach-at91/at91sam9g45.c b/trunk/arch/arm/mach-at91/at91sam9g45.c index 977127368a7d..4792682d52b9 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45.c @@ -18,7 +18,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c index 40fb79df2de0..933fc9afe7d0 100644 --- a/trunk/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9g45_devices.c @@ -53,8 +53,8 @@ static struct resource hdmac_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_DMA, + .start = AT91SAM9G45_ID_DMA, + .end = AT91SAM9G45_ID_DMA, .flags = IORESOURCE_IRQ, }, }; @@ -94,8 +94,8 @@ static struct resource usbh_ohci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .start = AT91SAM9G45_ID_UHPHS, + .end = AT91SAM9G45_ID_UHPHS, .flags = IORESOURCE_IRQ, }, }; @@ -156,8 +156,8 @@ static struct resource usbh_ehci_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UHPHS, + .start = AT91SAM9G45_ID_UHPHS, + .end = AT91SAM9G45_ID_UHPHS, .flags = IORESOURCE_IRQ, }, }; @@ -213,8 +213,8 @@ static struct resource usba_udc_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_UDPHS, + .start = AT91SAM9G45_ID_UDPHS, + .end = AT91SAM9G45_ID_UDPHS, .flags = IORESOURCE_IRQ, }, }; @@ -296,8 +296,8 @@ static struct resource eth_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_EMAC, + .start = AT91SAM9G45_ID_EMAC, + .end = AT91SAM9G45_ID_EMAC, .flags = IORESOURCE_IRQ, }, }; @@ -370,8 +370,8 @@ static struct resource mmc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI0, + .start = AT91SAM9G45_ID_MCI0, + .end = AT91SAM9G45_ID_MCI0, .flags = IORESOURCE_IRQ, }, }; @@ -395,8 +395,8 @@ static struct resource mmc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_MCI1, + .start = AT91SAM9G45_ID_MCI1, + .end = AT91SAM9G45_ID_MCI1, .flags = IORESOURCE_IRQ, }, }; @@ -645,8 +645,8 @@ static struct resource twi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI0, + .start = AT91SAM9G45_ID_TWI0, + .end = AT91SAM9G45_ID_TWI0, .flags = IORESOURCE_IRQ, }, }; @@ -665,8 +665,8 @@ static struct resource twi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TWI1, + .start = AT91SAM9G45_ID_TWI1, + .end = AT91SAM9G45_ID_TWI1, .flags = IORESOURCE_IRQ, }, }; @@ -720,8 +720,8 @@ static struct resource spi0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI0, + .start = AT91SAM9G45_ID_SPI0, + .end = AT91SAM9G45_ID_SPI0, .flags = IORESOURCE_IRQ, }, }; @@ -746,8 +746,8 @@ static struct resource spi1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SPI1, + .start = AT91SAM9G45_ID_SPI1, + .end = AT91SAM9G45_ID_SPI1, .flags = IORESOURCE_IRQ, }, }; @@ -834,8 +834,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_AC97C, + .start = AT91SAM9G45_ID_AC97C, + .end = AT91SAM9G45_ID_AC97C, .flags = IORESOURCE_IRQ, }, }; @@ -887,8 +887,8 @@ struct resource isi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_ISI, + .start = AT91SAM9G45_ID_ISI, + .end = AT91SAM9G45_ID_ISI, .flags = IORESOURCE_IRQ, }, }; @@ -979,8 +979,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_LCDC, + .start = AT91SAM9G45_ID_LCDC, + .end = AT91SAM9G45_ID_LCDC, .flags = IORESOURCE_IRQ, }, }; @@ -1054,8 +1054,8 @@ static struct resource tcb0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .start = AT91SAM9G45_ID_TCB, + .end = AT91SAM9G45_ID_TCB, .flags = IORESOURCE_IRQ, }, }; @@ -1075,8 +1075,8 @@ static struct resource tcb1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TCB, + .start = AT91SAM9G45_ID_TCB, + .end = AT91SAM9G45_ID_TCB, .flags = IORESOURCE_IRQ, }, }; @@ -1110,8 +1110,8 @@ static struct resource rtc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -1147,8 +1147,8 @@ static struct resource tsadcc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .start = AT91SAM9G45_ID_TSC, + .end = AT91SAM9G45_ID_TSC, .flags = IORESOURCE_IRQ, } }; @@ -1197,8 +1197,8 @@ static struct resource adc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_TSC, + .start = AT91SAM9G45_ID_TSC, + .end = AT91SAM9G45_ID_TSC, .flags = IORESOURCE_IRQ, } }; @@ -1400,8 +1400,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_PWMC, + .start = AT91SAM9G45_ID_PWMC, + .end = AT91SAM9G45_ID_PWMC, .flags = IORESOURCE_IRQ, }, }; @@ -1453,8 +1453,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC0, + .start = AT91SAM9G45_ID_SSC0, + .end = AT91SAM9G45_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -1495,8 +1495,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_SSC1, + .start = AT91SAM9G45_ID_SSC1, + .end = AT91SAM9G45_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -1575,8 +1575,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -1613,8 +1613,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US0, + .start = AT91SAM9G45_ID_US0, + .end = AT91SAM9G45_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -1656,8 +1656,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US1, + .start = AT91SAM9G45_ID_US1, + .end = AT91SAM9G45_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1699,8 +1699,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US2, + .start = AT91SAM9G45_ID_US2, + .end = AT91SAM9G45_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1742,8 +1742,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, - .end = NR_IRQS_LEGACY + AT91SAM9G45_ID_US3, + .start = AT91SAM9G45_ID_US3, + .end = AT91SAM9G45_ID_US3, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-at91/at91sam9rl.c b/trunk/arch/arm/mach-at91/at91sam9rl.c index 72ce50a50de5..e420085a57ef 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl.c @@ -19,7 +19,6 @@ #include #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-at91/at91sam9rl_devices.c b/trunk/arch/arm/mach-at91/at91sam9rl_devices.c index f09fff932172..9c0b1481a9a7 100644 --- a/trunk/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/trunk/arch/arm/mach-at91/at91sam9rl_devices.c @@ -41,8 +41,8 @@ static struct resource hdmac_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_DMA, + .start = AT91SAM9RL_ID_DMA, + .end = AT91SAM9RL_ID_DMA, .flags = IORESOURCE_IRQ, }, }; @@ -84,8 +84,8 @@ static struct resource usba_udc_resources[] = { .flags = IORESOURCE_MEM, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_UDPHS, + .start = AT91SAM9RL_ID_UDPHS, + .end = AT91SAM9RL_ID_UDPHS, .flags = IORESOURCE_IRQ, }, }; @@ -172,8 +172,8 @@ static struct resource mmc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_MCI, + .start = AT91SAM9RL_ID_MCI, + .end = AT91SAM9RL_ID_MCI, .flags = IORESOURCE_IRQ, }, }; @@ -339,8 +339,8 @@ static struct resource twi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TWI0, + .start = AT91SAM9RL_ID_TWI0, + .end = AT91SAM9RL_ID_TWI0, .flags = IORESOURCE_IRQ, }, }; @@ -383,8 +383,8 @@ static struct resource spi_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SPI, + .start = AT91SAM9RL_ID_SPI, + .end = AT91SAM9RL_ID_SPI, .flags = IORESOURCE_IRQ, }, }; @@ -452,8 +452,8 @@ static struct resource ac97_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_AC97C, + .start = AT91SAM9RL_ID_AC97C, + .end = AT91SAM9RL_ID_AC97C, .flags = IORESOURCE_IRQ, }, }; @@ -507,8 +507,8 @@ static struct resource lcdc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_LCDC, + .start = AT91SAM9RL_ID_LCDC, + .end = AT91SAM9RL_ID_LCDC, .flags = IORESOURCE_IRQ, }, }; @@ -574,18 +574,18 @@ static struct resource tcb_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC0, + .start = AT91SAM9RL_ID_TC0, + .end = AT91SAM9RL_ID_TC0, .flags = IORESOURCE_IRQ, }, [2] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC1, + .start = AT91SAM9RL_ID_TC1, + .end = AT91SAM9RL_ID_TC1, .flags = IORESOURCE_IRQ, }, [3] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TC2, + .start = AT91SAM9RL_ID_TC2, + .end = AT91SAM9RL_ID_TC2, .flags = IORESOURCE_IRQ, }, }; @@ -621,8 +621,8 @@ static struct resource tsadcc_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_TSC, + .start = AT91SAM9RL_ID_TSC, + .end = AT91SAM9RL_ID_TSC, .flags = IORESOURCE_IRQ, } }; @@ -768,8 +768,8 @@ static struct resource pwm_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_PWMC, + .start = AT91SAM9RL_ID_PWMC, + .end = AT91SAM9RL_ID_PWMC, .flags = IORESOURCE_IRQ, }, }; @@ -821,8 +821,8 @@ static struct resource ssc0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC0, + .start = AT91SAM9RL_ID_SSC0, + .end = AT91SAM9RL_ID_SSC0, .flags = IORESOURCE_IRQ, }, }; @@ -863,8 +863,8 @@ static struct resource ssc1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_SSC1, + .start = AT91SAM9RL_ID_SSC1, + .end = AT91SAM9RL_ID_SSC1, .flags = IORESOURCE_IRQ, }, }; @@ -943,8 +943,8 @@ static struct resource dbgu_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91_ID_SYS, - .end = NR_IRQS_LEGACY + AT91_ID_SYS, + .start = AT91_ID_SYS, + .end = AT91_ID_SYS, .flags = IORESOURCE_IRQ, }, }; @@ -981,8 +981,8 @@ static struct resource uart0_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US0, + .start = AT91SAM9RL_ID_US0, + .end = AT91SAM9RL_ID_US0, .flags = IORESOURCE_IRQ, }, }; @@ -1032,8 +1032,8 @@ static struct resource uart1_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US1, + .start = AT91SAM9RL_ID_US1, + .end = AT91SAM9RL_ID_US1, .flags = IORESOURCE_IRQ, }, }; @@ -1075,8 +1075,8 @@ static struct resource uart2_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US2, + .start = AT91SAM9RL_ID_US2, + .end = AT91SAM9RL_ID_US2, .flags = IORESOURCE_IRQ, }, }; @@ -1118,8 +1118,8 @@ static struct resource uart3_resources[] = { .flags = IORESOURCE_MEM, }, [1] = { - .start = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, - .end = NR_IRQS_LEGACY + AT91SAM9RL_ID_US3, + .start = AT91SAM9RL_ID_US3, + .end = AT91SAM9RL_ID_US3, .flags = IORESOURCE_IRQ, }, }; diff --git a/trunk/arch/arm/mach-at91/at91sam9x5.c b/trunk/arch/arm/mach-at91/at91sam9x5.c index 477cf9d06672..1b144b4d3ce1 100644 --- a/trunk/arch/arm/mach-at91/at91sam9x5.c +++ b/trunk/arch/arm/mach-at91/at91sam9x5.c @@ -312,6 +312,8 @@ static void __init at91sam9x5_map_io(void) void __init at91sam9x5_initialize(void) { + at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0); + /* Register GPIO subsystem (using DT) */ at91_gpio_init(NULL, 0); } @@ -319,9 +321,47 @@ void __init at91sam9x5_initialize(void) /* -------------------------------------------------------------------- * Interrupt initialization * -------------------------------------------------------------------- */ +/* + * The default interrupt priority levels (0 = lowest, 7 = highest). + */ +static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = { + 7, /* Advanced Interrupt Controller (FIQ) */ + 7, /* System Peripherals */ + 1, /* Parallel IO Controller A and B */ + 1, /* Parallel IO Controller C and D */ + 4, /* Soft Modem */ + 5, /* USART 0 */ + 5, /* USART 1 */ + 5, /* USART 2 */ + 5, /* USART 3 */ + 6, /* Two-Wire Interface 0 */ + 6, /* Two-Wire Interface 1 */ + 6, /* Two-Wire Interface 2 */ + 0, /* Multimedia Card Interface 0 */ + 5, /* Serial Peripheral Interface 0 */ + 5, /* Serial Peripheral Interface 1 */ + 5, /* UART 0 */ + 5, /* UART 1 */ + 0, /* Timer Counter 0, 1, 2, 3, 4 and 5 */ + 0, /* Pulse Width Modulation Controller */ + 0, /* ADC Controller */ + 0, /* DMA Controller 0 */ + 0, /* DMA Controller 1 */ + 2, /* USB Host High Speed port */ + 2, /* USB Device High speed port */ + 3, /* Ethernet MAC 0 */ + 3, /* LDC Controller or Image Sensor Interface */ + 0, /* Multimedia Card Interface 1 */ + 3, /* Ethernet MAC 1 */ + 4, /* Synchronous Serial Interface */ + 4, /* CAN Controller 0 */ + 4, /* CAN Controller 1 */ + 0, /* Advanced Interrupt Controller (IRQ0) */ +}; struct at91_init_soc __initdata at91sam9x5_soc = { .map_io = at91sam9x5_map_io, + .default_irq_priority = at91sam9x5_default_irq_priority, .register_clocks = at91sam9x5_register_clocks, .init = at91sam9x5_initialize, }; diff --git a/trunk/arch/arm/mach-at91/at91x40.c b/trunk/arch/arm/mach-at91/at91x40.c index 46090e642d8e..d62fe090d814 100644 --- a/trunk/arch/arm/mach-at91/at91x40.c +++ b/trunk/arch/arm/mach-at91/at91x40.c @@ -13,12 +13,10 @@ #include #include #include -#include #include #include #include #include -#include #include #include #include "generic.h" diff --git a/trunk/arch/arm/mach-at91/board-1arm.c b/trunk/arch/arm/mach-at91/board-1arm.c index 22d8856094f1..271f994314a4 100644 --- a/trunk/arch/arm/mach-at91/board-1arm.c +++ b/trunk/arch/arm/mach-at91/board-1arm.c @@ -36,7 +36,6 @@ #include #include -#include #include "generic.h" @@ -92,7 +91,6 @@ MACHINE_START(ONEARM, "Ajeco 1ARM single board computer") /* Maintainer: Lennert Buytenhek */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = onearm_init_early, .init_irq = at91_init_irq_default, .init_machine = onearm_board_init, diff --git a/trunk/arch/arm/mach-at91/board-afeb-9260v1.c b/trunk/arch/arm/mach-at91/board-afeb-9260v1.c index de7be1931817..b7d8aa7b81e6 100644 --- a/trunk/arch/arm/mach-at91/board-afeb-9260v1.c +++ b/trunk/arch/arm/mach-at91/board-afeb-9260v1.c @@ -44,7 +44,6 @@ #include #include -#include #include "generic.h" @@ -213,7 +212,6 @@ MACHINE_START(AFEB9260, "Custom afeb9260 board") /* Maintainer: Sergey Lapin */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = afeb9260_init_early, .init_irq = at91_init_irq_default, .init_machine = afeb9260_board_init, diff --git a/trunk/arch/arm/mach-at91/board-cam60.c b/trunk/arch/arm/mach-at91/board-cam60.c index 477e708497bc..29d3ef0a50fb 100644 --- a/trunk/arch/arm/mach-at91/board-cam60.c +++ b/trunk/arch/arm/mach-at91/board-cam60.c @@ -39,7 +39,6 @@ #include #include -#include #include #include "sam9_smc.h" @@ -189,7 +188,6 @@ MACHINE_START(CAM60, "KwikByte CAM60") /* Maintainer: KwikByte */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = cam60_init_early, .init_irq = at91_init_irq_default, .init_machine = cam60_board_init, diff --git a/trunk/arch/arm/mach-at91/board-carmeva.c b/trunk/arch/arm/mach-at91/board-carmeva.c index a5b002f32a61..44328a6d4609 100644 --- a/trunk/arch/arm/mach-at91/board-carmeva.c +++ b/trunk/arch/arm/mach-at91/board-carmeva.c @@ -36,7 +36,6 @@ #include #include -#include #include "generic.h" @@ -159,7 +158,6 @@ MACHINE_START(CARMEVA, "Carmeva") /* Maintainer: Conitec Datasystems */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = carmeva_init_early, .init_irq = at91_init_irq_default, .init_machine = carmeva_board_init, diff --git a/trunk/arch/arm/mach-at91/board-cpu9krea.c b/trunk/arch/arm/mach-at91/board-cpu9krea.c index ecbc13b594de..69951ec7dbf3 100644 --- a/trunk/arch/arm/mach-at91/board-cpu9krea.c +++ b/trunk/arch/arm/mach-at91/board-cpu9krea.c @@ -41,7 +41,6 @@ #include #include -#include #include #include #include @@ -377,7 +376,6 @@ MACHINE_START(CPUAT9G20, "Eukrea CPU9G20") /* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = cpu9krea_init_early, .init_irq = at91_init_irq_default, .init_machine = cpu9krea_board_init, diff --git a/trunk/arch/arm/mach-at91/board-cpuat91.c b/trunk/arch/arm/mach-at91/board-cpuat91.c index 2e6d043c82f2..895cf2dba612 100644 --- a/trunk/arch/arm/mach-at91/board-cpuat91.c +++ b/trunk/arch/arm/mach-at91/board-cpuat91.c @@ -37,7 +37,6 @@ #include #include -#include #include #include #include @@ -179,7 +178,6 @@ MACHINE_START(CPUAT91, "Eukrea") /* Maintainer: Eric Benard - EUKREA Electromatique */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = cpuat91_init_early, .init_irq = at91_init_irq_default, .init_machine = cpuat91_board_init, diff --git a/trunk/arch/arm/mach-at91/board-csb337.c b/trunk/arch/arm/mach-at91/board-csb337.c index 462bc319cbc5..cd813361cd26 100644 --- a/trunk/arch/arm/mach-at91/board-csb337.c +++ b/trunk/arch/arm/mach-at91/board-csb337.c @@ -39,7 +39,6 @@ #include #include -#include #include "generic.h" @@ -253,7 +252,6 @@ MACHINE_START(CSB337, "Cogent CSB337") /* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = csb337_init_early, .init_irq = at91_init_irq_default, .init_machine = csb337_board_init, diff --git a/trunk/arch/arm/mach-at91/board-csb637.c b/trunk/arch/arm/mach-at91/board-csb637.c index 872871ab1160..7c8b05a57d7f 100644 --- a/trunk/arch/arm/mach-at91/board-csb637.c +++ b/trunk/arch/arm/mach-at91/board-csb637.c @@ -36,7 +36,6 @@ #include #include -#include #include "generic.h" @@ -134,7 +133,6 @@ MACHINE_START(CSB637, "Cogent CSB637") /* Maintainer: Bill Gatliff */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = csb637_init_early, .init_irq = at91_init_irq_default, .init_machine = csb637_board_init, diff --git a/trunk/arch/arm/mach-at91/board-dt.c b/trunk/arch/arm/mach-at91/board-dt.c index e8f45c4e0ea8..a1fce05aa7a5 100644 --- a/trunk/arch/arm/mach-at91/board-dt.c +++ b/trunk/arch/arm/mach-at91/board-dt.c @@ -16,7 +16,6 @@ #include #include -#include #include #include @@ -54,7 +53,6 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM (Device Tree)") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = at91_dt_initialize, .init_irq = at91_dt_init_irq, .init_machine = at91_dt_device_init, diff --git a/trunk/arch/arm/mach-at91/board-eb01.c b/trunk/arch/arm/mach-at91/board-eb01.c index 01f66e99ece7..d2023f27c652 100644 --- a/trunk/arch/arm/mach-at91/board-eb01.c +++ b/trunk/arch/arm/mach-at91/board-eb01.c @@ -28,7 +28,6 @@ #include #include #include -#include #include "generic.h" static void __init at91eb01_init_irq(void) @@ -44,7 +43,6 @@ static void __init at91eb01_init_early(void) MACHINE_START(AT91EB01, "Atmel AT91 EB01") /* Maintainer: Greg Ungerer */ .timer = &at91x40_timer, - .handle_irq = at91_aic_handle_irq, .init_early = at91eb01_init_early, .init_irq = at91eb01_init_irq, MACHINE_END diff --git a/trunk/arch/arm/mach-at91/board-eb9200.c b/trunk/arch/arm/mach-at91/board-eb9200.c index d1e1f3fc0a47..bd1017297989 100644 --- a/trunk/arch/arm/mach-at91/board-eb9200.c +++ b/trunk/arch/arm/mach-at91/board-eb9200.c @@ -36,7 +36,6 @@ #include #include -#include #include "generic.h" @@ -119,7 +118,6 @@ static void __init eb9200_board_init(void) MACHINE_START(ATEB9200, "Embest ATEB9200") .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = eb9200_init_early, .init_irq = at91_init_irq_default, .init_machine = eb9200_board_init, diff --git a/trunk/arch/arm/mach-at91/board-ecbat91.c b/trunk/arch/arm/mach-at91/board-ecbat91.c index 9c24cb25707c..89cc3726a9ce 100644 --- a/trunk/arch/arm/mach-at91/board-ecbat91.c +++ b/trunk/arch/arm/mach-at91/board-ecbat91.c @@ -39,7 +39,6 @@ #include #include -#include #include "generic.h" @@ -171,7 +170,6 @@ MACHINE_START(ECBAT91, "emQbit's ECB_AT91") /* Maintainer: emQbit.com */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ecb_at91init_early, .init_irq = at91_init_irq_default, .init_machine = ecb_at91board_init, diff --git a/trunk/arch/arm/mach-at91/board-eco920.c b/trunk/arch/arm/mach-at91/board-eco920.c index 82bdfde3405f..558546cf63f4 100644 --- a/trunk/arch/arm/mach-at91/board-eco920.c +++ b/trunk/arch/arm/mach-at91/board-eco920.c @@ -25,7 +25,6 @@ #include #include -#include #include #include #include @@ -133,7 +132,6 @@ MACHINE_START(ECO920, "eco920") /* Maintainer: Sascha Hauer */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = eco920_init_early, .init_irq = at91_init_irq_default, .init_machine = eco920_board_init, diff --git a/trunk/arch/arm/mach-at91/board-flexibity.c b/trunk/arch/arm/mach-at91/board-flexibity.c index 6cc83a87d77c..47658f78105d 100644 --- a/trunk/arch/arm/mach-at91/board-flexibity.c +++ b/trunk/arch/arm/mach-at91/board-flexibity.c @@ -34,7 +34,6 @@ #include #include -#include #include "generic.h" @@ -161,7 +160,6 @@ MACHINE_START(FLEXIBITY, "Flexibity Connect") /* Maintainer: Maxim Osipov */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = flexibity_init_early, .init_irq = at91_init_irq_default, .init_machine = flexibity_board_init, diff --git a/trunk/arch/arm/mach-at91/board-foxg20.c b/trunk/arch/arm/mach-at91/board-foxg20.c index 69ab1247ef81..33411e6ecb1f 100644 --- a/trunk/arch/arm/mach-at91/board-foxg20.c +++ b/trunk/arch/arm/mach-at91/board-foxg20.c @@ -42,7 +42,6 @@ #include #include -#include #include #include "sam9_smc.h" @@ -263,7 +262,6 @@ MACHINE_START(ACMENETUSFOXG20, "Acme Systems srl FOX Board G20") /* Maintainer: Sergio Tanzilli */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = foxg20_init_early, .init_irq = at91_init_irq_default, .init_machine = foxg20_board_init, diff --git a/trunk/arch/arm/mach-at91/board-gsia18s.c b/trunk/arch/arm/mach-at91/board-gsia18s.c index a9d5e78118c5..3e0dfa643a86 100644 --- a/trunk/arch/arm/mach-at91/board-gsia18s.c +++ b/trunk/arch/arm/mach-at91/board-gsia18s.c @@ -31,7 +31,6 @@ #include #include -#include #include #include #include @@ -576,7 +575,6 @@ static void __init gsia18s_board_init(void) MACHINE_START(GSIA18S, "GS_IA18_S") .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = gsia18s_init_early, .init_irq = at91_init_irq_default, .init_machine = gsia18s_board_init, diff --git a/trunk/arch/arm/mach-at91/board-kafa.c b/trunk/arch/arm/mach-at91/board-kafa.c index 64c1dbf88a07..f260657f32bc 100644 --- a/trunk/arch/arm/mach-at91/board-kafa.c +++ b/trunk/arch/arm/mach-at91/board-kafa.c @@ -35,7 +35,6 @@ #include #include -#include #include #include "generic.h" @@ -94,7 +93,6 @@ MACHINE_START(KAFA, "Sperry-Sun KAFA") /* Maintainer: Sergei Sharonov */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = kafa_init_early, .init_irq = at91_init_irq_default, .init_machine = kafa_board_init, diff --git a/trunk/arch/arm/mach-at91/board-kb9202.c b/trunk/arch/arm/mach-at91/board-kb9202.c index 5d96cb85175f..ba39db5482b9 100644 --- a/trunk/arch/arm/mach-at91/board-kb9202.c +++ b/trunk/arch/arm/mach-at91/board-kb9202.c @@ -37,7 +37,6 @@ #include #include -#include #include #include @@ -134,7 +133,6 @@ MACHINE_START(KB9200, "KB920x") /* Maintainer: KwikByte, Inc. */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = kb9202_init_early, .init_irq = at91_init_irq_default, .init_machine = kb9202_board_init, diff --git a/trunk/arch/arm/mach-at91/board-neocore926.c b/trunk/arch/arm/mach-at91/board-neocore926.c index 18103c5d993c..d2f4cc161766 100644 --- a/trunk/arch/arm/mach-at91/board-neocore926.c +++ b/trunk/arch/arm/mach-at91/board-neocore926.c @@ -45,7 +45,6 @@ #include #include -#include #include #include "sam9_smc.h" @@ -379,7 +378,6 @@ MACHINE_START(NEOCORE926, "ADENEO NEOCORE 926") /* Maintainer: ADENEO */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = neocore926_init_early, .init_irq = at91_init_irq_default, .init_machine = neocore926_board_init, diff --git a/trunk/arch/arm/mach-at91/board-pcontrol-g20.c b/trunk/arch/arm/mach-at91/board-pcontrol-g20.c index 9ca3e32c54cb..7fe638342421 100644 --- a/trunk/arch/arm/mach-at91/board-pcontrol-g20.c +++ b/trunk/arch/arm/mach-at91/board-pcontrol-g20.c @@ -30,7 +30,6 @@ #include #include -#include #include #include @@ -219,7 +218,6 @@ MACHINE_START(PCONTROL_G20, "PControl G20") /* Maintainer: pgsellmann@portner-elektronik.at */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = pcontrol_g20_init_early, .init_irq = at91_init_irq_default, .init_machine = pcontrol_g20_board_init, diff --git a/trunk/arch/arm/mach-at91/board-picotux200.c b/trunk/arch/arm/mach-at91/board-picotux200.c index 127065504508..b45c0a5d5ca7 100644 --- a/trunk/arch/arm/mach-at91/board-picotux200.c +++ b/trunk/arch/arm/mach-at91/board-picotux200.c @@ -38,7 +38,6 @@ #include #include -#include #include #include @@ -121,7 +120,6 @@ MACHINE_START(PICOTUX2XX, "picotux 200") /* Maintainer: Kleinhenz Elektronik GmbH */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = picotux200_init_early, .init_irq = at91_init_irq_default, .init_machine = picotux200_board_init, diff --git a/trunk/arch/arm/mach-at91/board-qil-a9260.c b/trunk/arch/arm/mach-at91/board-qil-a9260.c index bf351e285422..0c61bf0d272c 100644 --- a/trunk/arch/arm/mach-at91/board-qil-a9260.c +++ b/trunk/arch/arm/mach-at91/board-qil-a9260.c @@ -41,7 +41,6 @@ #include #include -#include #include #include @@ -259,7 +258,6 @@ MACHINE_START(QIL_A9260, "CALAO QIL_A9260") /* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-rm9200dk.c b/trunk/arch/arm/mach-at91/board-rm9200dk.c index cc2bf9796073..afd7a4713766 100644 --- a/trunk/arch/arm/mach-at91/board-rm9200dk.c +++ b/trunk/arch/arm/mach-at91/board-rm9200dk.c @@ -40,7 +40,6 @@ #include #include -#include #include #include @@ -224,7 +223,6 @@ MACHINE_START(AT91RM9200DK, "Atmel AT91RM9200-DK") /* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = dk_init_early, .init_irq = at91_init_irq_default, .init_machine = dk_board_init, diff --git a/trunk/arch/arm/mach-at91/board-rm9200ek.c b/trunk/arch/arm/mach-at91/board-rm9200ek.c index 62e19e64c9d3..2b15b8adec4c 100644 --- a/trunk/arch/arm/mach-at91/board-rm9200ek.c +++ b/trunk/arch/arm/mach-at91/board-rm9200ek.c @@ -40,7 +40,6 @@ #include #include -#include #include #include @@ -191,7 +190,6 @@ MACHINE_START(AT91RM9200EK, "Atmel AT91RM9200-EK") /* Maintainer: SAN People/Atmel */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-rsi-ews.c b/trunk/arch/arm/mach-at91/board-rsi-ews.c index c3b43aefdb75..24ab9be7510f 100644 --- a/trunk/arch/arm/mach-at91/board-rsi-ews.c +++ b/trunk/arch/arm/mach-at91/board-rsi-ews.c @@ -26,7 +26,6 @@ #include #include -#include #include @@ -226,7 +225,6 @@ MACHINE_START(RSI_EWS, "RSI EWS") /* Maintainer: Josef Holzmayr */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = rsi_ews_init_early, .init_irq = at91_init_irq_default, .init_machine = rsi_ews_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9-l9260.c b/trunk/arch/arm/mach-at91/board-sam9-l9260.c index 7bf6da70d7d5..cdd21f2595d2 100644 --- a/trunk/arch/arm/mach-at91/board-sam9-l9260.c +++ b/trunk/arch/arm/mach-at91/board-sam9-l9260.c @@ -38,7 +38,6 @@ #include #include -#include #include #include "sam9_smc.h" @@ -203,7 +202,6 @@ MACHINE_START(SAM9_L9260, "Olimex SAM9-L9260") /* Maintainer: Olimex */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9260ek.c b/trunk/arch/arm/mach-at91/board-sam9260ek.c index 889c1bf71eb5..7b3c3913551a 100644 --- a/trunk/arch/arm/mach-at91/board-sam9260ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9260ek.c @@ -42,7 +42,6 @@ #include #include -#include #include #include #include @@ -345,7 +344,6 @@ MACHINE_START(AT91SAM9260EK, "Atmel AT91SAM9260-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9261ek.c b/trunk/arch/arm/mach-at91/board-sam9261ek.c index 2269be5fa384..2736453821b0 100644 --- a/trunk/arch/arm/mach-at91/board-sam9261ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9261ek.c @@ -46,7 +46,6 @@ #include #include -#include #include #include #include @@ -616,7 +615,6 @@ MACHINE_START(AT91SAM9G10EK, "Atmel AT91SAM9G10-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9263ek.c b/trunk/arch/arm/mach-at91/board-sam9263ek.c index 82adf581afc2..983cb98d2465 100644 --- a/trunk/arch/arm/mach-at91/board-sam9263ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9263ek.c @@ -45,7 +45,6 @@ #include #include -#include #include #include #include @@ -444,7 +443,6 @@ MACHINE_START(AT91SAM9263EK, "Atmel AT91SAM9263-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9g20ek.c b/trunk/arch/arm/mach-at91/board-sam9g20ek.c index 4ea4ee00364b..6860d3451100 100644 --- a/trunk/arch/arm/mach-at91/board-sam9g20ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9g20ek.c @@ -44,7 +44,6 @@ #include #include -#include #include #include @@ -414,7 +413,6 @@ MACHINE_START(AT91SAM9G20EK, "Atmel AT91SAM9G20-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, @@ -424,7 +422,6 @@ MACHINE_START(AT91SAM9G20EK_2MMC, "Atmel AT91SAM9G20-EK 2 MMC Slot Mod") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c b/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c index 3d48ec154685..63163dc7df46 100644 --- a/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c +++ b/trunk/arch/arm/mach-at91/board-sam9m10g45ek.c @@ -43,7 +43,6 @@ #include #include -#include #include #include #include @@ -504,7 +503,6 @@ MACHINE_START(AT91SAM9M10G45EK, "Atmel AT91SAM9M10G45-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-sam9rlek.c b/trunk/arch/arm/mach-at91/board-sam9rlek.c index e7dc3ead7045..be3239f13daa 100644 --- a/trunk/arch/arm/mach-at91/board-sam9rlek.c +++ b/trunk/arch/arm/mach-at91/board-sam9rlek.c @@ -31,7 +31,6 @@ #include #include -#include #include #include @@ -320,7 +319,6 @@ MACHINE_START(AT91SAM9RLEK, "Atmel AT91SAM9RL-EK") /* Maintainer: Atmel */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-snapper9260.c b/trunk/arch/arm/mach-at91/board-snapper9260.c index a4e031a039fd..9d446f1bb45f 100644 --- a/trunk/arch/arm/mach-at91/board-snapper9260.c +++ b/trunk/arch/arm/mach-at91/board-snapper9260.c @@ -33,7 +33,6 @@ #include #include -#include #include #include "sam9_smc.h" @@ -179,7 +178,6 @@ static void __init snapper9260_board_init(void) MACHINE_START(SNAPPER_9260, "Bluewater Systems Snapper 9260/9G20 module") .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = snapper9260_init_early, .init_irq = at91_init_irq_default, .init_machine = snapper9260_board_init, diff --git a/trunk/arch/arm/mach-at91/board-stamp9g20.c b/trunk/arch/arm/mach-at91/board-stamp9g20.c index 29eae1626bf7..ee86f9d7ee72 100644 --- a/trunk/arch/arm/mach-at91/board-stamp9g20.c +++ b/trunk/arch/arm/mach-at91/board-stamp9g20.c @@ -26,7 +26,6 @@ #include #include -#include #include #include "sam9_smc.h" @@ -288,7 +287,6 @@ MACHINE_START(PORTUXG20, "taskit PortuxG20") /* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = portuxg20_board_init, @@ -298,7 +296,6 @@ MACHINE_START(STAMP9G20, "taskit Stamp9G20") /* Maintainer: taskit GmbH */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = stamp9g20_init_early, .init_irq = at91_init_irq_default, .init_machine = stamp9g20evb_board_init, diff --git a/trunk/arch/arm/mach-at91/board-usb-a926x.c b/trunk/arch/arm/mach-at91/board-usb-a926x.c index c1476b9fe7b9..95393fcaf199 100644 --- a/trunk/arch/arm/mach-at91/board-usb-a926x.c +++ b/trunk/arch/arm/mach-at91/board-usb-a926x.c @@ -42,7 +42,6 @@ #include #include -#include #include #include @@ -359,7 +358,6 @@ MACHINE_START(USB_A9263, "CALAO USB_A9263") /* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, @@ -369,7 +367,6 @@ MACHINE_START(USB_A9260, "CALAO USB_A9260") /* Maintainer: calao-systems */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, @@ -379,7 +376,6 @@ MACHINE_START(USB_A9G20, "CALAO USB_A92G0") /* Maintainer: Jean-Christophe PLAGNIOL-VILLARD */ .timer = &at91sam926x_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = ek_init_early, .init_irq = at91_init_irq_default, .init_machine = ek_board_init, diff --git a/trunk/arch/arm/mach-at91/board-yl-9200.c b/trunk/arch/arm/mach-at91/board-yl-9200.c index 516d340549d8..d56665ea4b55 100644 --- a/trunk/arch/arm/mach-at91/board-yl-9200.c +++ b/trunk/arch/arm/mach-at91/board-yl-9200.c @@ -44,7 +44,6 @@ #include #include -#include #include #include #include @@ -591,7 +590,6 @@ MACHINE_START(YL9200, "uCdragon YL-9200") /* Maintainer: S.Birtles */ .timer = &at91rm9200_timer, .map_io = at91_map_io, - .handle_irq = at91_aic_handle_irq, .init_early = yl9200_init_early, .init_irq = at91_init_irq_default, .init_machine = yl9200_board_init, diff --git a/trunk/arch/arm/mach-at91/generic.h b/trunk/arch/arm/mach-at91/generic.h index f49650677653..0a60bf837037 100644 --- a/trunk/arch/arm/mach-at91/generic.h +++ b/trunk/arch/arm/mach-at91/generic.h @@ -29,8 +29,6 @@ extern void __init at91x40_init_interrupts(unsigned int priority[]); extern void __init at91_aic_init(unsigned int priority[]); extern int __init at91_aic_of_init(struct device_node *node, struct device_node *parent); -extern int __init at91_aic5_of_init(struct device_node *node, - struct device_node *parent); /* Timer */ diff --git a/trunk/arch/arm/mach-at91/gpio.c b/trunk/arch/arm/mach-at91/gpio.c index be42cf0e74bd..325837a264c9 100644 --- a/trunk/arch/arm/mach-at91/gpio.c +++ b/trunk/arch/arm/mach-at91/gpio.c @@ -26,8 +26,6 @@ #include #include -#include - #include #include @@ -587,14 +585,15 @@ static struct irq_chip gpio_irqchip = { static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) { - struct irq_chip *chip = irq_desc_get_chip(desc); struct irq_data *idata = irq_desc_get_irq_data(desc); + struct irq_chip *chip = irq_data_get_irq_chip(idata); struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata); void __iomem *pio = at91_gpio->regbase; unsigned long isr; int n; - chained_irq_enter(chip, desc); + /* temporarily mask (level sensitive) parent IRQ */ + chip->irq_ack(idata); for (;;) { /* Reading ISR acks pending (edge triggered) GPIO interrupts. * When there none are pending, we're finished unless we need @@ -615,7 +614,7 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc) n = find_next_bit(&isr, BITS_PER_LONG, n + 1); } } - chained_irq_exit(chip, desc); + chip->irq_unmask(idata); /* now it may re-trigger */ } diff --git a/trunk/arch/arm/mach-at91/include/mach/at91_aic.h b/trunk/arch/arm/mach-at91/include/mach/at91_aic.h index eaea66197fa1..3045781c473f 100644 --- a/trunk/arch/arm/mach-at91/include/mach/at91_aic.h +++ b/trunk/arch/arm/mach-at91/include/mach/at91_aic.h @@ -23,23 +23,12 @@ extern void __iomem *at91_aic_base; __raw_readl(at91_aic_base + field) #define at91_aic_write(field, value) \ - __raw_writel(value, at91_aic_base + field) + __raw_writel(value, at91_aic_base + field); #else .extern at91_aic_base #endif -/* Number of irq lines managed by AIC */ -#define NR_AIC_IRQS 32 -#define NR_AIC5_IRQS 128 - -#define AT91_AIC5_SSR 0x0 /* Source Select Register [AIC5] */ -#define AT91_AIC5_INTSEL_MSK (0x7f << 0) /* Interrupt Line Selection Mask */ - -#define AT91_AIC_IRQ_MIN_PRIORITY 0 -#define AT91_AIC_IRQ_MAX_PRIORITY 7 - #define AT91_AIC_SMR(n) ((n) * 4) /* Source Mode Registers 0-31 */ -#define AT91_AIC5_SMR 0x4 /* Source Mode Register [AIC5] */ #define AT91_AIC_PRIOR (7 << 0) /* Priority Level */ #define AT91_AIC_SRCTYPE (3 << 5) /* Interrupt Source Type */ #define AT91_AIC_SRCTYPE_LOW (0 << 5) @@ -48,52 +37,29 @@ extern void __iomem *at91_aic_base; #define AT91_AIC_SRCTYPE_RISING (3 << 5) #define AT91_AIC_SVR(n) (0x80 + ((n) * 4)) /* Source Vector Registers 0-31 */ -#define AT91_AIC5_SVR 0x8 /* Source Vector Register [AIC5] */ #define AT91_AIC_IVR 0x100 /* Interrupt Vector Register */ -#define AT91_AIC5_IVR 0x10 /* Interrupt Vector Register [AIC5] */ #define AT91_AIC_FVR 0x104 /* Fast Interrupt Vector Register */ -#define AT91_AIC5_FVR 0x14 /* Fast Interrupt Vector Register [AIC5] */ #define AT91_AIC_ISR 0x108 /* Interrupt Status Register */ -#define AT91_AIC5_ISR 0x18 /* Interrupt Status Register [AIC5] */ #define AT91_AIC_IRQID (0x1f << 0) /* Current Interrupt Identifier */ #define AT91_AIC_IPR 0x10c /* Interrupt Pending Register */ -#define AT91_AIC5_IPR0 0x20 /* Interrupt Pending Register 0 [AIC5] */ -#define AT91_AIC5_IPR1 0x24 /* Interrupt Pending Register 1 [AIC5] */ -#define AT91_AIC5_IPR2 0x28 /* Interrupt Pending Register 2 [AIC5] */ -#define AT91_AIC5_IPR3 0x2c /* Interrupt Pending Register 3 [AIC5] */ #define AT91_AIC_IMR 0x110 /* Interrupt Mask Register */ -#define AT91_AIC5_IMR 0x30 /* Interrupt Mask Register [AIC5] */ #define AT91_AIC_CISR 0x114 /* Core Interrupt Status Register */ -#define AT91_AIC5_CISR 0x34 /* Core Interrupt Status Register [AIC5] */ #define AT91_AIC_NFIQ (1 << 0) /* nFIQ Status */ #define AT91_AIC_NIRQ (1 << 1) /* nIRQ Status */ #define AT91_AIC_IECR 0x120 /* Interrupt Enable Command Register */ -#define AT91_AIC5_IECR 0x40 /* Interrupt Enable Command Register [AIC5] */ #define AT91_AIC_IDCR 0x124 /* Interrupt Disable Command Register */ -#define AT91_AIC5_IDCR 0x44 /* Interrupt Disable Command Register [AIC5] */ #define AT91_AIC_ICCR 0x128 /* Interrupt Clear Command Register */ -#define AT91_AIC5_ICCR 0x48 /* Interrupt Clear Command Register [AIC5] */ #define AT91_AIC_ISCR 0x12c /* Interrupt Set Command Register */ -#define AT91_AIC5_ISCR 0x4c /* Interrupt Set Command Register [AIC5] */ #define AT91_AIC_EOICR 0x130 /* End of Interrupt Command Register */ -#define AT91_AIC5_EOICR 0x38 /* End of Interrupt Command Register [AIC5] */ #define AT91_AIC_SPU 0x134 /* Spurious Interrupt Vector Register */ -#define AT91_AIC5_SPU 0x3c /* Spurious Interrupt Vector Register [AIC5] */ #define AT91_AIC_DCR 0x138 /* Debug Control Register */ -#define AT91_AIC5_DCR 0x6c /* Debug Control Register [AIC5] */ #define AT91_AIC_DCR_PROT (1 << 0) /* Protection Mode */ #define AT91_AIC_DCR_GMSK (1 << 1) /* General Mask */ #define AT91_AIC_FFER 0x140 /* Fast Forcing Enable Register [SAM9 only] */ -#define AT91_AIC5_FFER 0x50 /* Fast Forcing Enable Register [AIC5] */ #define AT91_AIC_FFDR 0x144 /* Fast Forcing Disable Register [SAM9 only] */ -#define AT91_AIC5_FFDR 0x54 /* Fast Forcing Disable Register [AIC5] */ #define AT91_AIC_FFSR 0x148 /* Fast Forcing Status Register [SAM9 only] */ -#define AT91_AIC5_FFSR 0x58 /* Fast Forcing Status Register [AIC5] */ - -void at91_aic_handle_irq(struct pt_regs *regs); -void at91_aic5_handle_irq(struct pt_regs *regs); #endif diff --git a/trunk/arch/arm/mach-at91/include/mach/at91_spi.h b/trunk/arch/arm/mach-at91/include/mach/at91_spi.h new file mode 100644 index 000000000000..2f6ba0c5636e --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/at91_spi.h @@ -0,0 +1,81 @@ +/* + * arch/arm/mach-at91/include/mach/at91_spi.h + * + * Copyright (C) 2005 Ivan Kokshaysky + * Copyright (C) SAN People + * + * Serial Peripheral Interface (SPI) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_SPI_H +#define AT91_SPI_H + +#define AT91_SPI_CR 0x00 /* Control Register */ +#define AT91_SPI_SPIEN (1 << 0) /* SPI Enable */ +#define AT91_SPI_SPIDIS (1 << 1) /* SPI Disable */ +#define AT91_SPI_SWRST (1 << 7) /* SPI Software Reset */ +#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ + +#define AT91_SPI_MR 0x04 /* Mode Register */ +#define AT91_SPI_MSTR (1 << 0) /* Master/Slave Mode */ +#define AT91_SPI_PS (1 << 1) /* Peripheral Select */ +#define AT91_SPI_PS_FIXED (0 << 1) +#define AT91_SPI_PS_VARIABLE (1 << 1) +#define AT91_SPI_PCSDEC (1 << 2) /* Chip Select Decode */ +#define AT91_SPI_DIV32 (1 << 3) /* Clock Selection [AT91RM9200 only] */ +#define AT91_SPI_MODFDIS (1 << 4) /* Mode Fault Detection */ +#define AT91_SPI_LLB (1 << 7) /* Local Loopback Enable */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ +#define AT91_SPI_DLYBCS (0xff << 24) /* Delay Between Chip Selects */ + +#define AT91_SPI_RDR 0x08 /* Receive Data Register */ +#define AT91_SPI_RD (0xffff << 0) /* Receive Data */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ + +#define AT91_SPI_TDR 0x0c /* Transmit Data Register */ +#define AT91_SPI_TD (0xffff << 0) /* Transmit Data */ +#define AT91_SPI_PCS (0xf << 16) /* Peripheral Chip Select */ +#define AT91_SPI_LASTXFER (1 << 24) /* Last Transfer [SAM9261 only] */ + +#define AT91_SPI_SR 0x10 /* Status Register */ +#define AT91_SPI_RDRF (1 << 0) /* Receive Data Register Full */ +#define AT91_SPI_TDRE (1 << 1) /* Transmit Data Register Full */ +#define AT91_SPI_MODF (1 << 2) /* Mode Fault Error */ +#define AT91_SPI_OVRES (1 << 3) /* Overrun Error Status */ +#define AT91_SPI_ENDRX (1 << 4) /* End of RX buffer */ +#define AT91_SPI_ENDTX (1 << 5) /* End of TX buffer */ +#define AT91_SPI_RXBUFF (1 << 6) /* RX Buffer Full */ +#define AT91_SPI_TXBUFE (1 << 7) /* TX Buffer Empty */ +#define AT91_SPI_NSSR (1 << 8) /* NSS Rising [SAM9261 only] */ +#define AT91_SPI_TXEMPTY (1 << 9) /* Transmission Register Empty [SAM9261 only] */ +#define AT91_SPI_SPIENS (1 << 16) /* SPI Enable Status */ + +#define AT91_SPI_IER 0x14 /* Interrupt Enable Register */ +#define AT91_SPI_IDR 0x18 /* Interrupt Disable Register */ +#define AT91_SPI_IMR 0x1c /* Interrupt Mask Register */ + +#define AT91_SPI_CSR(n) (0x30 + ((n) * 4)) /* Chip Select Registers 0-3 */ +#define AT91_SPI_CPOL (1 << 0) /* Clock Polarity */ +#define AT91_SPI_NCPHA (1 << 1) /* Clock Phase */ +#define AT91_SPI_CSAAT (1 << 3) /* Chip Select Active After Transfer [SAM9261 only] */ +#define AT91_SPI_BITS (0xf << 4) /* Bits Per Transfer */ +#define AT91_SPI_BITS_8 (0 << 4) +#define AT91_SPI_BITS_9 (1 << 4) +#define AT91_SPI_BITS_10 (2 << 4) +#define AT91_SPI_BITS_11 (3 << 4) +#define AT91_SPI_BITS_12 (4 << 4) +#define AT91_SPI_BITS_13 (5 << 4) +#define AT91_SPI_BITS_14 (6 << 4) +#define AT91_SPI_BITS_15 (7 << 4) +#define AT91_SPI_BITS_16 (8 << 4) +#define AT91_SPI_SCBR (0xff << 8) /* Serial Clock Baud Rate */ +#define AT91_SPI_DLYBS (0xff << 16) /* Delay before SPCK */ +#define AT91_SPI_DLYBCT (0xff << 24) /* Delay between Consecutive Transfers */ + +#endif diff --git a/trunk/arch/arm/mach-at91/include/mach/at91_ssc.h b/trunk/arch/arm/mach-at91/include/mach/at91_ssc.h new file mode 100644 index 000000000000..a81114c11c74 --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/at91_ssc.h @@ -0,0 +1,106 @@ +/* + * arch/arm/mach-at91/include/mach/at91_ssc.h + * + * Copyright (C) SAN People + * + * Serial Synchronous Controller (SSC) registers. + * Based on AT91RM9200 datasheet revision E. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef AT91_SSC_H +#define AT91_SSC_H + +#define AT91_SSC_CR 0x00 /* Control Register */ +#define AT91_SSC_RXEN (1 << 0) /* Receive Enable */ +#define AT91_SSC_RXDIS (1 << 1) /* Receive Disable */ +#define AT91_SSC_TXEN (1 << 8) /* Transmit Enable */ +#define AT91_SSC_TXDIS (1 << 9) /* Transmit Disable */ +#define AT91_SSC_SWRST (1 << 15) /* Software Reset */ + +#define AT91_SSC_CMR 0x04 /* Clock Mode Register */ +#define AT91_SSC_CMR_DIV (0xfff << 0) /* Clock Divider */ + +#define AT91_SSC_RCMR 0x10 /* Receive Clock Mode Register */ +#define AT91_SSC_CKS (3 << 0) /* Clock Selection */ +#define AT91_SSC_CKS_DIV (0 << 0) +#define AT91_SSC_CKS_CLOCK (1 << 0) +#define AT91_SSC_CKS_PIN (2 << 0) +#define AT91_SSC_CKO (7 << 2) /* Clock Output Mode Selection */ +#define AT91_SSC_CKO_NONE (0 << 2) +#define AT91_SSC_CKO_CONTINUOUS (1 << 2) +#define AT91_SSC_CKI (1 << 5) /* Clock Inversion */ +#define AT91_SSC_CKI_FALLING (0 << 5) +#define AT91_SSC_CK_RISING (1 << 5) +#define AT91_SSC_CKG (1 << 6) /* Receive Clock Gating Selection [AT91SAM9261 only] */ +#define AT91_SSC_CKG_NONE (0 << 6) +#define AT91_SSC_CKG_RFLOW (1 << 6) +#define AT91_SSC_CKG_RFHIGH (2 << 6) +#define AT91_SSC_START (0xf << 8) /* Start Selection */ +#define AT91_SSC_START_CONTINUOUS (0 << 8) +#define AT91_SSC_START_TX_RX (1 << 8) +#define AT91_SSC_START_LOW_RF (2 << 8) +#define AT91_SSC_START_HIGH_RF (3 << 8) +#define AT91_SSC_START_FALLING_RF (4 << 8) +#define AT91_SSC_START_RISING_RF (5 << 8) +#define AT91_SSC_START_LEVEL_RF (6 << 8) +#define AT91_SSC_START_EDGE_RF (7 << 8) +#define AT91_SSC_STOP (1 << 12) /* Receive Stop Selection [AT91SAM9261 only] */ +#define AT91_SSC_STTDLY (0xff << 16) /* Start Delay */ +#define AT91_SSC_PERIOD (0xff << 24) /* Period Divider Selection */ + +#define AT91_SSC_RFMR 0x14 /* Receive Frame Mode Register */ +#define AT91_SSC_DATALEN (0x1f << 0) /* Data Length */ +#define AT91_SSC_LOOP (1 << 5) /* Loop Mode */ +#define AT91_SSC_MSBF (1 << 7) /* Most Significant Bit First */ +#define AT91_SSC_DATNB (0xf << 8) /* Data Number per Frame */ +#define AT91_SSC_FSLEN (0xf << 16) /* Frame Sync Length */ +#define AT91_SSC_FSOS (7 << 20) /* Frame Sync Output Selection */ +#define AT91_SSC_FSOS_NONE (0 << 20) +#define AT91_SSC_FSOS_NEGATIVE (1 << 20) +#define AT91_SSC_FSOS_POSITIVE (2 << 20) +#define AT91_SSC_FSOS_LOW (3 << 20) +#define AT91_SSC_FSOS_HIGH (4 << 20) +#define AT91_SSC_FSOS_TOGGLE (5 << 20) +#define AT91_SSC_FSEDGE (1 << 24) /* Frame Sync Edge Detection */ +#define AT91_SSC_FSEDGE_POSITIVE (0 << 24) +#define AT91_SSC_FSEDGE_NEGATIVE (1 << 24) + +#define AT91_SSC_TCMR 0x18 /* Transmit Clock Mode Register */ +#define AT91_SSC_TFMR 0x1c /* Transmit Fram Mode Register */ +#define AT91_SSC_DATDEF (1 << 5) /* Data Default Value */ +#define AT91_SSC_FSDEN (1 << 23) /* Frame Sync Data Enable */ + +#define AT91_SSC_RHR 0x20 /* Receive Holding Register */ +#define AT91_SSC_THR 0x24 /* Transmit Holding Register */ +#define AT91_SSC_RSHR 0x30 /* Receive Sync Holding Register */ +#define AT91_SSC_TSHR 0x34 /* Transmit Sync Holding Register */ + +#define AT91_SSC_RC0R 0x38 /* Receive Compare 0 Register [AT91SAM9261 only] */ +#define AT91_SSC_RC1R 0x3c /* Receive Compare 1 Register [AT91SAM9261 only] */ + +#define AT91_SSC_SR 0x40 /* Status Register */ +#define AT91_SSC_TXRDY (1 << 0) /* Transmit Ready */ +#define AT91_SSC_TXEMPTY (1 << 1) /* Transmit Empty */ +#define AT91_SSC_ENDTX (1 << 2) /* End of Transmission */ +#define AT91_SSC_TXBUFE (1 << 3) /* Transmit Buffer Empty */ +#define AT91_SSC_RXRDY (1 << 4) /* Receive Ready */ +#define AT91_SSC_OVRUN (1 << 5) /* Receive Overrun */ +#define AT91_SSC_ENDRX (1 << 6) /* End of Reception */ +#define AT91_SSC_RXBUFF (1 << 7) /* Receive Buffer Full */ +#define AT91_SSC_CP0 (1 << 8) /* Compare 0 [AT91SAM9261 only] */ +#define AT91_SSC_CP1 (1 << 9) /* Compare 1 [AT91SAM9261 only] */ +#define AT91_SSC_TXSYN (1 << 10) /* Transmit Sync */ +#define AT91_SSC_RXSYN (1 << 11) /* Receive Sync */ +#define AT91_SSC_TXENA (1 << 16) /* Transmit Enable */ +#define AT91_SSC_RXENA (1 << 17) /* Receive Enable */ + +#define AT91_SSC_IER 0x44 /* Interrupt Enable Register */ +#define AT91_SSC_IDR 0x48 /* Interrupt Disable Register */ +#define AT91_SSC_IMR 0x4c /* Interrupt Mask Register */ + +#endif diff --git a/trunk/arch/arm/mach-at91/include/mach/entry-macro.S b/trunk/arch/arm/mach-at91/include/mach/entry-macro.S new file mode 100644 index 000000000000..903bf205a333 --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/entry-macro.S @@ -0,0 +1,27 @@ +/* + * arch/arm/mach-at91/include/mach/entry-macro.S + * + * Copyright (C) 2003-2005 SAN People + * + * Low-level IRQ helper macros for AT91RM9200 platforms + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include +#include + + .macro get_irqnr_preamble, base, tmp + ldr \base, =at91_aic_base @ base virtual address of AIC peripheral + ldr \base, [\base] + .endm + + .macro get_irqnr_and_base, irqnr, irqstat, base, tmp + ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) + ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number + teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt + streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. + .endm + diff --git a/trunk/arch/arm/mach-at91/include/mach/irqs.h b/trunk/arch/arm/mach-at91/include/mach/irqs.h new file mode 100644 index 000000000000..ac8b7dfc85ef --- /dev/null +++ b/trunk/arch/arm/mach-at91/include/mach/irqs.h @@ -0,0 +1,48 @@ +/* + * arch/arm/mach-at91/include/mach/irqs.h + * + * Copyright (C) 2004 SAN People + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __ASM_ARCH_IRQS_H +#define __ASM_ARCH_IRQS_H + +#include +#include + +#define NR_AIC_IRQS 32 + + +/* + * Acknowledge interrupt with AIC after interrupt has been handled. + * (by kernel/irq.c) + */ +#define irq_finish(irq) do { at91_aic_write(AT91_AIC_EOICR, 0); } while (0) + + +/* + * IRQ interrupt symbols are the AT91xxx_ID_* symbols + * for IRQs handled directly through the AIC, or else the AT91_PIN_* + * symbols in gpio.h for ones handled indirectly as GPIOs. + * We make provision for 5 banks of GPIO. + */ +#define NR_IRQS (NR_AIC_IRQS + (5 * 32)) + +/* FIQ is AIC source 0. */ +#define FIQ_START AT91_ID_FIQ + +#endif diff --git a/trunk/arch/arm/mach-at91/irq.c b/trunk/arch/arm/mach-at91/irq.c index 1e02c0e49dcc..cfcfcbe36269 100644 --- a/trunk/arch/arm/mach-at91/irq.c +++ b/trunk/arch/arm/mach-at91/irq.c @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include @@ -31,218 +30,38 @@ #include #include #include -#include #include #include #include -#include #include #include #include -#include - void __iomem *at91_aic_base; static struct irq_domain *at91_aic_domain; static struct device_node *at91_aic_np; -static unsigned int n_irqs = NR_AIC_IRQS; -static unsigned long at91_aic_caps = 0; - -/* AIC5 introduces a Source Select Register */ -#define AT91_AIC_CAP_AIC5 (1 << 0) -#define has_aic5() (at91_aic_caps & AT91_AIC_CAP_AIC5) - -#ifdef CONFIG_PM - -static unsigned long *wakeups; -static unsigned long *backups; - -#define set_backup(bit) set_bit(bit, backups) -#define clear_backup(bit) clear_bit(bit, backups) - -static int at91_aic_pm_init(void) -{ - backups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); - if (!backups) - return -ENOMEM; - - wakeups = kzalloc(BITS_TO_LONGS(n_irqs) * sizeof(*backups), GFP_KERNEL); - if (!wakeups) { - kfree(backups); - return -ENOMEM; - } - - return 0; -} - -static int at91_aic_set_wake(struct irq_data *d, unsigned value) -{ - if (unlikely(d->hwirq >= n_irqs)) - return -EINVAL; - - if (value) - set_bit(d->hwirq, wakeups); - else - clear_bit(d->hwirq, wakeups); - - return 0; -} - -void at91_irq_suspend(void) -{ - int i = 0, bit; - - if (has_aic5()) { - /* disable enabled irqs */ - while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - i = bit; - } - /* enable wakeup irqs */ - i = 0; - while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IECR, 1); - i = bit; - } - } else { - at91_aic_write(AT91_AIC_IDCR, *backups); - at91_aic_write(AT91_AIC_IECR, *wakeups); - } -} - -void at91_irq_resume(void) -{ - int i = 0, bit; - - if (has_aic5()) { - /* disable wakeup irqs */ - while ((bit = find_next_bit(wakeups, n_irqs, i)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - i = bit; - } - /* enable irqs disabled for suspend */ - i = 0; - while ((bit = find_next_bit(backups, n_irqs, i)) < n_irqs) { - at91_aic_write(AT91_AIC5_SSR, - bit & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IECR, 1); - i = bit; - } - } else { - at91_aic_write(AT91_AIC_IDCR, *wakeups); - at91_aic_write(AT91_AIC_IECR, *backups); - } -} - -#else -static inline int at91_aic_pm_init(void) -{ - return 0; -} - -#define set_backup(bit) -#define clear_backup(bit) -#define at91_aic_set_wake NULL - -#endif /* CONFIG_PM */ - -asmlinkage void __exception_irq_entry -at91_aic_handle_irq(struct pt_regs *regs) -{ - u32 irqnr; - u32 irqstat; - - irqnr = at91_aic_read(AT91_AIC_IVR); - irqstat = at91_aic_read(AT91_AIC_ISR); - - /* - * ISR value is 0 when there is no current interrupt or when there is - * a spurious interrupt - */ - if (!irqstat) - at91_aic_write(AT91_AIC_EOICR, 0); - else - handle_IRQ(irqnr, regs); -} - -asmlinkage void __exception_irq_entry -at91_aic5_handle_irq(struct pt_regs *regs) -{ - u32 irqnr; - u32 irqstat; - - irqnr = at91_aic_read(AT91_AIC5_IVR); - irqstat = at91_aic_read(AT91_AIC5_ISR); - - if (!irqstat) - at91_aic_write(AT91_AIC5_EOICR, 0); - else - handle_IRQ(irqnr, regs); -} static void at91_aic_mask_irq(struct irq_data *d) { /* Disable interrupt on AIC */ at91_aic_write(AT91_AIC_IDCR, 1 << d->hwirq); - /* Update ISR cache */ - clear_backup(d->hwirq); -} - -static void __maybe_unused at91_aic5_mask_irq(struct irq_data *d) -{ - /* Disable interrupt on AIC5 */ - at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - /* Update ISR cache */ - clear_backup(d->hwirq); } static void at91_aic_unmask_irq(struct irq_data *d) { /* Enable interrupt on AIC */ at91_aic_write(AT91_AIC_IECR, 1 << d->hwirq); - /* Update ISR cache */ - set_backup(d->hwirq); -} - -static void __maybe_unused at91_aic5_unmask_irq(struct irq_data *d) -{ - /* Enable interrupt on AIC5 */ - at91_aic_write(AT91_AIC5_SSR, d->hwirq & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IECR, 1); - /* Update ISR cache */ - set_backup(d->hwirq); } -static void at91_aic_eoi(struct irq_data *d) -{ - /* - * Mark end-of-interrupt on AIC, the controller doesn't care about - * the value written. Moreover it's a write-only register. - */ - at91_aic_write(AT91_AIC_EOICR, 0); -} - -static void __maybe_unused at91_aic5_eoi(struct irq_data *d) -{ - at91_aic_write(AT91_AIC5_EOICR, 0); -} - -unsigned long *at91_extern_irq; +unsigned int at91_extern_irq; -#define is_extern_irq(hwirq) test_bit(hwirq, at91_extern_irq) +#define is_extern_irq(hwirq) ((1 << (hwirq)) & at91_extern_irq) -static int at91_aic_compute_srctype(struct irq_data *d, unsigned type) +static int at91_aic_set_type(struct irq_data *d, unsigned type) { - int srctype; + unsigned int smr, srctype; switch (type) { case IRQ_TYPE_LEVEL_HIGH: @@ -255,51 +74,65 @@ static int at91_aic_compute_srctype(struct irq_data *d, unsigned type) if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_LOW; else - srctype = -EINVAL; + return -EINVAL; break; case IRQ_TYPE_EDGE_FALLING: if ((d->hwirq == AT91_ID_FIQ) || is_extern_irq(d->hwirq)) /* only supported on external interrupts */ srctype = AT91_AIC_SRCTYPE_FALLING; else - srctype = -EINVAL; + return -EINVAL; break; default: - srctype = -EINVAL; + return -EINVAL; } - return srctype; + smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) & ~AT91_AIC_SRCTYPE; + at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); + return 0; } -static int at91_aic_set_type(struct irq_data *d, unsigned type) +#ifdef CONFIG_PM + +static u32 wakeups; +static u32 backups; + +static int at91_aic_set_wake(struct irq_data *d, unsigned value) { - unsigned int smr; - int srctype; - - srctype = at91_aic_compute_srctype(d, type); - if (srctype < 0) - return srctype; - - if (has_aic5()) { - at91_aic_write(AT91_AIC5_SSR, - d->hwirq & AT91_AIC5_INTSEL_MSK); - smr = at91_aic_read(AT91_AIC5_SMR) & ~AT91_AIC_SRCTYPE; - at91_aic_write(AT91_AIC5_SMR, smr | srctype); - } else { - smr = at91_aic_read(AT91_AIC_SMR(d->hwirq)) - & ~AT91_AIC_SRCTYPE; - at91_aic_write(AT91_AIC_SMR(d->hwirq), smr | srctype); - } + if (unlikely(d->hwirq >= NR_AIC_IRQS)) + return -EINVAL; + + if (value) + wakeups |= (1 << d->hwirq); + else + wakeups &= ~(1 << d->hwirq); return 0; } +void at91_irq_suspend(void) +{ + backups = at91_aic_read(AT91_AIC_IMR); + at91_aic_write(AT91_AIC_IDCR, backups); + at91_aic_write(AT91_AIC_IECR, wakeups); +} + +void at91_irq_resume(void) +{ + at91_aic_write(AT91_AIC_IDCR, wakeups); + at91_aic_write(AT91_AIC_IECR, backups); +} + +#else +#define at91_aic_set_wake NULL +#endif + static struct irq_chip at91_aic_chip = { .name = "AIC", + .irq_ack = at91_aic_mask_irq, .irq_mask = at91_aic_mask_irq, .irq_unmask = at91_aic_unmask_irq, .irq_set_type = at91_aic_set_type, .irq_set_wake = at91_aic_set_wake, - .irq_eoi = at91_aic_eoi, }; static void __init at91_aic_hw_init(unsigned int spu_vector) @@ -328,172 +161,41 @@ static void __init at91_aic_hw_init(unsigned int spu_vector) at91_aic_write(AT91_AIC_ICCR, 0xFFFFFFFF); } -static void __init __maybe_unused at91_aic5_hw_init(unsigned int spu_vector) -{ - int i; - - /* - * Perform 8 End Of Interrupt Command to make sure AIC - * will not Lock out nIRQ - */ - for (i = 0; i < 8; i++) - at91_aic_write(AT91_AIC5_EOICR, 0); - - /* - * Spurious Interrupt ID in Spurious Vector Register. - * When there is no current interrupt, the IRQ Vector Register - * reads the value stored in AIC_SPU - */ - at91_aic_write(AT91_AIC5_SPU, spu_vector); - - /* No debugging in AIC: Debug (Protect) Control Register */ - at91_aic_write(AT91_AIC5_DCR, 0); - - /* Disable and clear all interrupts initially */ - for (i = 0; i < n_irqs; i++) { - at91_aic_write(AT91_AIC5_SSR, i & AT91_AIC5_INTSEL_MSK); - at91_aic_write(AT91_AIC5_IDCR, 1); - at91_aic_write(AT91_AIC5_ICCR, 1); - } -} - #if defined(CONFIG_OF) -static unsigned int *at91_aic_irq_priorities; - static int at91_aic_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hw) { /* Put virq number in Source Vector Register */ at91_aic_write(AT91_AIC_SVR(hw), virq); - /* Active Low interrupt, with priority */ - at91_aic_write(AT91_AIC_SMR(hw), - AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); + /* Active Low interrupt, without priority */ + at91_aic_write(AT91_AIC_SMR(hw), AT91_AIC_SRCTYPE_LOW); - irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); + irq_set_chip_and_handler(virq, &at91_aic_chip, handle_level_irq); set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); return 0; } -static int at91_aic5_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) -{ - at91_aic_write(AT91_AIC5_SSR, hw & AT91_AIC5_INTSEL_MSK); - - /* Put virq number in Source Vector Register */ - at91_aic_write(AT91_AIC5_SVR, virq); - - /* Active Low interrupt, with priority */ - at91_aic_write(AT91_AIC5_SMR, - AT91_AIC_SRCTYPE_LOW | at91_aic_irq_priorities[hw]); - - irq_set_chip_and_handler(virq, &at91_aic_chip, handle_fasteoi_irq); - set_irq_flags(virq, IRQF_VALID | IRQF_PROBE); - - return 0; -} - -static int at91_aic_irq_domain_xlate(struct irq_domain *d, struct device_node *ctrlr, - const u32 *intspec, unsigned int intsize, - irq_hw_number_t *out_hwirq, unsigned int *out_type) -{ - if (WARN_ON(intsize < 3)) - return -EINVAL; - if (WARN_ON(intspec[0] >= n_irqs)) - return -EINVAL; - if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) - || (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY))) - return -EINVAL; - - *out_hwirq = intspec[0]; - *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK; - at91_aic_irq_priorities[*out_hwirq] = intspec[2]; - - return 0; -} - static struct irq_domain_ops at91_aic_irq_ops = { .map = at91_aic_irq_map, - .xlate = at91_aic_irq_domain_xlate, + .xlate = irq_domain_xlate_twocell, }; -int __init at91_aic_of_common_init(struct device_node *node, - struct device_node *parent) +int __init at91_aic_of_init(struct device_node *node, + struct device_node *parent) { - struct property *prop; - const __be32 *p; - u32 val; - - at91_extern_irq = kzalloc(BITS_TO_LONGS(n_irqs) - * sizeof(*at91_extern_irq), GFP_KERNEL); - if (!at91_extern_irq) - return -ENOMEM; - - if (at91_aic_pm_init()) { - kfree(at91_extern_irq); - return -ENOMEM; - } - - at91_aic_irq_priorities = kzalloc(n_irqs - * sizeof(*at91_aic_irq_priorities), - GFP_KERNEL); - if (!at91_aic_irq_priorities) - return -ENOMEM; - at91_aic_base = of_iomap(node, 0); at91_aic_np = node; - at91_aic_domain = irq_domain_add_linear(at91_aic_np, n_irqs, + at91_aic_domain = irq_domain_add_linear(at91_aic_np, NR_AIC_IRQS, &at91_aic_irq_ops, NULL); if (!at91_aic_domain) panic("Unable to add AIC irq domain (DT)\n"); - of_property_for_each_u32(node, "atmel,external-irqs", prop, p, val) { - if (val >= n_irqs) - pr_warn("AIC: external irq %d >= %d skip it\n", - val, n_irqs); - else - set_bit(val, at91_extern_irq); - } - irq_set_default_host(at91_aic_domain); - return 0; -} - -int __init at91_aic_of_init(struct device_node *node, - struct device_node *parent) -{ - int err; - - err = at91_aic_of_common_init(node, parent); - if (err) - return err; - - at91_aic_hw_init(n_irqs); - - return 0; -} - -int __init at91_aic5_of_init(struct device_node *node, - struct device_node *parent) -{ - int err; - - at91_aic_caps |= AT91_AIC_CAP_AIC5; - n_irqs = NR_AIC5_IRQS; - at91_aic_chip.irq_ack = at91_aic5_mask_irq; - at91_aic_chip.irq_mask = at91_aic5_mask_irq; - at91_aic_chip.irq_unmask = at91_aic5_unmask_irq; - at91_aic_chip.irq_eoi = at91_aic5_eoi; - at91_aic_irq_ops.map = at91_aic5_irq_map; - - err = at91_aic_of_common_init(node, parent); - if (err) - return err; - - at91_aic5_hw_init(n_irqs); + at91_aic_hw_init(NR_AIC_IRQS); return 0; } @@ -502,25 +204,22 @@ int __init at91_aic5_of_init(struct device_node *node, /* * Initialize the AIC interrupt controller. */ -void __init at91_aic_init(unsigned int *priority) +void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) { unsigned int i; int irq_base; - if (at91_aic_pm_init()) - panic("Unable to allocate bit maps\n"); - at91_aic_base = ioremap(AT91_AIC, 512); if (!at91_aic_base) panic("Unable to ioremap AIC registers\n"); /* Add irq domain for AIC */ - irq_base = irq_alloc_descs(-1, 0, n_irqs, 0); + irq_base = irq_alloc_descs(-1, 0, NR_AIC_IRQS, 0); if (irq_base < 0) { WARN(1, "Cannot allocate irq_descs, assuming pre-allocated\n"); irq_base = 0; } - at91_aic_domain = irq_domain_add_legacy(at91_aic_np, n_irqs, + at91_aic_domain = irq_domain_add_legacy(at91_aic_np, NR_AIC_IRQS, irq_base, 0, &irq_domain_simple_ops, NULL); @@ -533,14 +232,15 @@ void __init at91_aic_init(unsigned int *priority) * The IVR is used by macro get_irqnr_and_base to read and verify. * The irq number is NR_AIC_IRQS when a spurious interrupt has occurred. */ - for (i = 0; i < n_irqs; i++) { + for (i = 0; i < NR_AIC_IRQS; i++) { /* Put hardware irq number in Source Vector Register: */ - at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); + at91_aic_write(AT91_AIC_SVR(i), i); /* Active Low interrupt, with the specified priority */ at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); + + irq_set_chip_and_handler(i, &at91_aic_chip, handle_level_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } - at91_aic_hw_init(n_irqs); + at91_aic_hw_init(NR_AIC_IRQS); } diff --git a/trunk/arch/arm/mach-at91/pm.c b/trunk/arch/arm/mach-at91/pm.c index 2c2d86505a54..1bfaad628731 100644 --- a/trunk/arch/arm/mach-at91/pm.c +++ b/trunk/arch/arm/mach-at91/pm.c @@ -25,7 +25,6 @@ #include #include -#include #include #include diff --git a/trunk/arch/arm/mach-clps711x/common.c b/trunk/arch/arm/mach-clps711x/common.c index f15293bd7974..c965fd8eb31a 100644 --- a/trunk/arch/arm/mach-clps711x/common.c +++ b/trunk/arch/arm/mach-clps711x/common.c @@ -26,6 +26,7 @@ #include #include #include +#include #include #include @@ -187,6 +188,7 @@ static struct irqaction clps711x_timer_irq = { static void __init clps711x_timer_init(void) { + struct timespec tv; unsigned int syscon; syscon = clps_readl(SYSCON1); @@ -196,6 +198,10 @@ static void __init clps711x_timer_init(void) clps_writel(LATCH-1, TC2D); /* 512kHz / 100Hz - 1 */ setup_irq(IRQ_TC2OI, &clps711x_timer_irq); + + tv.tv_nsec = 0; + tv.tv_sec = clps_readl(RTCDR); + do_settimeofday(&tv); } struct sys_timer clps711x_timer = { diff --git a/trunk/arch/arm/mach-clps711x/include/mach/memory.h b/trunk/arch/arm/mach-clps711x/include/mach/memory.h index fc0e028d9405..3a032a67725c 100644 --- a/trunk/arch/arm/mach-clps711x/include/mach/memory.h +++ b/trunk/arch/arm/mach-clps711x/include/mach/memory.h @@ -25,6 +25,26 @@ */ #define PLAT_PHYS_OFFSET UL(0xc0000000) +#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12) + +#define __virt_to_bus(x) ((x) - PAGE_OFFSET) +#define __bus_to_virt(x) ((x) + PAGE_OFFSET) +#define __pfn_to_bus(x) (__pfn_to_phys(x) - PHYS_OFFSET) +#define __bus_to_pfn(x) __phys_to_pfn((x) + PHYS_OFFSET) + +#endif + + +/* + * Like the SA1100, the EDB7211 has a large gap between physical RAM + * banks. In 2.2, the Psion (CL-PS7110) port added custom support for + * discontiguous physical memory. In 2.4, we can use the standard + * Linux NUMA support. + * + * This is not necessary for EP7211 implementations with only one used + * memory bank. For those systems, simply undefine CONFIG_DISCONTIGMEM. + */ + /* * The PS7211 allows up to 256MB max per DRAM bank, but the EDB7211 * uses only one of the two banks (bank #1). However, even within @@ -34,6 +54,23 @@ * them, so we use 24 for the node max shift to get 16MB node sizes. */ +/* + * Because of the wide memory address space between physical RAM banks on the + * SA1100, it's much more convenient to use Linux's NUMA support to implement + * our memory map representation. Assuming all memory nodes have equal access + * characteristics, we then have generic discontiguous memory support. + * + * Of course, all this isn't mandatory for SA1100 implementations with only + * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. + * + * The nodes are matched with the physical memory bank addresses which are + * incidentally the same as virtual addresses. + * + * node 0: 0xc0000000 - 0xc7ffffff + * node 1: 0xc8000000 - 0xcfffffff + * node 2: 0xd0000000 - 0xd7ffffff + * node 3: 0xd8000000 - 0xdfffffff + */ #define SECTION_SIZE_BITS 24 #define MAX_PHYSMEM_BITS 32 diff --git a/trunk/arch/arm/mach-clps711x/p720t.c b/trunk/arch/arm/mach-clps711x/p720t.c index f266d90b9efc..42ee8f33eafb 100644 --- a/trunk/arch/arm/mach-clps711x/p720t.c +++ b/trunk/arch/arm/mach-clps711x/p720t.c @@ -86,7 +86,17 @@ static void __init p720t_map_io(void) iotable_init(p720t_io_desc, ARRAY_SIZE(p720t_io_desc)); } -static void __init p720t_init_early(void) +MACHINE_START(P720T, "ARM-Prospector720T") + /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ + .atag_offset = 0x100, + .fixup = fixup_p720t, + .map_io = p720t_map_io, + .init_irq = clps711x_init_irq, + .timer = &clps711x_timer, + .restart = clps711x_restart, +MACHINE_END + +static int p720t_hw_init(void) { /* * Power down as much as possible in case we don't @@ -101,19 +111,13 @@ static void __init p720t_init_early(void) PLD_CODEC = 0; PLD_TCH = 0; PLD_SPI = 0; - if (!IS_ENABLED(CONFIG_DEBUG_LL)) { - PLD_COM2 = 0; - PLD_COM1 = 0; - } +#ifndef CONFIG_DEBUG_LL + PLD_COM2 = 0; + PLD_COM1 = 0; +#endif + + return 0; } -MACHINE_START(P720T, "ARM-Prospector720T") - /* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */ - .atag_offset = 0x100, - .fixup = fixup_p720t, - .init_early = p720t_init_early, - .map_io = p720t_map_io, - .init_irq = clps711x_init_irq, - .timer = &clps711x_timer, - .restart = clps711x_restart, -MACHINE_END +__initcall(p720t_hw_init); + diff --git a/trunk/arch/arm/mach-davinci/include/mach/dm365.h b/trunk/arch/arm/mach-davinci/include/mach/dm365.h new file mode 100644 index 000000000000..b9bf3d6a4423 --- /dev/null +++ b/trunk/arch/arm/mach-davinci/include/mach/dm365.h @@ -0,0 +1 @@ +/* empty, remove once unused */ diff --git a/trunk/arch/arm/mach-davinci/include/mach/dm646x.h b/trunk/arch/arm/mach-davinci/include/mach/dm646x.h new file mode 100644 index 000000000000..b9bf3d6a4423 --- /dev/null +++ b/trunk/arch/arm/mach-davinci/include/mach/dm646x.h @@ -0,0 +1 @@ +/* empty, remove once unused */ diff --git a/trunk/arch/arm/mach-exynos/common.c b/trunk/arch/arm/mach-exynos/common.c index 0ec1a91388c7..742edd3bbec3 100644 --- a/trunk/arch/arm/mach-exynos/common.c +++ b/trunk/arch/arm/mach-exynos/common.c @@ -712,6 +712,31 @@ static int __init exynos4_l2x0_cache_init(void) early_initcall(exynos4_l2x0_cache_init); #endif +static int __init exynos5_l2_cache_init(void) +{ + unsigned int val; + + if (!soc_is_exynos5250()) + return 0; + + asm volatile("mrc p15, 0, %0, c1, c0, 0\n" + "bic %0, %0, #(1 << 2)\n" /* cache disable */ + "mcr p15, 0, %0, c1, c0, 0\n" + "mrc p15, 1, %0, c9, c0, 2\n" + : "=r"(val)); + + val |= (1 << 9) | (1 << 5) | (2 << 6) | (2 << 0); + + asm volatile("mcr p15, 1, %0, c9, c0, 2\n" : : "r"(val)); + asm volatile("mrc p15, 0, %0, c1, c0, 0\n" + "orr %0, %0, #(1 << 2)\n" /* cache enable */ + "mcr p15, 0, %0, c1, c0, 0\n" + : : "r"(val)); + + return 0; +} +early_initcall(exynos5_l2_cache_init); + static int __init exynos_init(void) { printk(KERN_INFO "EXYNOS: Initializing architecture\n"); diff --git a/trunk/arch/arm/mach-exynos/include/mach/spi-clocks.h b/trunk/arch/arm/mach-exynos/include/mach/spi-clocks.h new file mode 100644 index 000000000000..c71a5fba6a84 --- /dev/null +++ b/trunk/arch/arm/mach-exynos/include/mach/spi-clocks.h @@ -0,0 +1,16 @@ +/* linux/arch/arm/mach-exynos4/include/mach/spi-clocks.h + * + * Copyright (C) 2011 Samsung Electronics Co. Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_ARCH_SPI_CLKS_H +#define __ASM_ARCH_SPI_CLKS_H __FILE__ + +/* Must source from SCLK_SPI */ +#define EXYNOS_SPI_SRCCLK_SCLK 0 + +#endif /* __ASM_ARCH_SPI_CLKS_H */ diff --git a/trunk/arch/arm/mach-exynos/mach-nuri.c b/trunk/arch/arm/mach-exynos/mach-nuri.c index f3b328d0aff6..656f8fc9addd 100644 --- a/trunk/arch/arm/mach-exynos/mach-nuri.c +++ b/trunk/arch/arm/mach-exynos/mach-nuri.c @@ -50,6 +50,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-exynos/mach-origen.c b/trunk/arch/arm/mach-exynos/mach-origen.c index 873c708fd340..f5572be9d7bf 100644 --- a/trunk/arch/arm/mach-exynos/mach-origen.c +++ b/trunk/arch/arm/mach-exynos/mach-origen.c @@ -38,6 +38,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-exynos/mach-smdkv310.c b/trunk/arch/arm/mach-exynos/mach-smdkv310.c index 5fb209c4a594..262e9e446a96 100644 --- a/trunk/arch/arm/mach-exynos/mach-smdkv310.c +++ b/trunk/arch/arm/mach-exynos/mach-smdkv310.c @@ -34,6 +34,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-exynos/mach-universal_c210.c b/trunk/arch/arm/mach-exynos/mach-universal_c210.c index 68719f57dcea..cd92fa86ba41 100644 --- a/trunk/arch/arm/mach-exynos/mach-universal_c210.c +++ b/trunk/arch/arm/mach-exynos/mach-universal_c210.c @@ -39,6 +39,7 @@ #include #include #include +#include #include #include #include diff --git a/trunk/arch/arm/mach-imx/Kconfig b/trunk/arch/arm/mach-imx/Kconfig index 0da882a3c063..eff4db5de0dd 100644 --- a/trunk/arch/arm/mach-imx/Kconfig +++ b/trunk/arch/arm/mach-imx/Kconfig @@ -158,6 +158,7 @@ config MACH_MX25_3DS select IMX_HAVE_PLATFORM_IMX2_WDT select IMX_HAVE_PLATFORM_IMXDI_RTC select IMX_HAVE_PLATFORM_IMX_I2C + select IMX_HAVE_PLATFORM_IMX_SSI select IMX_HAVE_PLATFORM_IMX_FB select IMX_HAVE_PLATFORM_IMX_KEYPAD select IMX_HAVE_PLATFORM_IMX_UART diff --git a/trunk/arch/arm/mach-imx/clk-imx6q.c b/trunk/arch/arm/mach-imx/clk-imx6q.c index abb42e7453a9..e1a17ac7b3b4 100644 --- a/trunk/arch/arm/mach-imx/clk-imx6q.c +++ b/trunk/arch/arm/mach-imx/clk-imx6q.c @@ -388,9 +388,12 @@ int __init mx6q_clocks_init(void) pr_err("i.MX6q clk %d: register failed with %ld\n", i, PTR_ERR(clk[i])); + clk_register_clkdev(clk[mmdc_ch0_axi], NULL, "mmdc_ch0_axi"); + clk_register_clkdev(clk[mmdc_ch1_axi], NULL, "mmdc_ch1_axi"); clk_register_clkdev(clk[gpt_ipg], "ipg", "imx-gpt.0"); clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0"); clk_register_clkdev(clk[twd], NULL, "smp_twd"); + clk_register_clkdev(clk[usboh3], NULL, "usboh3"); clk_register_clkdev(clk[uart_serial], "per", "2020000.serial"); clk_register_clkdev(clk[uart_ipg], "ipg", "2020000.serial"); clk_register_clkdev(clk[uart_serial], "per", "21e8000.serial"); diff --git a/trunk/arch/arm/mach-imx/devices-imx21.h b/trunk/arch/arm/mach-imx/devices-imx21.h index 93ece55f75df..2628e0c474dc 100644 --- a/trunk/arch/arm/mach-imx/devices-imx21.h +++ b/trunk/arch/arm/mach-imx/devices-imx21.h @@ -14,7 +14,7 @@ extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data; imx_add_imx21_hcd(&imx21_imx21_hcd_data, pdata) extern const struct imx_imx2_wdt_data imx21_imx2_wdt_data; -#define imx21_add_imx2_wdt() \ +#define imx21_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx21_imx2_wdt_data) extern const struct imx_imx_fb_data imx21_imx_fb_data; @@ -50,7 +50,7 @@ extern const struct imx_mxc_nand_data imx21_mxc_nand_data; imx_add_mxc_nand(&imx21_mxc_nand_data, pdata) extern const struct imx_mxc_w1_data imx21_mxc_w1_data; -#define imx21_add_mxc_w1() \ +#define imx21_add_mxc_w1(pdata) \ imx_add_mxc_w1(&imx21_mxc_w1_data) extern const struct imx_spi_imx_data imx21_cspi_data[]; diff --git a/trunk/arch/arm/mach-imx/devices-imx25.h b/trunk/arch/arm/mach-imx/devices-imx25.h index f8e03dd1f116..efa0761c508d 100644 --- a/trunk/arch/arm/mach-imx/devices-imx25.h +++ b/trunk/arch/arm/mach-imx/devices-imx25.h @@ -24,11 +24,11 @@ extern const struct imx_fsl_usb2_udc_data imx25_fsl_usb2_udc_data; imx_add_fsl_usb2_udc(&imx25_fsl_usb2_udc_data, pdata) extern struct imx_imxdi_rtc_data imx25_imxdi_rtc_data; -#define imx25_add_imxdi_rtc() \ +#define imx25_add_imxdi_rtc(pdata) \ imx_add_imxdi_rtc(&imx25_imxdi_rtc_data) extern const struct imx_imx2_wdt_data imx25_imx2_wdt_data; -#define imx25_add_imx2_wdt() \ +#define imx25_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx25_imx2_wdt_data) extern const struct imx_imx_fb_data imx25_imx_fb_data; diff --git a/trunk/arch/arm/mach-imx/devices-imx27.h b/trunk/arch/arm/mach-imx/devices-imx27.h index 436c5720fe6a..28537a5d9048 100644 --- a/trunk/arch/arm/mach-imx/devices-imx27.h +++ b/trunk/arch/arm/mach-imx/devices-imx27.h @@ -18,7 +18,7 @@ extern const struct imx_fsl_usb2_udc_data imx27_fsl_usb2_udc_data; imx_add_fsl_usb2_udc(&imx27_fsl_usb2_udc_data, pdata) extern const struct imx_imx2_wdt_data imx27_imx2_wdt_data; -#define imx27_add_imx2_wdt() \ +#define imx27_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx27_imx2_wdt_data) extern const struct imx_imx_fb_data imx27_imx_fb_data; @@ -50,7 +50,7 @@ extern const struct imx_imx_uart_1irq_data imx27_imx_uart_data[]; extern const struct imx_mx2_camera_data imx27_mx2_camera_data; #define imx27_add_mx2_camera(pdata) \ imx_add_mx2_camera(&imx27_mx2_camera_data, pdata) -#define imx27_add_mx2_emmaprp() \ +#define imx27_add_mx2_emmaprp(pdata) \ imx_add_mx2_emmaprp(&imx27_mx2_camera_data) extern const struct imx_mxc_ehci_data imx27_mxc_ehci_otg_data; @@ -69,7 +69,7 @@ extern const struct imx_mxc_nand_data imx27_mxc_nand_data; imx_add_mxc_nand(&imx27_mxc_nand_data, pdata) extern const struct imx_mxc_w1_data imx27_mxc_w1_data; -#define imx27_add_mxc_w1() \ +#define imx27_add_mxc_w1(pdata) \ imx_add_mxc_w1(&imx27_mxc_w1_data) extern const struct imx_spi_imx_data imx27_cspi_data[]; diff --git a/trunk/arch/arm/mach-imx/devices-imx31.h b/trunk/arch/arm/mach-imx/devices-imx31.h index 13f533d0aa5c..488e241a6db6 100644 --- a/trunk/arch/arm/mach-imx/devices-imx31.h +++ b/trunk/arch/arm/mach-imx/devices-imx31.h @@ -14,7 +14,7 @@ extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data; imx_add_fsl_usb2_udc(&imx31_fsl_usb2_udc_data, pdata) extern const struct imx_imx2_wdt_data imx31_imx2_wdt_data; -#define imx31_add_imx2_wdt() \ +#define imx31_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx31_imx2_wdt_data) extern const struct imx_imx_i2c_data imx31_imx_i2c_data[]; @@ -65,11 +65,11 @@ extern const struct imx_mxc_nand_data imx31_mxc_nand_data; imx_add_mxc_nand(&imx31_mxc_nand_data, pdata) extern const struct imx_mxc_rtc_data imx31_mxc_rtc_data; -#define imx31_add_mxc_rtc() \ +#define imx31_add_mxc_rtc(pdata) \ imx_add_mxc_rtc(&imx31_mxc_rtc_data) extern const struct imx_mxc_w1_data imx31_mxc_w1_data; -#define imx31_add_mxc_w1() \ +#define imx31_add_mxc_w1(pdata) \ imx_add_mxc_w1(&imx31_mxc_w1_data) extern const struct imx_spi_imx_data imx31_cspi_data[]; diff --git a/trunk/arch/arm/mach-imx/devices-imx35.h b/trunk/arch/arm/mach-imx/devices-imx35.h index 27245ce9cab2..7b99ef0bb501 100644 --- a/trunk/arch/arm/mach-imx/devices-imx35.h +++ b/trunk/arch/arm/mach-imx/devices-imx35.h @@ -24,7 +24,7 @@ extern const struct imx_flexcan_data imx35_flexcan_data[]; #define imx35_add_flexcan1(pdata) imx35_add_flexcan(1, pdata) extern const struct imx_imx2_wdt_data imx35_imx2_wdt_data; -#define imx35_add_imx2_wdt() \ +#define imx35_add_imx2_wdt(pdata) \ imx_add_imx2_wdt(&imx35_imx2_wdt_data) extern const struct imx_imx_i2c_data imx35_imx_i2c_data[]; @@ -69,7 +69,7 @@ extern const struct imx_mxc_nand_data imx35_mxc_nand_data; imx_add_mxc_nand(&imx35_mxc_nand_data, pdata) extern const struct imx_mxc_w1_data imx35_mxc_w1_data; -#define imx35_add_mxc_w1() \ +#define imx35_add_mxc_w1(pdata) \ imx_add_mxc_w1(&imx35_mxc_w1_data) extern const struct imx_sdhci_esdhc_imx_data imx35_sdhci_esdhc_imx_data[]; diff --git a/trunk/arch/arm/mach-imx/devices-imx51.h b/trunk/arch/arm/mach-imx/devices-imx51.h index 9f1718725195..af488bc0e225 100644 --- a/trunk/arch/arm/mach-imx/devices-imx51.h +++ b/trunk/arch/arm/mach-imx/devices-imx51.h @@ -55,7 +55,7 @@ extern const struct imx_spi_imx_data imx51_ecspi_data[]; imx_add_spi_imx(&imx51_ecspi_data[id], pdata) extern const struct imx_imx2_wdt_data imx51_imx2_wdt_data[]; -#define imx51_add_imx2_wdt(id) \ +#define imx51_add_imx2_wdt(id, pdata) \ imx_add_imx2_wdt(&imx51_imx2_wdt_data[id]) extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[]; diff --git a/trunk/arch/arm/mach-imx/devices-imx53.h b/trunk/arch/arm/mach-imx/devices-imx53.h index 77e0db96c448..6e1e5d1f8c3a 100644 --- a/trunk/arch/arm/mach-imx/devices-imx53.h +++ b/trunk/arch/arm/mach-imx/devices-imx53.h @@ -30,7 +30,7 @@ extern const struct imx_spi_imx_data imx53_ecspi_data[]; imx_add_spi_imx(&imx53_ecspi_data[id], pdata) extern const struct imx_imx2_wdt_data imx53_imx2_wdt_data[]; -#define imx53_add_imx2_wdt(id) \ +#define imx53_add_imx2_wdt(id, pdata) \ imx_add_imx2_wdt(&imx53_imx2_wdt_data[id]) extern const struct imx_imx_ssi_data imx53_imx_ssi_data[]; diff --git a/trunk/arch/arm/mach-imx/imx27-dt.c b/trunk/arch/arm/mach-imx/imx27-dt.c index 52efe4d5149b..eee0cc8d92a4 100644 --- a/trunk/arch/arm/mach-imx/imx27-dt.c +++ b/trunk/arch/arm/mach-imx/imx27-dt.c @@ -75,7 +75,7 @@ static struct sys_timer imx27_timer = { .init = imx27_timer_init, }; -static const char * const imx27_dt_board_compat[] __initconst = { +static const char *imx27_dt_board_compat[] __initdata = { "fsl,imx27", NULL }; diff --git a/trunk/arch/arm/mach-imx/mach-cpuimx27.c b/trunk/arch/arm/mach-imx/mach-cpuimx27.c index 9a3b06e688c5..d085aea08709 100644 --- a/trunk/arch/arm/mach-imx/mach-cpuimx27.c +++ b/trunk/arch/arm/mach-imx/mach-cpuimx27.c @@ -233,18 +233,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .phy_mode = FSL_USB2_PHY_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init eukrea_cpuimx27_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", eukrea_cpuimx27_otg_mode); @@ -266,8 +266,8 @@ static void __init eukrea_cpuimx27_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - imx27_add_imx2_wdt(); - imx27_add_mxc_w1(); + imx27_add_imx2_wdt(NULL); + imx27_add_mxc_w1(NULL); #if defined(CONFIG_MACH_EUKREA_CPUIMX27_USESDHC2) /* SDHC2 can be used for Wifi */ diff --git a/trunk/arch/arm/mach-imx/mach-cpuimx35.c b/trunk/arch/arm/mach-imx/mach-cpuimx35.c index 1634e54ffed5..6450303f1a7a 100644 --- a/trunk/arch/arm/mach-imx/mach-cpuimx35.c +++ b/trunk/arch/arm/mach-imx/mach-cpuimx35.c @@ -141,18 +141,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .workaround = FLS_USB2_WORKAROUND_ENGCM09152, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init eukrea_cpuimx35_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", eukrea_cpuimx35_otg_mode); @@ -167,7 +167,7 @@ static void __init eukrea_cpuimx35_init(void) ARRAY_SIZE(eukrea_cpuimx35_pads)); imx35_add_fec(NULL); - imx35_add_imx2_wdt(); + imx35_add_imx2_wdt(NULL); imx35_add_imx_uart0(&uart_pdata); imx35_add_mxc_nand(&eukrea_cpuimx35_nand_board_info); diff --git a/trunk/arch/arm/mach-imx/mach-cpuimx51sd.c b/trunk/arch/arm/mach-imx/mach-cpuimx51sd.c index e78b40b41462..1e09de50cbcd 100644 --- a/trunk/arch/arm/mach-imx/mach-cpuimx51sd.c +++ b/trunk/arch/arm/mach-imx/mach-cpuimx51sd.c @@ -217,18 +217,18 @@ static const struct mxc_usbh_platform_data usbh1_config __initconst = { .portsc = MXC_EHCI_MODE_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init eukrea_cpuimx51sd_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", eukrea_cpuimx51sd_otg_mode); @@ -292,7 +292,7 @@ static void __init eukrea_cpuimx51sd_init(void) imx51_add_imx_uart(0, &uart_pdata); imx51_add_mxc_nand(&eukrea_cpuimx51sd_nand_board_info); - imx51_add_imx2_wdt(0); + imx51_add_imx2_wdt(0, NULL); gpio_request(ETH_RST, "eth_rst"); gpio_set_value(ETH_RST, 1); diff --git a/trunk/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/trunk/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index 017bbb70ea41..d1e04e676e33 100644 --- a/trunk/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/trunk/arch/arm/mach-imx/mach-eukrea_cpuimx25.c @@ -109,18 +109,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .workaround = FLS_USB2_WORKAROUND_ENGCM09152, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init eukrea_cpuimx25_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", eukrea_cpuimx25_otg_mode); @@ -134,9 +134,9 @@ static void __init eukrea_cpuimx25_init(void) imx25_add_imx_uart0(&uart_pdata); imx25_add_mxc_nand(&eukrea_cpuimx25_nand_board_info); - imx25_add_imxdi_rtc(); + imx25_add_imxdi_rtc(NULL); imx25_add_fec(&mx25_fec_pdata); - imx25_add_imx2_wdt(); + imx25_add_imx2_wdt(NULL); i2c_register_board_info(0, eukrea_cpuimx25_i2c_devices, ARRAY_SIZE(eukrea_cpuimx25_i2c_devices)); diff --git a/trunk/arch/arm/mach-imx/mach-imx27ipcam.c b/trunk/arch/arm/mach-imx/mach-imx27ipcam.c index 7381387a8905..c9d350c5dcc8 100644 --- a/trunk/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/trunk/arch/arm/mach-imx/mach-imx27ipcam.c @@ -57,7 +57,7 @@ static void __init mx27ipcam_init(void) imx27_add_imx_uart0(NULL); imx27_add_fec(NULL); - imx27_add_imx2_wdt(); + imx27_add_imx2_wdt(NULL); } static void __init mx27ipcam_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-mx25_3ds.c b/trunk/arch/arm/mach-imx/mach-mx25_3ds.c index ce247fd1269a..f26734298aa6 100644 --- a/trunk/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx25_3ds.c @@ -237,9 +237,9 @@ static void __init mx25pdk_init(void) imx25_add_fsl_usb2_udc(&otg_device_pdata); imx25_add_mxc_ehci_hs(&usbh2_pdata); imx25_add_mxc_nand(&mx25pdk_nand_board_info); - imx25_add_imxdi_rtc(); + imx25_add_imxdi_rtc(NULL); imx25_add_imx_fb(&mx25pdk_fb_pdata); - imx25_add_imx2_wdt(); + imx25_add_imx2_wdt(NULL); mx25pdk_fec_reset(); imx25_add_fec(&mx25_fec_pdata); diff --git a/trunk/arch/arm/mach-imx/mach-mx27_3ds.c b/trunk/arch/arm/mach-imx/mach-mx27_3ds.c index ce9a5c26290c..c6d385c52257 100644 --- a/trunk/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx27_3ds.c @@ -241,18 +241,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .phy_mode = FSL_USB2_PHY_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init mx27_3ds_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", mx27_3ds_otg_mode); @@ -480,7 +480,7 @@ static void __init mx27pdk_init(void) imx27_add_fec(NULL); imx27_add_imx_keypad(&mx27_3ds_keymap_data); imx27_add_mxc_mmc(0, &sdhc1_pdata); - imx27_add_imx2_wdt(); + imx27_add_imx2_wdt(NULL); otg_phy_init(); if (otg_mode_host) { diff --git a/trunk/arch/arm/mach-imx/mach-mx27ads.c b/trunk/arch/arm/mach-imx/mach-mx27ads.c index 7936bb32264d..0228d2e07fe0 100644 --- a/trunk/arch/arm/mach-imx/mach-mx27ads.c +++ b/trunk/arch/arm/mach-imx/mach-mx27ads.c @@ -310,7 +310,7 @@ static void __init mx27ads_board_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - imx27_add_mxc_w1(); + imx27_add_mxc_w1(NULL); } static void __init mx27ads_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-mx31_3ds.c b/trunk/arch/arm/mach-imx/mach-mx31_3ds.c index 928e1dcbc6a7..4eafdf275ea2 100644 --- a/trunk/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx31_3ds.c @@ -671,18 +671,18 @@ static const struct fsl_usb2_platform_data usbotg_pdata __initconst = { .phy_mode = FSL_USB2_PHY_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init mx31_3ds_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", mx31_3ds_otg_mode); @@ -739,7 +739,7 @@ static void __init mx31_3ds_init(void) if (mxc_expio_init(MX31_CS5_BASE_ADDR, EXPIO_PARENT_INT)) printk(KERN_WARNING "Init of the debug board failed, all " "devices on the debug board are unusable.\n"); - imx31_add_imx2_wdt(); + imx31_add_imx2_wdt(NULL); imx31_add_imx_i2c0(&mx31_3ds_i2c0_data); imx31_add_mxc_mmc(0, &sdhc1_pdata); diff --git a/trunk/arch/arm/mach-imx/mach-mx31moboard.c b/trunk/arch/arm/mach-imx/mach-mx31moboard.c index 63e84e67b990..016791f038b0 100644 --- a/trunk/arch/arm/mach-imx/mach-mx31moboard.c +++ b/trunk/arch/arm/mach-imx/mach-mx31moboard.c @@ -544,7 +544,7 @@ static void __init mx31moboard_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); gpio_led_register_device(-1, &mx31moboard_led_pdata); - imx31_add_imx2_wdt(); + imx31_add_imx2_wdt(NULL); imx31_add_imx_uart0(&uart0_pdata); imx31_add_imx_uart4(&uart4_pdata); diff --git a/trunk/arch/arm/mach-imx/mach-mx35_3ds.c b/trunk/arch/arm/mach-imx/mach-mx35_3ds.c index 6bff87907317..28aa19476de7 100644 --- a/trunk/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx35_3ds.c @@ -540,18 +540,18 @@ static const struct mxc_usbh_platform_data usb_host_pdata __initconst = { .portsc = MXC_EHCI_MODE_SERIAL, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init mx35_3ds_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", mx35_3ds_otg_mode); @@ -571,7 +571,7 @@ static void __init mx35_3ds_init(void) mxc_iomux_v3_setup_multiple_pads(mx35pdk_pads, ARRAY_SIZE(mx35pdk_pads)); imx35_add_fec(NULL); - imx35_add_imx2_wdt(); + imx35_add_imx2_wdt(NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); imx35_add_imx_uart0(&uart_pdata); diff --git a/trunk/arch/arm/mach-imx/mach-mx51_3ds.c b/trunk/arch/arm/mach-imx/mach-mx51_3ds.c index 2edb563b968d..3c5b163923f6 100644 --- a/trunk/arch/arm/mach-imx/mach-mx51_3ds.c +++ b/trunk/arch/arm/mach-imx/mach-mx51_3ds.c @@ -154,7 +154,7 @@ static void __init mx51_3ds_init(void) imx51_add_sdhci_esdhc_imx(0, NULL); imx51_add_imx_keypad(&mx51_3ds_map_data); - imx51_add_imx2_wdt(0); + imx51_add_imx2_wdt(0, NULL); } static void __init mx51_3ds_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-mx51_babbage.c b/trunk/arch/arm/mach-imx/mach-mx51_babbage.c index 7b31cbde8775..dde397014d4b 100644 --- a/trunk/arch/arm/mach-imx/mach-mx51_babbage.c +++ b/trunk/arch/arm/mach-imx/mach-mx51_babbage.c @@ -307,18 +307,18 @@ static const struct mxc_usbh_platform_data usbh1_config __initconst = { .portsc = MXC_EHCI_MODE_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init babbage_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", babbage_otg_mode); @@ -411,7 +411,7 @@ static void __init mx51_babbage_init(void) spi_register_board_info(mx51_babbage_spi_board_info, ARRAY_SIZE(mx51_babbage_spi_board_info)); imx51_add_ecspi(0, &mx51_babbage_spi_pdata); - imx51_add_imx2_wdt(0); + imx51_add_imx2_wdt(0, NULL); } static void __init mx51_babbage_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-mx53_ard.c b/trunk/arch/arm/mach-imx/mach-mx53_ard.c index 4a7593a953e2..05641980dc5e 100644 --- a/trunk/arch/arm/mach-imx/mach-mx53_ard.c +++ b/trunk/arch/arm/mach-imx/mach-mx53_ard.c @@ -243,7 +243,7 @@ static void __init mx53_ard_board_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); - imx53_add_imx2_wdt(0); + imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(1, &mx53_ard_i2c2_data); imx53_add_imx_i2c(2, &mx53_ard_i2c3_data); imx_add_gpio_keys(&ard_button_data); diff --git a/trunk/arch/arm/mach-imx/mach-mx53_evk.c b/trunk/arch/arm/mach-imx/mach-mx53_evk.c index a1060b26fb23..5a72188b9cdb 100644 --- a/trunk/arch/arm/mach-imx/mach-mx53_evk.c +++ b/trunk/arch/arm/mach-imx/mach-mx53_evk.c @@ -154,7 +154,7 @@ static void __init mx53_evk_board_init(void) spi_register_board_info(mx53_evk_spi_board_info, ARRAY_SIZE(mx53_evk_spi_board_info)); imx53_add_ecspi(0, &mx53_evk_spi_data); - imx53_add_imx2_wdt(0); + imx53_add_imx2_wdt(0, NULL); gpio_led_register_device(-1, &mx53evk_leds_data); } diff --git a/trunk/arch/arm/mach-imx/mach-mx53_loco.c b/trunk/arch/arm/mach-imx/mach-mx53_loco.c index 388c415d6b62..37f67cac15a4 100644 --- a/trunk/arch/arm/mach-imx/mach-mx53_loco.c +++ b/trunk/arch/arm/mach-imx/mach-mx53_loco.c @@ -283,7 +283,7 @@ static void __init mx53_loco_board_init(void) imx53_add_imx_uart(0, NULL); mx53_loco_fec_reset(); imx53_add_fec(&mx53_loco_fec_data); - imx53_add_imx2_wdt(0); + imx53_add_imx2_wdt(0, NULL); ret = gpio_request_one(LOCO_ACCEL_EN, GPIOF_OUT_INIT_HIGH, "accel_en"); if (ret) diff --git a/trunk/arch/arm/mach-imx/mach-mx53_smd.c b/trunk/arch/arm/mach-imx/mach-mx53_smd.c index f297df7ccb39..8e972c5c3e13 100644 --- a/trunk/arch/arm/mach-imx/mach-mx53_smd.c +++ b/trunk/arch/arm/mach-imx/mach-mx53_smd.c @@ -138,7 +138,7 @@ static void __init mx53_smd_board_init(void) mx53_smd_init_uart(); mx53_smd_fec_reset(); imx53_add_fec(&mx53_smd_fec_data); - imx53_add_imx2_wdt(0); + imx53_add_imx2_wdt(0, NULL); imx53_add_imx_i2c(0, &mx53_smd_i2c_data); imx53_add_sdhci_esdhc_imx(0, NULL); imx53_add_sdhci_esdhc_imx(1, NULL); diff --git a/trunk/arch/arm/mach-imx/mach-pca100.c b/trunk/arch/arm/mach-imx/mach-pca100.c index d37ed25003b2..541152e450c4 100644 --- a/trunk/arch/arm/mach-imx/mach-pca100.c +++ b/trunk/arch/arm/mach-imx/mach-pca100.c @@ -298,18 +298,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .phy_mode = FSL_USB2_PHY_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init pca100_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", pca100_otg_mode); @@ -408,8 +408,8 @@ static void __init pca100_init(void) imx27_add_imx_fb(&pca100_fb_data); imx27_add_fec(NULL); - imx27_add_imx2_wdt(); - imx27_add_mxc_w1(); + imx27_add_imx2_wdt(NULL); + imx27_add_mxc_w1(NULL); } static void __init pca100_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-pcm037.c b/trunk/arch/arm/mach-imx/mach-pcm037.c index cd48712a6f50..0a40004154f2 100644 --- a/trunk/arch/arm/mach-imx/mach-pcm037.c +++ b/trunk/arch/arm/mach-imx/mach-pcm037.c @@ -557,18 +557,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .phy_mode = FSL_USB2_PHY_ULPI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init pcm037_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", pcm037_otg_mode); @@ -619,13 +619,13 @@ static void __init pcm037_init(void) platform_add_devices(devices, ARRAY_SIZE(devices)); - imx31_add_imx2_wdt(); + imx31_add_imx2_wdt(NULL); imx31_add_imx_uart0(&uart_pdata); /* XXX: should't this have .flags = 0 (i.e. no RTSCTS) on PCM037_EET? */ imx31_add_imx_uart1(&uart_pdata); imx31_add_imx_uart2(&uart_pdata); - imx31_add_mxc_w1(); + imx31_add_mxc_w1(NULL); /* LAN9217 IRQ pin */ ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_GPIO3_1), "lan9217-irq"); diff --git a/trunk/arch/arm/mach-imx/mach-pcm038.c b/trunk/arch/arm/mach-imx/mach-pcm038.c index 3fbb89d74fcc..2f3debe2a113 100644 --- a/trunk/arch/arm/mach-imx/mach-pcm038.c +++ b/trunk/arch/arm/mach-imx/mach-pcm038.c @@ -332,8 +332,8 @@ static void __init pcm038_init(void) imx27_add_fec(NULL); platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); - imx27_add_imx2_wdt(); - imx27_add_mxc_w1(); + imx27_add_imx2_wdt(NULL); + imx27_add_mxc_w1(NULL); #ifdef CONFIG_MACH_PCM970_BASEBOARD pcm970_baseboard_init(); diff --git a/trunk/arch/arm/mach-imx/mach-pcm043.c b/trunk/arch/arm/mach-imx/mach-pcm043.c index 1f20f222375e..73585f55cca0 100644 --- a/trunk/arch/arm/mach-imx/mach-pcm043.c +++ b/trunk/arch/arm/mach-imx/mach-pcm043.c @@ -330,18 +330,18 @@ static const struct fsl_usb2_platform_data otg_device_pdata __initconst = { .phy_mode = FSL_USB2_PHY_UTMI, }; -static bool otg_mode_host __initdata; +static int otg_mode_host; static int __init pcm043_otg_mode(char *options) { if (!strcmp(options, "host")) - otg_mode_host = true; + otg_mode_host = 1; else if (!strcmp(options, "device")) - otg_mode_host = false; + otg_mode_host = 0; else pr_info("otg_mode neither \"host\" nor \"device\". " "Defaulting to device\n"); - return 1; + return 0; } __setup("otg_mode=", pcm043_otg_mode); @@ -363,7 +363,7 @@ static void __init pcm043_init(void) imx35_add_fec(NULL); platform_add_devices(devices, ARRAY_SIZE(devices)); - imx35_add_imx2_wdt(); + imx35_add_imx2_wdt(NULL); imx35_add_imx_uart0(&uart_pdata); imx35_add_mxc_nand(&pcm037_nand_board_info); diff --git a/trunk/arch/arm/mach-imx/mach-qong.c b/trunk/arch/arm/mach-imx/mach-qong.c index a13087b11a6e..260621055b6b 100644 --- a/trunk/arch/arm/mach-imx/mach-qong.c +++ b/trunk/arch/arm/mach-imx/mach-qong.c @@ -252,7 +252,7 @@ static void __init qong_init(void) mxc_init_imx_uart(); qong_init_nor_mtd(); qong_init_fpga(); - imx31_add_imx2_wdt(); + imx31_add_imx2_wdt(NULL); } static void __init qong_timer_init(void) diff --git a/trunk/arch/arm/mach-imx/mach-vpr200.c b/trunk/arch/arm/mach-imx/mach-vpr200.c index b26209d4bcef..add8c69c6c1a 100644 --- a/trunk/arch/arm/mach-imx/mach-vpr200.c +++ b/trunk/arch/arm/mach-imx/mach-vpr200.c @@ -272,7 +272,7 @@ static void __init vpr200_board_init(void) mxc_iomux_v3_setup_multiple_pads(vpr200_pads, ARRAY_SIZE(vpr200_pads)); imx35_add_fec(NULL); - imx35_add_imx2_wdt(); + imx35_add_imx2_wdt(NULL); imx_add_gpio_keys(&vpr200_gpio_keys_data); platform_add_devices(devices, ARRAY_SIZE(devices)); diff --git a/trunk/arch/arm/mach-imx/mx31lite-db.c b/trunk/arch/arm/mach-imx/mx31lite-db.c index fa60ef6ac7ff..bf0fb87946ba 100644 --- a/trunk/arch/arm/mach-imx/mx31lite-db.c +++ b/trunk/arch/arm/mach-imx/mx31lite-db.c @@ -191,6 +191,6 @@ void __init mx31lite_db_init(void) imx31_add_mxc_mmc(0, &mmc_pdata); imx31_add_spi_imx0(&spi0_pdata); gpio_led_register_device(-1, &litekit_led_platform_data); - imx31_add_imx2_wdt(); - imx31_add_mxc_rtc(); + imx31_add_imx2_wdt(NULL); + imx31_add_mxc_rtc(NULL); } diff --git a/trunk/arch/arm/mach-omap1/board-ams-delta.c b/trunk/arch/arm/mach-omap1/board-ams-delta.c index c53469802c03..f2f8a5847018 100644 --- a/trunk/arch/arm/mach-omap1/board-ams-delta.c +++ b/trunk/arch/arm/mach-omap1/board-ams-delta.c @@ -37,12 +37,12 @@ #include #include #include +#include #include #include #include #include -#include #include "iomap.h" #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-generic.c b/trunk/arch/arm/mach-omap1/board-generic.c index 6ec385e2b98e..e75e2d55a2d7 100644 --- a/trunk/arch/arm/mach-omap1/board-generic.c +++ b/trunk/arch/arm/mach-omap1/board-generic.c @@ -23,10 +23,8 @@ #include #include +#include #include - -#include - #include "common.h" /* assume no Mini-AB port */ diff --git a/trunk/arch/arm/mach-omap1/board-h2.c b/trunk/arch/arm/mach-omap1/board-h2.c index 44a4ab195fbc..a28e989a63f4 100644 --- a/trunk/arch/arm/mach-omap1/board-h2.c +++ b/trunk/arch/arm/mach-omap1/board-h2.c @@ -40,11 +40,11 @@ #include #include #include +#include #include #include #include -#include #include "common.h" #include "board-h2.h" diff --git a/trunk/arch/arm/mach-omap1/board-h3.c b/trunk/arch/arm/mach-omap1/board-h3.c index 86cb5a04a404..108a8640fc6f 100644 --- a/trunk/arch/arm/mach-omap1/board-h3.c +++ b/trunk/arch/arm/mach-omap1/board-h3.c @@ -40,13 +40,13 @@ #include #include +#include #include #include #include #include #include -#include #include "common.h" #include "board-h3.h" diff --git a/trunk/arch/arm/mach-omap1/board-htcherald.c b/trunk/arch/arm/mach-omap1/board-htcherald.c index b3f6e943e661..118a9d4a4c54 100644 --- a/trunk/arch/arm/mach-omap1/board-htcherald.c +++ b/trunk/arch/arm/mach-omap1/board-htcherald.c @@ -44,10 +44,10 @@ #include #include #include +#include #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-innovator.c b/trunk/arch/arm/mach-omap1/board-innovator.c index f21c2966daad..7970223a559d 100644 --- a/trunk/arch/arm/mach-omap1/board-innovator.c +++ b/trunk/arch/arm/mach-omap1/board-innovator.c @@ -35,11 +35,11 @@ #include #include #include +#include #include #include #include -#include #include "iomap.h" #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-nokia770.c b/trunk/arch/arm/mach-omap1/board-nokia770.c index 4007a372481b..7212ae97f44a 100644 --- a/trunk/arch/arm/mach-omap1/board-nokia770.c +++ b/trunk/arch/arm/mach-omap1/board-nokia770.c @@ -26,6 +26,7 @@ #include #include +#include #include #include #include @@ -33,7 +34,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index 8784705edb60..da8d872d3d1c 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -45,11 +45,11 @@ #include #include +#include #include #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-palmte.c b/trunk/arch/arm/mach-omap1/board-palmte.c index 26bcb9defcdc..949b62a73693 100644 --- a/trunk/arch/arm/mach-omap1/board-palmte.c +++ b/trunk/arch/arm/mach-omap1/board-palmte.c @@ -35,6 +35,7 @@ #include #include +#include #include #include #include @@ -42,7 +43,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-palmtt.c b/trunk/arch/arm/mach-omap1/board-palmtt.c index 4d099446dfa8..7f1e1cf2bf46 100644 --- a/trunk/arch/arm/mach-omap1/board-palmtt.c +++ b/trunk/arch/arm/mach-omap1/board-palmtt.c @@ -35,6 +35,7 @@ #include #include #include +#include #include #include #include @@ -42,7 +43,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-palmz71.c b/trunk/arch/arm/mach-omap1/board-palmz71.c index cc71a26723ef..3c71c6bace2c 100644 --- a/trunk/arch/arm/mach-omap1/board-palmz71.c +++ b/trunk/arch/arm/mach-omap1/board-palmz71.c @@ -37,6 +37,7 @@ #include #include +#include #include #include #include @@ -44,7 +45,6 @@ #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-sx1.c b/trunk/arch/arm/mach-omap1/board-sx1.c index 8c665bd16ac2..3b7b82b13684 100644 --- a/trunk/arch/arm/mach-omap1/board-sx1.c +++ b/trunk/arch/arm/mach-omap1/board-sx1.c @@ -37,13 +37,13 @@ #include #include #include +#include #include #include #include #include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/board-voiceblue.c b/trunk/arch/arm/mach-omap1/board-voiceblue.c index 3497769eb353..afd67f0ec495 100644 --- a/trunk/arch/arm/mach-omap1/board-voiceblue.c +++ b/trunk/arch/arm/mach-omap1/board-voiceblue.c @@ -35,10 +35,9 @@ #include #include #include -#include +#include #include -#include #include "common.h" diff --git a/trunk/arch/arm/mach-omap1/clock_data.c b/trunk/arch/arm/mach-omap1/clock_data.c index c007d80dfb62..c6ce93f71d08 100644 --- a/trunk/arch/arm/mach-omap1/clock_data.c +++ b/trunk/arch/arm/mach-omap1/clock_data.c @@ -25,11 +25,10 @@ #include #include #include -#include #include /* for omap_sram_reprogram_clock() */ +#include /* for OTG_BASE */ #include -#include /* for OTG_BASE */ #include "iomap.h" #include "clock.h" diff --git a/trunk/arch/arm/mach-omap1/include/mach/usb.h b/trunk/arch/arm/mach-omap1/include/mach/usb.h deleted file mode 100644 index 753cd5ce6949..000000000000 --- a/trunk/arch/arm/mach-omap1/include/mach/usb.h +++ /dev/null @@ -1,165 +0,0 @@ -/* - * FIXME correct answer depends on hmc_mode, - * as does (on omap1) any nonzero value for config->otg port number - */ -#ifdef CONFIG_USB_GADGET_OMAP -#define is_usb0_device(config) 1 -#else -#define is_usb0_device(config) 0 -#endif - -struct omap_usb_config { - /* Configure drivers according to the connectors on your board: - * - "A" connector (rectagular) - * ... for host/OHCI use, set "register_host". - * - "B" connector (squarish) or "Mini-B" - * ... for device/gadget use, set "register_dev". - * - "Mini-AB" connector (very similar to Mini-B) - * ... for OTG use as device OR host, initialize "otg" - */ - unsigned register_host:1; - unsigned register_dev:1; - u8 otg; /* port number, 1-based: usb1 == 2 */ - - u8 hmc_mode; - - /* implicitly true if otg: host supports remote wakeup? */ - u8 rwc; - - /* signaling pins used to talk to transceiver on usbN: - * 0 == usbN unused - * 2 == usb0-only, using internal transceiver - * 3 == 3 wire bidirectional - * 4 == 4 wire bidirectional - * 6 == 6 wire unidirectional (or TLL) - */ - u8 pins[3]; - - struct platform_device *udc_device; - struct platform_device *ohci_device; - struct platform_device *otg_device; - - u32 (*usb0_init)(unsigned nwires, unsigned is_device); - u32 (*usb1_init)(unsigned nwires); - u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); - - int (*ocpi_enable)(void); -}; - -void omap_otg_init(struct omap_usb_config *config); - -#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE) -void omap1_usb_init(struct omap_usb_config *pdata); -#else -static inline void omap1_usb_init(struct omap_usb_config *pdata) -{ -} -#endif - -#define OMAP1_OTG_BASE 0xfffb0400 -#define OMAP1_UDC_BASE 0xfffb4000 -#define OMAP1_OHCI_BASE 0xfffba000 - -#define OMAP2_OHCI_BASE 0x4805e000 -#define OMAP2_UDC_BASE 0x4805e200 -#define OMAP2_OTG_BASE 0x4805e300 -#define OTG_BASE OMAP1_OTG_BASE -#define UDC_BASE OMAP1_UDC_BASE -#define OMAP_OHCI_BASE OMAP1_OHCI_BASE - -/* - * OTG and transceiver registers, for OMAPs starting with ARM926 - */ -#define OTG_REV (OTG_BASE + 0x00) -#define OTG_SYSCON_1 (OTG_BASE + 0x04) -# define USB2_TRX_MODE(w) (((w)>>24)&0x07) -# define USB1_TRX_MODE(w) (((w)>>20)&0x07) -# define USB0_TRX_MODE(w) (((w)>>16)&0x07) -# define OTG_IDLE_EN (1 << 15) -# define HST_IDLE_EN (1 << 14) -# define DEV_IDLE_EN (1 << 13) -# define OTG_RESET_DONE (1 << 2) -# define OTG_SOFT_RESET (1 << 1) -#define OTG_SYSCON_2 (OTG_BASE + 0x08) -# define OTG_EN (1 << 31) -# define USBX_SYNCHRO (1 << 30) -# define OTG_MST16 (1 << 29) -# define SRP_GPDATA (1 << 28) -# define SRP_GPDVBUS (1 << 27) -# define SRP_GPUVBUS(w) (((w)>>24)&0x07) -# define A_WAIT_VRISE(w) (((w)>>20)&0x07) -# define B_ASE_BRST(w) (((w)>>16)&0x07) -# define SRP_DPW (1 << 14) -# define SRP_DATA (1 << 13) -# define SRP_VBUS (1 << 12) -# define OTG_PADEN (1 << 10) -# define HMC_PADEN (1 << 9) -# define UHOST_EN (1 << 8) -# define HMC_TLLSPEED (1 << 7) -# define HMC_TLLATTACH (1 << 6) -# define OTG_HMC(w) (((w)>>0)&0x3f) -#define OTG_CTRL (OTG_BASE + 0x0c) -# define OTG_USB2_EN (1 << 29) -# define OTG_USB2_DP (1 << 28) -# define OTG_USB2_DM (1 << 27) -# define OTG_USB1_EN (1 << 26) -# define OTG_USB1_DP (1 << 25) -# define OTG_USB1_DM (1 << 24) -# define OTG_USB0_EN (1 << 23) -# define OTG_USB0_DP (1 << 22) -# define OTG_USB0_DM (1 << 21) -# define OTG_ASESSVLD (1 << 20) -# define OTG_BSESSEND (1 << 19) -# define OTG_BSESSVLD (1 << 18) -# define OTG_VBUSVLD (1 << 17) -# define OTG_ID (1 << 16) -# define OTG_DRIVER_SEL (1 << 15) -# define OTG_A_SETB_HNPEN (1 << 12) -# define OTG_A_BUSREQ (1 << 11) -# define OTG_B_HNPEN (1 << 9) -# define OTG_B_BUSREQ (1 << 8) -# define OTG_BUSDROP (1 << 7) -# define OTG_PULLDOWN (1 << 5) -# define OTG_PULLUP (1 << 4) -# define OTG_DRV_VBUS (1 << 3) -# define OTG_PD_VBUS (1 << 2) -# define OTG_PU_VBUS (1 << 1) -# define OTG_PU_ID (1 << 0) -#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ -# define DRIVER_SWITCH (1 << 15) -# define A_VBUS_ERR (1 << 13) -# define A_REQ_TMROUT (1 << 12) -# define A_SRP_DETECT (1 << 11) -# define B_HNP_FAIL (1 << 10) -# define B_SRP_TMROUT (1 << 9) -# define B_SRP_DONE (1 << 8) -# define B_SRP_STARTED (1 << 7) -# define OPRT_CHG (1 << 0) -#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ - // same bits as in IRQ_EN -#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ -# define OTGVPD (1 << 14) -# define OTGVPU (1 << 13) -# define OTGPUID (1 << 12) -# define USB2VDR (1 << 10) -# define USB2PDEN (1 << 9) -# define USB2PUEN (1 << 8) -# define USB1VDR (1 << 6) -# define USB1PDEN (1 << 5) -# define USB1PUEN (1 << 4) -# define USB0VDR (1 << 2) -# define USB0PDEN (1 << 1) -# define USB0PUEN (1 << 0) -#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ -#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ - -/*-------------------------------------------------------------------------*/ - -/* OMAP1 */ -#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) -# define CONF_USB2_UNI_R (1 << 8) -# define CONF_USB1_UNI_R (1 << 7) -# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) -# define CONF_USB0_ISOLATE_R (1 << 3) -# define CONF_USB_PWRDN_DM_R (1 << 2) -# define CONF_USB_PWRDN_DP_R (1 << 1) diff --git a/trunk/arch/arm/mach-omap1/usb.c b/trunk/arch/arm/mach-omap1/usb.c index 65f88176fba8..e61afd922766 100644 --- a/trunk/arch/arm/mach-omap1/usb.c +++ b/trunk/arch/arm/mach-omap1/usb.c @@ -27,8 +27,7 @@ #include #include - -#include +#include #include "common.h" @@ -56,119 +55,6 @@ #define INT_USB_IRQ_HGEN INT_USB_HHC_1 #define INT_USB_IRQ_OTG IH2_BASE + 8 -#ifdef CONFIG_ARCH_OMAP_OTG - -void __init -omap_otg_init(struct omap_usb_config *config) -{ - u32 syscon; - int alt_pingroup = 0; - - /* NOTE: no bus or clock setup (yet?) */ - - syscon = omap_readl(OTG_SYSCON_1) & 0xffff; - if (!(syscon & OTG_RESET_DONE)) - pr_debug("USB resets not complete?\n"); - - //omap_writew(0, OTG_IRQ_EN); - - /* pin muxing and transceiver pinouts */ - if (config->pins[0] > 2) /* alt pingroup 2 */ - alt_pingroup = 1; - syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); - syscon |= config->usb1_init(config->pins[1]); - syscon |= config->usb2_init(config->pins[2], alt_pingroup); - pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); - omap_writel(syscon, OTG_SYSCON_1); - - syscon = config->hmc_mode; - syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; -#ifdef CONFIG_USB_OTG - if (config->otg) - syscon |= OTG_EN; -#endif - if (cpu_class_is_omap1()) - pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", - omap_readl(USB_TRANSCEIVER_CTRL)); - pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); - omap_writel(syscon, OTG_SYSCON_2); - - printk("USB: hmc %d", config->hmc_mode); - if (!alt_pingroup) - printk(", usb2 alt %d wires", config->pins[2]); - else if (config->pins[0]) - printk(", usb0 %d wires%s", config->pins[0], - is_usb0_device(config) ? " (dev)" : ""); - if (config->pins[1]) - printk(", usb1 %d wires", config->pins[1]); - if (!alt_pingroup && config->pins[2]) - printk(", usb2 %d wires", config->pins[2]); - if (config->otg) - printk(", Mini-AB on usb%d", config->otg - 1); - printk("\n"); - - if (cpu_class_is_omap1()) { - u16 w; - - /* leave USB clocks/controllers off until needed */ - w = omap_readw(ULPD_SOFT_REQ); - w &= ~SOFT_USB_CLK_REQ; - omap_writew(w, ULPD_SOFT_REQ); - - w = omap_readw(ULPD_CLOCK_CTRL); - w &= ~USB_MCLK_EN; - w |= DIS_USB_PVCI_CLK; - omap_writew(w, ULPD_CLOCK_CTRL); - } - syscon = omap_readl(OTG_SYSCON_1); - syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; - -#ifdef CONFIG_USB_GADGET_OMAP - if (config->otg || config->register_dev) { - struct platform_device *udc_device = config->udc_device; - int status; - - syscon &= ~DEV_IDLE_EN; - udc_device->dev.platform_data = config; - status = platform_device_register(udc_device); - if (status) - pr_debug("can't register UDC device, %d\n", status); - } -#endif - -#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) - if (config->otg || config->register_host) { - struct platform_device *ohci_device = config->ohci_device; - int status; - - syscon &= ~HST_IDLE_EN; - ohci_device->dev.platform_data = config; - status = platform_device_register(ohci_device); - if (status) - pr_debug("can't register OHCI device, %d\n", status); - } -#endif - -#ifdef CONFIG_USB_OTG - if (config->otg) { - struct platform_device *otg_device = config->otg_device; - int status; - - syscon &= ~OTG_IDLE_EN; - otg_device->dev.platform_data = config; - status = platform_device_register(otg_device); - if (status) - pr_debug("can't register OTG device, %d\n", status); - } -#endif - pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); - omap_writel(syscon, OTG_SYSCON_1); -} - -#else -void omap_otg_init(struct omap_usb_config *config) {} -#endif - #ifdef CONFIG_USB_GADGET_OMAP static struct resource udc_resources[] = { diff --git a/trunk/arch/arm/mach-omap2/Kconfig b/trunk/arch/arm/mach-omap2/Kconfig index 042f157a8f94..4cf5142f22cc 100644 --- a/trunk/arch/arm/mach-omap2/Kconfig +++ b/trunk/arch/arm/mach-omap2/Kconfig @@ -64,16 +64,19 @@ config SOC_OMAP2420 depends on ARCH_OMAP2 default y select OMAP_DM_TIMER + select ARCH_OMAP_OTG config SOC_OMAP2430 bool "OMAP2430 support" depends on ARCH_OMAP2 default y + select ARCH_OMAP_OTG config SOC_OMAP3430 bool "OMAP3430 support" depends on ARCH_OMAP3 default y + select ARCH_OMAP_OTG config SOC_TI81XX bool "TI81XX support" diff --git a/trunk/arch/arm/mach-omap2/Makefile b/trunk/arch/arm/mach-omap2/Makefile index 9ba1c406a465..fa742f3c2629 100644 --- a/trunk/arch/arm/mach-omap2/Makefile +++ b/trunk/arch/arm/mach-omap2/Makefile @@ -116,6 +116,7 @@ obj-$(CONFIG_ARCH_OMAP4) += powerdomains44xx_data.o # PRCM clockdomain control clockdomain-common += clockdomain.o +clockdomain-common += clockdomains_common_data.o obj-$(CONFIG_ARCH_OMAP2) += $(clockdomain-common) obj-$(CONFIG_ARCH_OMAP2) += clockdomain2xxx_3xxx.o obj-$(CONFIG_ARCH_OMAP2) += clockdomains2xxx_3xxx_data.o @@ -243,6 +244,9 @@ obj-y += $(omap-flash-y) $(omap-flash-m) omap-hsmmc-$(CONFIG_MMC_OMAP_HS) := hsmmc.o obj-y += $(omap-hsmmc-m) $(omap-hsmmc-y) + +usbfs-$(CONFIG_ARCH_OMAP_OTG) := usb-fs.o +obj-y += $(usbfs-m) $(usbfs-y) obj-y += usb-musb.o obj-y += omap_phy_internal.o diff --git a/trunk/arch/arm/mach-omap2/board-2430sdp.c b/trunk/arch/arm/mach-omap2/board-2430sdp.c index 6523aeabf9f2..99ca6bad5c30 100644 --- a/trunk/arch/arm/mach-omap2/board-2430sdp.c +++ b/trunk/arch/arm/mach-omap2/board-2430sdp.c @@ -254,6 +254,16 @@ static struct omap2_hsmmc_info mmc[] __initdata = { {} /* Terminator */ }; +static struct omap_usb_config sdp2430_usb_config __initdata = { + .otg = 1, +#ifdef CONFIG_USB_GADGET_OMAP + .hmc_mode = 0x0, +#elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + .hmc_mode = 0x1, +#endif + .pins[0] = 3, +}; + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -270,6 +280,7 @@ static void __init omap_2430sdp_init(void) omap_serial_init(); omap_sdrc_init(NULL, NULL); omap_hsmmc_init(mmc); + omap2_usbfs_init(&sdp2430_usb_config); omap_mux_init_signal("usb0hs_stp", OMAP_PULL_ENA | OMAP_PULL_UP); usb_musb_init(NULL); diff --git a/trunk/arch/arm/mach-omap2/board-apollon.c b/trunk/arch/arm/mach-omap2/board-apollon.c index 519bcd3079e8..502c31e123be 100644 --- a/trunk/arch/arm/mach-omap2/board-apollon.c +++ b/trunk/arch/arm/mach-omap2/board-apollon.c @@ -35,6 +35,7 @@ #include #include +#include #include #include "common.h" #include @@ -252,6 +253,13 @@ static inline void __init apollon_init_smc91x(void) clk_put(gpmc_fck); } +static struct omap_usb_config apollon_usb_config __initdata = { + .register_dev = 1, + .hmc_mode = 0x14, /* 0:dev 1:host1 2:disable */ + + .pins[0] = 6, +}; + static struct panel_generic_dpi_data apollon_panel_data = { .name = "apollon", }; @@ -289,6 +297,15 @@ static void __init apollon_led_init(void) gpio_request_array(apollon_gpio_leds, ARRAY_SIZE(apollon_gpio_leds)); } +static void __init apollon_usb_init(void) +{ + /* USB device */ + /* DEVICE_SUSPEND */ + omap_mux_init_signal("mcbsp2_clkx.gpio_12", 0); + gpio_request_one(12, GPIOF_OUT_INIT_LOW, "USB suspend"); + omap2_usbfs_init(&apollon_usb_config); +} + #ifdef CONFIG_OMAP_MUX static struct omap_board_mux board_mux[] __initdata = { { .reg_offset = OMAP_MUX_TERMINATOR }, @@ -304,6 +321,7 @@ static void __init omap_apollon_init(void) apollon_init_smc91x(); apollon_led_init(); apollon_flash_init(); + apollon_usb_init(); /* REVISIT: where's the correct place */ omap_mux_init_signal("sys_nirq", OMAP_PULL_ENA | OMAP_PULL_UP); diff --git a/trunk/arch/arm/mach-omap2/board-h4.c b/trunk/arch/arm/mach-omap2/board-h4.c index ace20482e3e1..876becf8205a 100644 --- a/trunk/arch/arm/mach-omap2/board-h4.c +++ b/trunk/arch/arm/mach-omap2/board-h4.c @@ -32,6 +32,7 @@ #include #include +#include #include #include "common.h" #include @@ -328,6 +329,17 @@ static void __init h4_init_flash(void) h4_flash_resource.end = base + SZ_64M - 1; } +static struct omap_usb_config h4_usb_config __initdata = { + /* S1.10 OFF -- usb "download port" + * usb0 switched to Mini-B port and isp1105 transceiver; + * S2.POS3 = ON, S2.POS4 = OFF ... to enable battery charging + */ + .register_dev = 1, + .pins[0] = 3, +/* .hmc_mode = 0x14,*/ /* 0:dev 1:host 2:disable */ + .hmc_mode = 0x00, /* 0:dev|otg 1:disable 2:disable */ +}; + static struct at24_platform_data m24c01 = { .byte_len = SZ_1K / 8, .page_size = 16, @@ -369,6 +381,7 @@ static void __init omap_h4_init(void) ARRAY_SIZE(h4_i2c_board_info)); platform_add_devices(h4_devices, ARRAY_SIZE(h4_devices)); + omap2_usbfs_init(&h4_usb_config); omap_serial_init(); omap_sdrc_init(NULL, NULL); h4_init_flash(); diff --git a/trunk/arch/arm/mach-omap2/clock2420_data.c b/trunk/arch/arm/mach-omap2/clock2420_data.c index 7e39015357b1..bace9308a4db 100644 --- a/trunk/arch/arm/mach-omap2/clock2420_data.c +++ b/trunk/arch/arm/mach-omap2/clock2420_data.c @@ -1774,6 +1774,8 @@ static struct omap_clk omap2420_clks[] = { CLK(NULL, "osc_ck", &osc_ck, CK_242X), CLK(NULL, "sys_ck", &sys_ck, CK_242X), CLK(NULL, "alt_ck", &alt_ck, CK_242X), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_242X), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_242X), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_242X), /* internal analog sources */ CLK(NULL, "dpll_ck", &dpll_ck, CK_242X), @@ -1782,6 +1784,8 @@ static struct omap_clk omap2420_clks[] = { /* internal prcm root sources */ CLK(NULL, "func_54m_ck", &func_54m_ck, CK_242X), CLK(NULL, "core_ck", &core_ck, CK_242X), + CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_242X), + CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_242X), CLK(NULL, "func_96m_ck", &func_96m_ck, CK_242X), CLK(NULL, "func_48m_ck", &func_48m_ck, CK_242X), CLK(NULL, "func_12m_ck", &func_12m_ck, CK_242X), diff --git a/trunk/arch/arm/mach-omap2/clock2430_data.c b/trunk/arch/arm/mach-omap2/clock2430_data.c index 90a08c3b12ac..3b4d09a50399 100644 --- a/trunk/arch/arm/mach-omap2/clock2430_data.c +++ b/trunk/arch/arm/mach-omap2/clock2430_data.c @@ -1858,6 +1858,11 @@ static struct omap_clk omap2430_clks[] = { CLK(NULL, "osc_ck", &osc_ck, CK_243X), CLK(NULL, "sys_ck", &sys_ck, CK_243X), CLK(NULL, "alt_ck", &alt_ck, CK_243X), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_243X), + CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_243X), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_243X), /* internal analog sources */ CLK(NULL, "dpll_ck", &dpll_ck, CK_243X), @@ -1866,6 +1871,11 @@ static struct omap_clk omap2430_clks[] = { /* internal prcm root sources */ CLK(NULL, "func_54m_ck", &func_54m_ck, CK_243X), CLK(NULL, "core_ck", &core_ck, CK_243X), + CLK("omap-mcbsp.1", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.2", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.3", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.4", "prcm_fck", &func_96m_ck, CK_243X), + CLK("omap-mcbsp.5", "prcm_fck", &func_96m_ck, CK_243X), CLK(NULL, "func_96m_ck", &func_96m_ck, CK_243X), CLK(NULL, "func_48m_ck", &func_48m_ck, CK_243X), CLK(NULL, "func_12m_ck", &func_12m_ck, CK_243X), diff --git a/trunk/arch/arm/mach-omap2/clock3xxx_data.c b/trunk/arch/arm/mach-omap2/clock3xxx_data.c index ff422bee804a..1efdec236ae8 100644 --- a/trunk/arch/arm/mach-omap2/clock3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/clock3xxx_data.c @@ -3236,6 +3236,11 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "osc_sys_ck", &osc_sys_ck, CK_3XXX), CLK(NULL, "sys_ck", &sys_ck, CK_3XXX), CLK(NULL, "sys_altclk", &sys_altclk, CK_3XXX), + CLK("omap-mcbsp.1", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.2", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.3", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.4", "pad_fck", &mcbsp_clks, CK_3XXX), + CLK("omap-mcbsp.5", "pad_fck", &mcbsp_clks, CK_3XXX), CLK(NULL, "mcbsp_clks", &mcbsp_clks, CK_3XXX), CLK(NULL, "sys_clkout1", &sys_clkout1, CK_3XXX), CLK(NULL, "dpll1_ck", &dpll1_ck, CK_3XXX), @@ -3302,6 +3307,8 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "ts_fck", &ts_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK(NULL, "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK("usbhs_omap", "usbtll_fck", &usbtll_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), + CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), + CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), @@ -3406,6 +3413,9 @@ static struct omap_clk omap3xxx_clks[] = { CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick, CK_3XXX), CLK(NULL, "gpt12_ick", &gpt12_ick, CK_3XXX), CLK(NULL, "gpt1_ick", &gpt1_ick, CK_3XXX), + CLK("omap-mcbsp.2", "prcm_fck", &per_96m_fck, CK_3XXX), + CLK("omap-mcbsp.3", "prcm_fck", &per_96m_fck, CK_3XXX), + CLK("omap-mcbsp.4", "prcm_fck", &per_96m_fck, CK_3XXX), CLK(NULL, "per_96m_fck", &per_96m_fck, CK_3XXX), CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX), CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX), diff --git a/trunk/arch/arm/mach-omap2/clockdomain.h b/trunk/arch/arm/mach-omap2/clockdomain.h index 349dcbb6fecb..f7b58609bad8 100644 --- a/trunk/arch/arm/mach-omap2/clockdomain.h +++ b/trunk/arch/arm/mach-omap2/clockdomain.h @@ -206,5 +206,7 @@ extern struct clkdm_ops omap4_clkdm_operations; extern struct clkdm_dep gfx_24xx_wkdeps[]; extern struct clkdm_dep dsp_24xx_wkdeps[]; extern struct clockdomain wkup_common_clkdm; +extern struct clockdomain prm_common_clkdm; +extern struct clockdomain cm_common_clkdm; #endif diff --git a/trunk/arch/arm/mach-omap2/clockdomains2420_data.c b/trunk/arch/arm/mach-omap2/clockdomains2420_data.c index 5c741852fac0..0ab8e46d5b2b 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains2420_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains2420_data.c @@ -131,6 +131,8 @@ static struct clockdomain dss_2420_clkdm = { static struct clockdomain *clockdomains_omap242x[] __initdata = { &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, &mpu_2420_clkdm, &iva1_2420_clkdm, &dsp_2420_clkdm, diff --git a/trunk/arch/arm/mach-omap2/clockdomains2430_data.c b/trunk/arch/arm/mach-omap2/clockdomains2430_data.c index f09617555e15..3645ed044890 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains2430_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains2430_data.c @@ -157,6 +157,8 @@ static struct clockdomain dss_2430_clkdm = { static struct clockdomain *clockdomains_omap243x[] __initdata = { &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, &mpu_2430_clkdm, &mdm_clkdm, &dsp_2430_clkdm, diff --git a/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c b/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c index 2cdc17c9d2fa..6038adb97710 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains3xxx_data.c @@ -347,6 +347,8 @@ static struct clkdm_autodep clkdm_autodeps[] = { static struct clockdomain *clockdomains_omap3430_common[] __initdata = { &wkup_common_clkdm, + &cm_common_clkdm, + &prm_common_clkdm, &mpu_3xxx_clkdm, &neon_clkdm, &iva2_clkdm, diff --git a/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c b/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c index bd7ed13515cc..c53425847493 100644 --- a/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/trunk/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -430,6 +430,8 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { &l4_wkup_44xx_clkdm, &emu_sys_44xx_clkdm, &l3_dma_44xx_clkdm, + &prm_common_clkdm, + &cm_common_clkdm, NULL }; diff --git a/trunk/arch/arm/mach-omap2/clockdomains_common_data.c b/trunk/arch/arm/mach-omap2/clockdomains_common_data.c new file mode 100644 index 000000000000..615b1f04967d --- /dev/null +++ b/trunk/arch/arm/mach-omap2/clockdomains_common_data.c @@ -0,0 +1,24 @@ +/* + * OMAP2+-common clockdomain data + * + * Copyright (C) 2008-2012 Texas Instruments, Inc. + * Copyright (C) 2008-2010 Nokia Corporation + * + * Paul Walmsley, Jouni Högander + */ + +#include +#include + +#include "clockdomain.h" + +/* These are implicit clockdomains - they are never defined as such in TRM */ +struct clockdomain prm_common_clkdm = { + .name = "prm_clkdm", + .pwrdm = { .name = "wkup_pwrdm" }, +}; + +struct clockdomain cm_common_clkdm = { + .name = "cm_clkdm", + .pwrdm = { .name = "core_pwrdm" }, +}; diff --git a/trunk/arch/arm/mach-omap2/control.c b/trunk/arch/arm/mach-omap2/control.c index 3223b81e7532..08e674bb0417 100644 --- a/trunk/arch/arm/mach-omap2/control.c +++ b/trunk/arch/arm/mach-omap2/control.c @@ -241,49 +241,6 @@ void omap3_ctrl_write_boot_mode(u8 bootmode) #endif -/** - * omap_ctrl_write_dsp_boot_addr - set boot address for a remote processor - * @bootaddr: physical address of the boot loader - * - * Set boot address for the boot loader of a supported processor - * when a power ON sequence occurs. - */ -void omap_ctrl_write_dsp_boot_addr(u32 bootaddr) -{ - u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTADDR : - cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTADDR : - cpu_is_omap44xx() ? OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR : - 0; - - if (!offset) { - pr_err("%s: unsupported omap type\n", __func__); - return; - } - - omap_ctrl_writel(bootaddr, offset); -} - -/** - * omap_ctrl_write_dsp_boot_mode - set boot mode for a remote processor - * @bootmode: 8-bit value to pass to some boot code - * - * Sets boot mode for the boot loader of a supported processor - * when a power ON sequence occurs. - */ -void omap_ctrl_write_dsp_boot_mode(u8 bootmode) -{ - u32 offset = cpu_is_omap243x() ? OMAP243X_CONTROL_IVA2_BOOTMOD : - cpu_is_omap34xx() ? OMAP343X_CONTROL_IVA2_BOOTMOD : - 0; - - if (!offset) { - pr_err("%s: unsupported omap type\n", __func__); - return; - } - - omap_ctrl_writel(bootmode, offset); -} - #if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) /* * Clears the scratchpad contents in case of cold boot- diff --git a/trunk/arch/arm/mach-omap2/control.h b/trunk/arch/arm/mach-omap2/control.h index fcc98f822d9d..a406fd045ce1 100644 --- a/trunk/arch/arm/mach-omap2/control.h +++ b/trunk/arch/arm/mach-omap2/control.h @@ -397,8 +397,6 @@ extern u32 omap3_arm_context[128]; extern void omap3_control_save_context(void); extern void omap3_control_restore_context(void); extern void omap3_ctrl_write_boot_mode(u8 bootmode); -extern void omap_ctrl_write_dsp_boot_addr(u32 bootaddr); -extern void omap_ctrl_write_dsp_boot_mode(u8 bootmode); extern void omap3630_ctrl_disable_rta(void); extern int omap3_ctrl_save_padconf(void); #else diff --git a/trunk/arch/arm/mach-omap2/dsp.c b/trunk/arch/arm/mach-omap2/dsp.c index a636ebc16b39..88ffa1e645cd 100644 --- a/trunk/arch/arm/mach-omap2/dsp.c +++ b/trunk/arch/arm/mach-omap2/dsp.c @@ -23,7 +23,6 @@ #include -#include "control.h" #include "cm2xxx_3xxx.h" #include "prm2xxx_3xxx.h" #ifdef CONFIG_BRIDGE_DVFS @@ -47,9 +46,6 @@ static struct omap_dsp_platform_data omap_dsp_pdata __initdata = { .dsp_cm_read = omap2_cm_read_mod_reg, .dsp_cm_write = omap2_cm_write_mod_reg, .dsp_cm_rmw_bits = omap2_cm_rmw_mod_reg_bits, - - .set_bootaddr = omap_ctrl_write_dsp_boot_addr, - .set_bootmode = omap_ctrl_write_dsp_boot_mode, }; static phys_addr_t omap_dsp_phys_mempool_base; diff --git a/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h b/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h index 01970824e0e5..2f7ac70a20d8 100644 --- a/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h +++ b/trunk/arch/arm/mach-omap2/include/mach/ctrl_module_core_44xx.h @@ -42,7 +42,6 @@ #define OMAP4_CTRL_MODULE_CORE_STD_FUSE_OPP_DPLL_1 0x0268 #define OMAP4_CTRL_MODULE_CORE_STATUS 0x02c4 #define OMAP4_CTRL_MODULE_CORE_DEV_CONF 0x0300 -#define OMAP4_CTRL_MODULE_CORE_DSP_BOOTADDR 0x0304 #define OMAP4_CTRL_MODULE_CORE_LDOVBB_IVA_VOLTAGE_CTRL 0x0314 #define OMAP4_CTRL_MODULE_CORE_LDOVBB_MPU_VOLTAGE_CTRL 0x0318 #define OMAP4_CTRL_MODULE_CORE_LDOSRAM_IVA_VOLTAGE_CTRL 0x0320 diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod.c b/trunk/arch/arm/mach-omap2/omap_hwmod.c index f97f0624bca0..773193670ea2 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod.c @@ -166,31 +166,6 @@ */ #define LINKS_PER_OCP_IF 2 -/** - * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations - * @enable_module: function to enable a module (via MODULEMODE) - * @disable_module: function to disable a module (via MODULEMODE) - * - * XXX Eventually this functionality will be hidden inside the PRM/CM - * device drivers. Until then, this should avoid huge blocks of cpu_is_*() - * conditionals in this code. - */ -struct omap_hwmod_soc_ops { - void (*enable_module)(struct omap_hwmod *oh); - int (*disable_module)(struct omap_hwmod *oh); - int (*wait_target_ready)(struct omap_hwmod *oh); - int (*assert_hardreset)(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri); - int (*deassert_hardreset)(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri); - int (*is_hardreset_asserted)(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri); - int (*init_clkdm)(struct omap_hwmod *oh); -}; - -/* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ -static struct omap_hwmod_soc_ops soc_ops; - /* omap_hwmod_list contains all registered struct omap_hwmods */ static LIST_HEAD(omap_hwmod_list); @@ -211,9 +186,6 @@ static struct omap_hwmod_link *linkspace; */ static unsigned short free_ls, max_ls, ls_supp; -/* inited: set to true once the hwmod code is initialized */ -static bool inited; - /* Private functions */ /** @@ -799,19 +771,23 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) } /** - * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 + * _enable_module - enable CLKCTRL modulemode on OMAP4 * @oh: struct omap_hwmod * * * Enables the PRCM module mode related to the hwmod @oh. * No return value. */ -static void _omap4_enable_module(struct omap_hwmod *oh) +static void _enable_module(struct omap_hwmod *oh) { + /* The module mode does not exist prior OMAP4 */ + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return; + if (!oh->clkdm || !oh->prcm.omap4.modulemode) return; - pr_debug("omap_hwmod: %s: %s: %d\n", - oh->name, __func__, oh->prcm.omap4.modulemode); + pr_debug("omap_hwmod: %s: _enable_module: %d\n", + oh->name, oh->prcm.omap4.modulemode); omap4_cminst_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->prcm_partition, @@ -831,7 +807,10 @@ static void _omap4_enable_module(struct omap_hwmod *oh) */ static int _omap4_wait_target_disable(struct omap_hwmod *oh) { - if (!oh || !oh->clkdm) + if (!cpu_is_omap44xx()) + return 0; + + if (!oh) return -EINVAL; if (oh->_int_flags & _HWMOD_NO_MPU_PORT) @@ -1306,20 +1285,24 @@ static struct omap_hwmod *_lookup(const char *name) return oh; } - /** * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod * @oh: struct omap_hwmod * * * Convert a clockdomain name stored in a struct omap_hwmod into a * clockdomain pointer, and save it into the struct omap_hwmod. - * Return -EINVAL if the clkdm_name lookup failed. + * return -EINVAL if clkdm_name does not exist or if the lookup failed. */ static int _init_clkdm(struct omap_hwmod *oh) { - if (!oh->clkdm_name) + if (cpu_is_omap24xx() || cpu_is_omap34xx()) return 0; + if (!oh->clkdm_name) { + pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); + return -EINVAL; + } + oh->clkdm = clkdm_lookup(oh->clkdm_name); if (!oh->clkdm) { pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", @@ -1355,8 +1338,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) ret |= _init_main_clk(oh); ret |= _init_interface_clks(oh); ret |= _init_opt_clks(oh); - if (soc_ops.init_clkdm) - ret |= soc_ops.init_clkdm(oh); + ret |= _init_clkdm(oh); if (!ret) oh->_state = _HWMOD_STATE_CLKS_INITED; @@ -1366,6 +1348,53 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) return ret; } +/** + * _wait_target_ready - wait for a module to leave slave idle + * @oh: struct omap_hwmod * + * + * Wait for a module @oh to leave slave idle. Returns 0 if the module + * does not have an IDLEST bit or if the module successfully leaves + * slave idle; otherwise, pass along the return value of the + * appropriate *_cm*_wait_module_ready() function. + */ +static int _wait_target_ready(struct omap_hwmod *oh) +{ + struct omap_hwmod_ocp_if *os; + int ret; + + if (!oh) + return -EINVAL; + + if (oh->flags & HWMOD_NO_IDLEST) + return 0; + + os = _find_mpu_rt_port(oh); + if (!os) + return 0; + + /* XXX check module SIDLEMODE */ + + /* XXX check clock enable states */ + + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, + oh->prcm.omap2.idlest_reg_id, + oh->prcm.omap2.idlest_idle_bit); + } else if (cpu_is_omap44xx()) { + if (!oh->clkdm) + return -EINVAL; + + ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, + oh->clkdm->cm_inst, + oh->clkdm->clkdm_offs, + oh->prcm.omap4.clkctrl_offs); + } else { + BUG(); + }; + + return ret; +} + /** * _lookup_hardreset - fill register bit info for this hwmod/reset line * @oh: struct omap_hwmod * @@ -1402,31 +1431,32 @@ static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name, * @oh: struct omap_hwmod * * @name: name of the reset line to lookup and assert * - * Some IP like dsp, ipu or iva contain processor that require an HW - * reset line to be assert / deassert in order to enable fully the IP. - * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of - * asserting the hardreset line on the currently-booted SoC, or passes - * along the return value from _lookup_hardreset() or the SoC's - * assert_hardreset code. + * Some IP like dsp, ipu or iva contain processor that require + * an HW reset line to be assert / deassert in order to enable fully + * the IP. */ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - u8 ret = -EINVAL; + u8 ret; if (!oh) return -EINVAL; - if (!soc_ops.assert_hardreset) - return -ENOSYS; - ret = _lookup_hardreset(oh, name, &ohri); if (IS_ERR_VALUE(ret)) return ret; - ret = soc_ops.assert_hardreset(oh, &ohri); - - return ret; + if (cpu_is_omap24xx() || cpu_is_omap34xx()) + return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, + ohri.rst_shift); + else if (cpu_is_omap44xx()) + return omap4_prminst_assert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); + else + return -EINVAL; } /** @@ -1435,29 +1465,38 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) * @oh: struct omap_hwmod * * @name: name of the reset line to look up and deassert * - * Some IP like dsp, ipu or iva contain processor that require an HW - * reset line to be assert / deassert in order to enable fully the IP. - * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of - * deasserting the hardreset line on the currently-booted SoC, or passes - * along the return value from _lookup_hardreset() or the SoC's - * deassert_hardreset code. + * Some IP like dsp, ipu or iva contain processor that require + * an HW reset line to be assert / deassert in order to enable fully + * the IP. */ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - int ret = -EINVAL; + int ret; if (!oh) return -EINVAL; - if (!soc_ops.deassert_hardreset) - return -ENOSYS; - ret = _lookup_hardreset(oh, name, &ohri); if (IS_ERR_VALUE(ret)) return ret; - ret = soc_ops.deassert_hardreset(oh, &ohri); + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, + ohri.rst_shift, + ohri.st_shift); + } else if (cpu_is_omap44xx()) { + if (ohri.st_shift) + pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", + oh->name, name); + ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); + } else { + return -EINVAL; + } + if (ret == -EBUSY) pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name); @@ -1470,28 +1509,31 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) * @oh: struct omap_hwmod * * @name: name of the reset line to look up and read * - * Return the state of the reset line. Returns -EINVAL if @oh is - * null, -ENOSYS if we have no way of reading the hardreset line - * status on the currently-booted SoC, or passes along the return - * value from _lookup_hardreset() or the SoC's is_hardreset_asserted - * code. + * Return the state of the reset line. */ static int _read_hardreset(struct omap_hwmod *oh, const char *name) { struct omap_hwmod_rst_info ohri; - u8 ret = -EINVAL; + u8 ret; if (!oh) return -EINVAL; - if (!soc_ops.is_hardreset_asserted) - return -ENOSYS; - ret = _lookup_hardreset(oh, name, &ohri); if (IS_ERR_VALUE(ret)) return ret; - return soc_ops.is_hardreset_asserted(oh, &ohri); + if (cpu_is_omap24xx() || cpu_is_omap34xx()) { + return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, + ohri.st_shift); + } else if (cpu_is_omap44xx()) { + return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, + oh->clkdm->pwrdm.ptr->prcm_partition, + oh->clkdm->pwrdm.ptr->prcm_offs, + oh->prcm.omap4.rstctrl_offs); + } else { + return -EINVAL; + } } /** @@ -1529,6 +1571,10 @@ static int _omap4_disable_module(struct omap_hwmod *oh) { int v; + /* The module mode does not exist prior OMAP4 */ + if (!cpu_is_omap44xx()) + return -EINVAL; + if (!oh->clkdm || !oh->prcm.omap4.modulemode) return -EINVAL; @@ -1768,11 +1814,9 @@ static int _enable(struct omap_hwmod *oh) } _enable_clocks(oh); - if (soc_ops.enable_module) - soc_ops.enable_module(oh); + _enable_module(oh); - r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : - -EINVAL; + r = _wait_target_ready(oh); if (!r) { /* * Set the clockdomain to HW_AUTO only if the target is ready, @@ -1826,8 +1870,7 @@ static int _idle(struct omap_hwmod *oh) _idle_sysc(oh); _del_initiator_dep(oh, mpu_oh); - if (soc_ops.disable_module) - soc_ops.disable_module(oh); + _omap4_disable_module(oh); /* * The module must be in idle mode before disabling any parents @@ -1932,8 +1975,7 @@ static int _shutdown(struct omap_hwmod *oh) if (oh->_state == _HWMOD_STATE_ENABLED) { _del_initiator_dep(oh, mpu_oh); /* XXX what about the other system initiators here? dma, dsp */ - if (soc_ops.disable_module) - soc_ops.disable_module(oh); + _omap4_disable_module(oh); _disable_clocks(oh); if (oh->clkdm) clkdm_hwmod_disable(oh->clkdm, oh); @@ -2389,194 +2431,6 @@ static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) return 0; } -/* Static functions intended only for use in soc_ops field function pointers */ - -/** - * _omap2_wait_target_ready - wait for a module to leave slave idle - * @oh: struct omap_hwmod * - * - * Wait for a module @oh to leave slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully leaves - * slave idle; otherwise, pass along the return value of the - * appropriate *_cm*_wait_module_ready() function. - */ -static int _omap2_wait_target_ready(struct omap_hwmod *oh) -{ - if (!oh) - return -EINVAL; - - if (oh->flags & HWMOD_NO_IDLEST) - return 0; - - if (!_find_mpu_rt_port(oh)) - return 0; - - /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ - - return omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs, - oh->prcm.omap2.idlest_reg_id, - oh->prcm.omap2.idlest_idle_bit); -} - -/** - * _omap4_wait_target_ready - wait for a module to leave slave idle - * @oh: struct omap_hwmod * - * - * Wait for a module @oh to leave slave idle. Returns 0 if the module - * does not have an IDLEST bit or if the module successfully leaves - * slave idle; otherwise, pass along the return value of the - * appropriate *_cm*_wait_module_ready() function. - */ -static int _omap4_wait_target_ready(struct omap_hwmod *oh) -{ - if (!oh || !oh->clkdm) - return -EINVAL; - - if (oh->flags & HWMOD_NO_IDLEST) - return 0; - - if (!_find_mpu_rt_port(oh)) - return 0; - - /* XXX check module SIDLEMODE, hardreset status */ - - return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, - oh->clkdm->cm_inst, - oh->clkdm->clkdm_offs, - oh->prcm.omap4.clkctrl_offs); -} - -/** - * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to assert hardreset - * @ohri: hardreset line data - * - * Call omap2_prm_assert_hardreset() with parameters extracted from - * the hwmod @oh and the hardreset line data @ohri. Only intended for - * use as an soc_ops function pointer. Passes along the return value - * from omap2_prm_assert_hardreset(). XXX This function is scheduled - * for removal when the PRM code is moved into drivers/. - */ -static int _omap2_assert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, - ohri->rst_shift); -} - -/** - * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to deassert hardreset - * @ohri: hardreset line data - * - * Call omap2_prm_deassert_hardreset() with parameters extracted from - * the hwmod @oh and the hardreset line data @ohri. Only intended for - * use as an soc_ops function pointer. Passes along the return value - * from omap2_prm_deassert_hardreset(). XXX This function is - * scheduled for removal when the PRM code is moved into drivers/. - */ -static int _omap2_deassert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs, - ohri->rst_shift, - ohri->st_shift); -} - -/** - * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to test hardreset - * @ohri: hardreset line data - * - * Call omap2_prm_is_hardreset_asserted() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from omap2_prm_is_hardreset_asserted(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, - ohri->st_shift); -} - -/** - * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to assert hardreset - * @ohri: hardreset line data - * - * Call omap4_prminst_assert_hardreset() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from omap4_prminst_assert_hardreset(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _omap4_assert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (!oh->clkdm) - return -EINVAL; - - return omap4_prminst_assert_hardreset(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_partition, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - -/** - * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to deassert hardreset - * @ohri: hardreset line data - * - * Call omap4_prminst_deassert_hardreset() with parameters extracted - * from the hwmod @oh and the hardreset line data @ohri. Only - * intended for use as an soc_ops function pointer. Passes along the - * return value from omap4_prminst_deassert_hardreset(). XXX This - * function is scheduled for removal when the PRM code is moved into - * drivers/. - */ -static int _omap4_deassert_hardreset(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (!oh->clkdm) - return -EINVAL; - - if (ohri->st_shift) - pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", - oh->name, ohri->name); - return omap4_prminst_deassert_hardreset(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_partition, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - -/** - * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args - * @oh: struct omap_hwmod * to test hardreset - * @ohri: hardreset line data - * - * Call omap4_prminst_is_hardreset_asserted() with parameters - * extracted from the hwmod @oh and the hardreset line data @ohri. - * Only intended for use as an soc_ops function pointer. Passes along - * the return value from omap4_prminst_is_hardreset_asserted(). XXX - * This function is scheduled for removal when the PRM code is moved - * into drivers/. - */ -static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, - struct omap_hwmod_rst_info *ohri) -{ - if (!oh->clkdm) - return -EINVAL; - - return omap4_prminst_is_hardreset_asserted(ohri->rst_shift, - oh->clkdm->pwrdm.ptr->prcm_partition, - oh->clkdm->pwrdm.ptr->prcm_offs, - oh->prcm.omap4.rstctrl_offs); -} - /* Public functions */ u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) @@ -2709,18 +2563,12 @@ int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), * * Intended to be called early in boot before the clock framework is * initialized. If @ois is not null, will register all omap_hwmods - * listed in @ois that are valid for this chip. Returns -EINVAL if - * omap_hwmod_init() hasn't been called before calling this function, - * -ENOMEM if the link memory area can't be allocated, or 0 upon - * success. + * listed in @ois that are valid for this chip. Returns 0. */ int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) { int r, i; - if (!inited) - return -EINVAL; - if (!ois) return 0; @@ -3553,32 +3401,3 @@ int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx) return 0; } - -/** - * omap_hwmod_init - initialize the hwmod code - * - * Sets up some function pointers needed by the hwmod code to operate on the - * currently-booted SoC. Intended to be called once during kernel init - * before any hwmods are registered. No return value. - */ -void __init omap_hwmod_init(void) -{ - if (cpu_is_omap24xx() || cpu_is_omap34xx()) { - soc_ops.wait_target_ready = _omap2_wait_target_ready; - soc_ops.assert_hardreset = _omap2_assert_hardreset; - soc_ops.deassert_hardreset = _omap2_deassert_hardreset; - soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; - } else if (cpu_is_omap44xx()) { - soc_ops.enable_module = _omap4_enable_module; - soc_ops.disable_module = _omap4_disable_module; - soc_ops.wait_target_ready = _omap4_wait_target_ready; - soc_ops.assert_hardreset = _omap4_assert_hardreset; - soc_ops.deassert_hardreset = _omap4_deassert_hardreset; - soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; - soc_ops.init_clkdm = _init_clkdm; - } else { - WARN(1, "omap_hwmod: unknown SoC type\n"); - } - - inited = true; -} diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c index 50cfab61b0e2..a7640d1b215e 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -192,11 +192,6 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { .name = "mcbsp", }; -static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "func_96m_ck" }, -}; - /* mcbsp1 */ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, @@ -219,8 +214,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp2 */ @@ -245,8 +238,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; static struct omap_hwmod_class_sysconfig omap2420_msdi_sysc = { @@ -594,6 +585,5 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { int __init omap2420_hwmod_init(void) { - omap_hwmod_init(); return omap_hwmod_register_links(omap2420_hwmod_ocp_ifs); } diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c index 58b5bc196d32..4d7264981230 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_2430_data.c @@ -296,11 +296,6 @@ static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { .rev = MCBSP_CONFIG_TYPE2, }; -static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "func_96m_ck" }, -}; - /* mcbsp1 */ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, @@ -325,8 +320,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp2 */ @@ -352,8 +345,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp3 */ @@ -379,8 +370,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp4 */ @@ -412,8 +401,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* mcbsp5 */ @@ -445,8 +432,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, }, }, - .opt_clks = mcbsp_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), }; /* MMC/SD/SDIO common */ @@ -953,6 +938,5 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { int __init omap2430_hwmod_init(void) { - omap_hwmod_init(); return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); } diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c index 8379b8d7244a..b26d3c9bca16 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c @@ -1074,17 +1074,6 @@ static struct omap_hwmod_class omap3xxx_mcbsp_hwmod_class = { .rev = MCBSP_CONFIG_TYPE3, }; -/* McBSP functional clock mapping */ -static struct omap_hwmod_opt_clk mcbsp15_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "core_96m_fck" }, -}; - -static struct omap_hwmod_opt_clk mcbsp234_opt_clks[] = { - { .role = "pad_fck", .clk = "mcbsp_clks" }, - { .role = "prcm_fck", .clk = "per_96m_fck" }, -}; - /* mcbsp1 */ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { { .name = "common", .irq = 16 }, @@ -1108,8 +1097,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP1_SHIFT, }, }, - .opt_clks = mcbsp15_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks), }; /* mcbsp2 */ @@ -1139,8 +1126,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT, }, }, - .opt_clks = mcbsp234_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), .dev_attr = &omap34xx_mcbsp2_dev_attr, }; @@ -1171,8 +1156,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP3_SHIFT, }, }, - .opt_clks = mcbsp234_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), .dev_attr = &omap34xx_mcbsp3_dev_attr, }; @@ -1205,8 +1188,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT, }, }, - .opt_clks = mcbsp234_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks), }; /* mcbsp5 */ @@ -1238,8 +1219,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT, }, }, - .opt_clks = mcbsp15_opt_clks, - .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks), }; /* 'mcbsp sidetone' class */ @@ -3304,8 +3283,6 @@ int __init omap3xxx_hwmod_init(void) struct omap_hwmod_ocp_if **h = NULL; unsigned int rev; - omap_hwmod_init(); - /* Register hwmod links common to all OMAP3 */ r = omap_hwmod_register_links(omap3xxx_hwmod_ocp_ifs); if (r < 0) diff --git a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index 4cab6318d33e..b7bcba5221ba 100644 --- a/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/trunk/arch/arm/mach-omap2/omap_hwmod_44xx_data.c @@ -2544,12 +2544,14 @@ static struct omap_hwmod omap44xx_prcm_mpu_hwmod = { static struct omap_hwmod omap44xx_cm_core_aon_hwmod = { .name = "cm_core_aon", .class = &omap44xx_prcm_hwmod_class, + .clkdm_name = "cm_clkdm", }; /* cm_core */ static struct omap_hwmod omap44xx_cm_core_hwmod = { .name = "cm_core", .class = &omap44xx_prcm_hwmod_class, + .clkdm_name = "cm_clkdm", }; /* prm */ @@ -2566,6 +2568,7 @@ static struct omap_hwmod_rst_info omap44xx_prm_resets[] = { static struct omap_hwmod omap44xx_prm_hwmod = { .name = "prm", .class = &omap44xx_prcm_hwmod_class, + .clkdm_name = "prm_clkdm", .mpu_irqs = omap44xx_prm_irqs, .rst_lines = omap44xx_prm_resets, .rst_lines_cnt = ARRAY_SIZE(omap44xx_prm_resets), @@ -6145,7 +6148,6 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { int __init omap44xx_hwmod_init(void) { - omap_hwmod_init(); return omap_hwmod_register_links(omap44xx_hwmod_ocp_ifs); } diff --git a/trunk/arch/arm/mach-omap2/usb-fs.c b/trunk/arch/arm/mach-omap2/usb-fs.c new file mode 100644 index 000000000000..1481078763b8 --- /dev/null +++ b/trunk/arch/arm/mach-omap2/usb-fs.c @@ -0,0 +1,359 @@ +/* + * Platform level USB initialization for FS USB OTG controller on omap1 and 24xx + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +#include +#include + +#include "control.h" +#include "mux.h" + +#define INT_USB_IRQ_GEN INT_24XX_USB_IRQ_GEN +#define INT_USB_IRQ_NISO INT_24XX_USB_IRQ_NISO +#define INT_USB_IRQ_ISO INT_24XX_USB_IRQ_ISO +#define INT_USB_IRQ_HGEN INT_24XX_USB_IRQ_HGEN +#define INT_USB_IRQ_OTG INT_24XX_USB_IRQ_OTG + +#if defined(CONFIG_ARCH_OMAP2) + +#ifdef CONFIG_USB_GADGET_OMAP + +static struct resource udc_resources[] = { + /* order is significant! */ + { /* registers */ + .start = UDC_BASE, + .end = UDC_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { /* general IRQ */ + .start = INT_USB_IRQ_GEN, + .flags = IORESOURCE_IRQ, + }, { /* PIO IRQ */ + .start = INT_USB_IRQ_NISO, + .flags = IORESOURCE_IRQ, + }, { /* SOF IRQ */ + .start = INT_USB_IRQ_ISO, + .flags = IORESOURCE_IRQ, + }, +}; + +static u64 udc_dmamask = ~(u32)0; + +static struct platform_device udc_device = { + .name = "omap_udc", + .id = -1, + .dev = { + .dma_mask = &udc_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(udc_resources), + .resource = udc_resources, +}; + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ + pdata->udc_device = &udc_device; +} + +#else + +static inline void udc_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + +/* The dmamask must be set for OHCI to work */ +static u64 ohci_dmamask = ~(u32)0; + +static struct resource ohci_resources[] = { + { + .start = OMAP_OHCI_BASE, + .end = OMAP_OHCI_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, + { + .start = INT_USB_IRQ_HGEN, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device ohci_device = { + .name = "ohci", + .id = -1, + .dev = { + .dma_mask = &ohci_dmamask, + .coherent_dma_mask = 0xffffffff, + }, + .num_resources = ARRAY_SIZE(ohci_resources), + .resource = ohci_resources, +}; + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ + pdata->ohci_device = &ohci_device; +} + +#else + +static inline void ohci_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +#if defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG) + +static struct resource otg_resources[] = { + /* order is significant! */ + { + .start = OTG_BASE, + .end = OTG_BASE + 0xff, + .flags = IORESOURCE_MEM, + }, { + .start = INT_USB_IRQ_OTG, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device otg_device = { + .name = "omap_otg", + .id = -1, + .num_resources = ARRAY_SIZE(otg_resources), + .resource = otg_resources, +}; + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ + pdata->otg_device = &otg_device; +} + +#else + +static inline void otg_device_init(struct omap_usb_config *pdata) +{ +} + +#endif + +static void omap2_usb_devconf_clear(u8 port, u32 mask) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r &= ~USBTXWRMODEI(port, mask); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb_devconf_set(u8 port, u32 mask) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r |= USBTXWRMODEI(port, mask); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb2_disable_5pinbitll(void) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI); + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static void omap2_usb2_enable_5pinunitll(void) +{ + u32 r; + + r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0); + r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI; + omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0); +} + +static u32 __init omap2_usb0_init(unsigned nwires, unsigned is_device) +{ + u32 syscon1 = 0; + + omap2_usb_devconf_clear(0, USB_BIDIR_TLL); + + if (nwires == 0) + return 0; + + if (is_device) + omap_mux_init_signal("usb0_puen", 0); + + omap_mux_init_signal("usb0_dat", 0); + omap_mux_init_signal("usb0_txen", 0); + omap_mux_init_signal("usb0_se0", 0); + if (nwires != 3) + omap_mux_init_signal("usb0_rcv", 0); + + switch (nwires) { + case 3: + syscon1 = 2; + omap2_usb_devconf_set(0, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(0, USB_BIDIR); + break; + case 6: + syscon1 = 3; + omap_mux_init_signal("usb0_vp", 0); + omap_mux_init_signal("usb0_vm", 0); + omap2_usb_devconf_set(0, USB_UNIDIR); + break; + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 0, nwires); + } + + return syscon1 << 16; +} + +static u32 __init omap2_usb1_init(unsigned nwires) +{ + u32 syscon1 = 0; + + omap2_usb_devconf_clear(1, USB_BIDIR_TLL); + + if (nwires == 0) + return 0; + + /* NOTE: board-specific code must set up pin muxing for usb1, + * since each signal could come out on either of two balls. + */ + + switch (nwires) { + case 2: + /* NOTE: board-specific code must override this setting if + * this TLL link is not using DP/DM + */ + syscon1 = 1; + omap2_usb_devconf_set(1, USB_BIDIR_TLL); + break; + case 3: + syscon1 = 2; + omap2_usb_devconf_set(1, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(1, USB_BIDIR); + break; + case 6: + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 1, nwires); + } + + return syscon1 << 20; +} + +static u32 __init omap2_usb2_init(unsigned nwires, unsigned alt_pingroup) +{ + u32 syscon1 = 0; + + omap2_usb2_disable_5pinbitll(); + alt_pingroup = 0; + + /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */ + if (alt_pingroup || nwires == 0) + return 0; + + omap_mux_init_signal("usb2_dat", 0); + omap_mux_init_signal("usb2_se0", 0); + if (nwires > 2) + omap_mux_init_signal("usb2_txen", 0); + if (nwires > 3) + omap_mux_init_signal("usb2_rcv", 0); + + switch (nwires) { + case 2: + /* NOTE: board-specific code must override this setting if + * this TLL link is not using DP/DM + */ + syscon1 = 1; + omap2_usb_devconf_set(2, USB_BIDIR_TLL); + break; + case 3: + syscon1 = 2; + omap2_usb_devconf_set(2, USB_BIDIR); + break; + case 4: + syscon1 = 1; + omap2_usb_devconf_set(2, USB_BIDIR); + break; + case 5: + /* NOTE: board-specific code must mux this setting depending + * on TLL link using DP/DM. Something must also + * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED} + * 2420: hdq_sio.usb2_tllse0 or vlynq_rx0.usb2_tllse0 + * 2430: hdq_sio.usb2_tllse0 or sdmmc2_dat0.usb2_tllse0 + */ + + syscon1 = 3; + omap2_usb2_enable_5pinunitll(); + break; + case 6: + default: + printk(KERN_ERR "illegal usb%d %d-wire transceiver\n", + 2, nwires); + } + + return syscon1 << 24; +} + +void __init omap2_usbfs_init(struct omap_usb_config *pdata) +{ + struct clk *ick; + + if (!cpu_is_omap24xx()) + return; + + ick = clk_get(NULL, "usb_l4_ick"); + if (IS_ERR(ick)) + return; + + clk_enable(ick); + pdata->usb0_init = omap2_usb0_init; + pdata->usb1_init = omap2_usb1_init; + pdata->usb2_init = omap2_usb2_init; + udc_device_init(pdata); + ohci_device_init(pdata); + otg_device_init(pdata); + omap_otg_init(pdata); + clk_disable(ick); + clk_put(ick); +} + +#endif diff --git a/trunk/arch/arm/mach-s3c24xx/common.c b/trunk/arch/arm/mach-s3c24xx/common.c index 0c9e9a785ef6..56cdd34cce41 100644 --- a/trunk/arch/arm/mach-s3c24xx/common.c +++ b/trunk/arch/arm/mach-s3c24xx/common.c @@ -41,6 +41,7 @@ #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h b/trunk/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h new file mode 100644 index 000000000000..4c38b39b741d --- /dev/null +++ b/trunk/arch/arm/mach-s3c24xx/include/mach/bast-pmu.h @@ -0,0 +1,40 @@ +/* arch/arm/mach-s3c2410/include/mach/bast-pmu.h + * + * Copyright (c) 2003-2004 Simtec Electronics + * Ben Dooks + * Vincent Sanders + * + * Machine BAST - Power Management chip + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_BASTPMU_H +#define __ASM_ARCH_BASTPMU_H "08_OCT_2004" + +#define BASTPMU_REG_IDENT (0x00) +#define BASTPMU_REG_VERSION (0x01) +#define BASTPMU_REG_DDCCTRL (0x02) +#define BASTPMU_REG_POWER (0x03) +#define BASTPMU_REG_RESET (0x04) +#define BASTPMU_REG_GWO (0x05) +#define BASTPMU_REG_WOL (0x06) +#define BASTPMU_REG_WOR (0x07) +#define BASTPMU_REG_UID (0x09) + +#define BASTPMU_EEPROM (0xC0) + +#define BASTPMU_EEP_UID (BASTPMU_EEPROM + 0) +#define BASTPMU_EEP_WOL (BASTPMU_EEPROM + 8) +#define BASTPMU_EEP_WOR (BASTPMU_EEPROM + 9) + +#define BASTPMU_IDENT_0 0x53 +#define BASTPMU_IDENT_1 0x42 +#define BASTPMU_IDENT_2 0x50 +#define BASTPMU_IDENT_3 0x4d + +#define BASTPMU_RESET_GUARD (0x55) + +#endif /* __ASM_ARCH_BASTPMU_H */ diff --git a/trunk/arch/arm/mach-s3c24xx/mach-mini2440.c b/trunk/arch/arm/mach-s3c24xx/mach-mini2440.c index f092b188ab70..bd6d2525debe 100644 --- a/trunk/arch/arm/mach-s3c24xx/mach-mini2440.c +++ b/trunk/arch/arm/mach-s3c24xx/mach-mini2440.c @@ -634,8 +634,8 @@ static void __init mini2440_init(void) s3c_gpio_cfgpin(S3C2410_GPC(0), S3C2410_GPC0_LEND); /* Turn the backlight early on */ - WARN_ON(gpio_request(S3C2410_GPG(4), "backlight")); - gpio_direction_output(S3C2410_GPG(4), 1); + WARN_ON(gpio_request_one(S3C2410_GPG(4), GPIOF_OUT_INIT_HIGH, NULL)); + gpio_free(S3C2410_GPG(4)); /* remove pullup on optional PWM backlight -- unused on 3.5 and 7"s */ s3c_gpio_setpull(S3C2410_GPB(1), S3C_GPIO_PULL_UP); diff --git a/trunk/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h b/trunk/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h new file mode 100644 index 000000000000..9d0c43b4b687 --- /dev/null +++ b/trunk/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h @@ -0,0 +1,18 @@ +/* linux/arch/arm/mach-s3c64xx/include/mach/spi-clocks.h + * + * Copyright (C) 2009 Samsung Electronics Ltd. + * Jaswinder Singh + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __S3C64XX_PLAT_SPI_CLKS_H +#define __S3C64XX_PLAT_SPI_CLKS_H __FILE__ + +#define S3C64XX_SPI_SRCCLK_PCLK 0 +#define S3C64XX_SPI_SRCCLK_SPIBUS 1 +#define S3C64XX_SPI_SRCCLK_48M 2 + +#endif /* __S3C64XX_PLAT_SPI_CLKS_H */ diff --git a/trunk/arch/arm/mach-s5p64x0/dma.c b/trunk/arch/arm/mach-s5p64x0/dma.c index 9c4ce085f585..2ee5dc069b37 100644 --- a/trunk/arch/arm/mach-s5p64x0/dma.c +++ b/trunk/arch/arm/mach-s5p64x0/dma.c @@ -36,6 +36,8 @@ #include #include +static u64 dma_dmamask = DMA_BIT_MASK(32); + static u8 s5p6440_pdma_peri[] = { DMACH_UART0_RX, DMACH_UART0_TX, diff --git a/trunk/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/trunk/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h new file mode 100644 index 000000000000..170a20a9643a --- /dev/null +++ b/trunk/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h @@ -0,0 +1,20 @@ +/* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Copyright (C) 2010 Samsung Electronics Co. Ltd. + * Jaswinder Singh + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_SPI_CLKS_H +#define __ASM_ARCH_SPI_CLKS_H __FILE__ + +#define S5P64X0_SPI_SRCCLK_PCLK 0 +#define S5P64X0_SPI_SRCCLK_SCLK 1 + +#endif /* __ASM_ARCH_SPI_CLKS_H */ diff --git a/trunk/arch/arm/mach-s5pc100/dma.c b/trunk/arch/arm/mach-s5pc100/dma.c index b1418409709e..afd8db2d5991 100644 --- a/trunk/arch/arm/mach-s5pc100/dma.c +++ b/trunk/arch/arm/mach-s5pc100/dma.c @@ -33,6 +33,8 @@ #include #include +static u64 dma_dmamask = DMA_BIT_MASK(32); + static u8 pdma0_peri[] = { DMACH_UART0_RX, DMACH_UART0_TX, diff --git a/trunk/arch/arm/mach-s5pc100/include/mach/spi-clocks.h b/trunk/arch/arm/mach-s5pc100/include/mach/spi-clocks.h new file mode 100644 index 000000000000..65e426370bb2 --- /dev/null +++ b/trunk/arch/arm/mach-s5pc100/include/mach/spi-clocks.h @@ -0,0 +1,18 @@ +/* linux/arch/arm/mach-s5pc100/include/mach/spi-clocks.h + * + * Copyright (C) 2010 Samsung Electronics Co. Ltd. + * Jaswinder Singh + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __S5PC100_PLAT_SPI_CLKS_H +#define __S5PC100_PLAT_SPI_CLKS_H __FILE__ + +#define S5PC100_SPI_SRCCLK_PCLK 0 +#define S5PC100_SPI_SRCCLK_48M 1 +#define S5PC100_SPI_SRCCLK_SPIBUS 2 + +#endif /* __S5PC100_PLAT_SPI_CLKS_H */ diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/spi-clocks.h b/trunk/arch/arm/mach-s5pv210/include/mach/spi-clocks.h new file mode 100644 index 000000000000..02acded5f73d --- /dev/null +++ b/trunk/arch/arm/mach-s5pv210/include/mach/spi-clocks.h @@ -0,0 +1,17 @@ +/* linux/arch/arm/mach-s5pv210/include/mach/spi-clocks.h + * + * Copyright (C) 2010 Samsung Electronics Co. Ltd. + * Jaswinder Singh + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __S5PV210_PLAT_SPI_CLKS_H +#define __S5PV210_PLAT_SPI_CLKS_H __FILE__ + +#define S5PV210_SPI_SRCCLK_PCLK 0 +#define S5PV210_SPI_SRCCLK_SCLK 1 + +#endif /* __S5PV210_PLAT_SPI_CLKS_H */ diff --git a/trunk/arch/arm/mach-tegra/Kconfig b/trunk/arch/arm/mach-tegra/Kconfig index 7c407393cd07..6a113a9bb87a 100644 --- a/trunk/arch/arm/mach-tegra/Kconfig +++ b/trunk/arch/arm/mach-tegra/Kconfig @@ -63,6 +63,7 @@ comment "Tegra board type" config MACH_HARMONY bool "Harmony board" depends on ARCH_TEGRA_2x_SOC + select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for nVidia Harmony development platform @@ -70,6 +71,7 @@ config MACH_KAEN bool "Kaen board" depends on ARCH_TEGRA_2x_SOC select MACH_SEABOARD + select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for the Kaen version of Seaboard @@ -82,6 +84,7 @@ config MACH_PAZ00 config MACH_SEABOARD bool "Seaboard board" depends on ARCH_TEGRA_2x_SOC + select MACH_HAS_SND_SOC_TEGRA_WM8903 if SND_SOC help Support for nVidia Seaboard development platform. It will also be included for some of the derivative boards that diff --git a/trunk/arch/arm/mach-tegra/Makefile b/trunk/arch/arm/mach-tegra/Makefile index 35253fdd1ba7..2eb4445ddb14 100644 --- a/trunk/arch/arm/mach-tegra/Makefile +++ b/trunk/arch/arm/mach-tegra/Makefile @@ -8,9 +8,9 @@ obj-y += timer.o obj-y += fuse.o obj-y += pmc.o obj-y += flowctrl.o -obj-y += powergate.o obj-$(CONFIG_CPU_IDLE) += cpuidle.o obj-$(CONFIG_CPU_IDLE) += sleep.o +obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += powergate.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_clocks.o obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += board-dt-tegra30.o diff --git a/trunk/arch/arm/mach-tegra/Makefile.boot b/trunk/arch/arm/mach-tegra/Makefile.boot index 8040345bd971..9a82094092d7 100644 --- a/trunk/arch/arm/mach-tegra/Makefile.boot +++ b/trunk/arch/arm/mach-tegra/Makefile.boot @@ -2,9 +2,9 @@ zreladdr-$(CONFIG_ARCH_TEGRA_2x_SOC) += 0x00008000 params_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00000100 initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 -dtb-$(CONFIG_MACH_HARMONY) += tegra20-harmony.dtb -dtb-$(CONFIG_MACH_PAZ00) += tegra20-paz00.dtb -dtb-$(CONFIG_MACH_SEABOARD) += tegra20-seaboard.dtb -dtb-$(CONFIG_MACH_TRIMSLICE) += tegra20-trimslice.dtb -dtb-$(CONFIG_MACH_VENTANA) += tegra20-ventana.dtb -dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra30-cardhu.dtb +dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb +dtb-$(CONFIG_MACH_PAZ00) += tegra-paz00.dtb +dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb +dtb-$(CONFIG_MACH_TRIMSLICE) += tegra-trimslice.dtb +dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb +dtb-$(CONFIG_ARCH_TEGRA_3x_SOC) += tegra-cardhu.dtb diff --git a/trunk/arch/arm/mach-tegra/cpuidle.c b/trunk/arch/arm/mach-tegra/cpuidle.c index 566e2f88899b..d83a8c0296f5 100644 --- a/trunk/arch/arm/mach-tegra/cpuidle.c +++ b/trunk/arch/arm/mach-tegra/cpuidle.c @@ -27,10 +27,10 @@ #include #include -#include - #include +extern void tegra_cpu_wfi(void); + static int tegra_idle_enter_lp3(struct cpuidle_device *dev, struct cpuidle_driver *drv, int index); @@ -64,7 +64,7 @@ static int tegra_idle_enter_lp3(struct cpuidle_device *dev, enter = ktime_get(); - cpu_do_idle(); + tegra_cpu_wfi(); exit = ktime_sub(ktime_get(), enter); us = ktime_to_us(exit); diff --git a/trunk/arch/arm/mach-tegra/sleep.S b/trunk/arch/arm/mach-tegra/sleep.S index d29b156a8011..5b20197bae7f 100644 --- a/trunk/arch/arm/mach-tegra/sleep.S +++ b/trunk/arch/arm/mach-tegra/sleep.S @@ -62,3 +62,32 @@ movw \reg, #:lower16:\val movt \reg, #:upper16:\val .endm + +/* + * tegra_cpu_wfi + * + * puts current CPU in clock-gated wfi using the flow controller + * + * corrupts r0-r3 + * must be called with MMU on + */ + +ENTRY(tegra_cpu_wfi) + cpu_id r0 + cpu_to_halt_reg r1, r0 + cpu_to_csr_reg r2, r0 + mov32 r0, TEGRA_FLOW_CTRL_VIRT + mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG + str r3, [r0, r2] @ clear event & interrupt status + mov r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT | FLOW_CTRL_JTAG_RESUME + str r3, [r0, r1] @ put flow controller in wait irq mode + dsb + wfi + mov r3, #0 + str r3, [r0, r1] @ clear flow controller halt status + mov r3, #FLOW_CTRL_CSR_INTR_FLAG | FLOW_CTRL_CSR_EVENT_FLAG + str r3, [r0, r2] @ clear event & interrupt status + dsb + mov pc, lr +ENDPROC(tegra_cpu_wfi) + diff --git a/trunk/arch/arm/plat-omap/Makefile b/trunk/arch/arm/plat-omap/Makefile index 6d87532871cd..ed8605f01155 100644 --- a/trunk/arch/arm/plat-omap/Makefile +++ b/trunk/arch/arm/plat-omap/Makefile @@ -4,7 +4,7 @@ # Common support obj-y := common.o sram.o clock.o devices.o dma.o mux.o \ - fb.o counter_32k.o + usb.o fb.o counter_32k.o obj-m := obj-n := obj- := diff --git a/trunk/arch/arm/plat-omap/dma.c b/trunk/arch/arm/plat-omap/dma.c index 7fe626761e53..cb16ade437cb 100644 --- a/trunk/arch/arm/plat-omap/dma.c +++ b/trunk/arch/arm/plat-omap/dma.c @@ -573,25 +573,22 @@ EXPORT_SYMBOL(omap_set_dma_dest_burst_mode); static inline void omap_enable_channel_irq(int lch) { + u32 status; + /* Clear CSR */ if (cpu_class_is_omap1()) - p->dma_read(CSR, lch); - else + status = p->dma_read(CSR, lch); + else if (cpu_class_is_omap2()) p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); /* Enable some nice interrupts. */ p->dma_write(dma_chan[lch].enabled_irqs, CICR, lch); } -static inline void omap_disable_channel_irq(int lch) +static void omap_disable_channel_irq(int lch) { - /* disable channel interrupts */ - p->dma_write(0, CICR, lch); - /* Clear CSR */ - if (cpu_class_is_omap1()) - p->dma_read(CSR, lch); - else - p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); + if (cpu_class_is_omap2()) + p->dma_write(0, CICR, lch); } void omap_enable_dma_irq(int lch, u16 bits) @@ -635,14 +632,14 @@ static inline void disable_lnk(int lch) l = p->dma_read(CLNK_CTRL, lch); /* Disable interrupts */ - omap_disable_channel_irq(lch); - if (cpu_class_is_omap1()) { + p->dma_write(0, CICR, lch); /* Set the STOP_LNK bit */ l |= 1 << 14; } if (cpu_class_is_omap2()) { + omap_disable_channel_irq(lch); /* Clear the ENABLE_LNK bit */ l &= ~(1 << 15); } @@ -660,9 +657,6 @@ static inline void omap2_enable_irq_lch(int lch) return; spin_lock_irqsave(&dma_chan_lock, flags); - /* clear IRQ STATUS */ - p->dma_write(1 << lch, IRQSTATUS_L0, lch); - /* Enable interrupt */ val = p->dma_read(IRQENABLE_L0, lch); val |= 1 << lch; p->dma_write(val, IRQENABLE_L0, lch); @@ -678,12 +672,9 @@ static inline void omap2_disable_irq_lch(int lch) return; spin_lock_irqsave(&dma_chan_lock, flags); - /* Disable interrupt */ val = p->dma_read(IRQENABLE_L0, lch); val &= ~(1 << lch); p->dma_write(val, IRQENABLE_L0, lch); - /* clear IRQ STATUS */ - p->dma_write(1 << lch, IRQSTATUS_L0, lch); spin_unlock_irqrestore(&dma_chan_lock, flags); } @@ -754,8 +745,11 @@ int omap_request_dma(int dev_id, const char *dev_name, } if (cpu_class_is_omap2()) { - omap_enable_channel_irq(free_ch); omap2_enable_irq_lch(free_ch); + omap_enable_channel_irq(free_ch); + /* Clear the CSR register and IRQ status register */ + p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, free_ch); + p->dma_write(1 << free_ch, IRQSTATUS_L0, 0); } *dma_ch_out = free_ch; @@ -774,19 +768,27 @@ void omap_free_dma(int lch) return; } - /* Disable interrupt for logical channel */ - if (cpu_class_is_omap2()) + if (cpu_class_is_omap1()) { + /* Disable all DMA interrupts for the channel. */ + p->dma_write(0, CICR, lch); + /* Make sure the DMA transfer is stopped. */ + p->dma_write(0, CCR, lch); + } + + if (cpu_class_is_omap2()) { omap2_disable_irq_lch(lch); - /* Disable all DMA interrupts for the channel. */ - omap_disable_channel_irq(lch); + /* Clear the CSR register and IRQ status register */ + p->dma_write(OMAP2_DMA_CSR_CLEAR_MASK, CSR, lch); + p->dma_write(1 << lch, IRQSTATUS_L0, lch); - /* Make sure the DMA transfer is stopped. */ - p->dma_write(0, CCR, lch); + /* Disable all DMA interrupts for the channel. */ + p->dma_write(0, CICR, lch); - /* Clear registers */ - if (cpu_class_is_omap2()) + /* Make sure the DMA transfer is stopped. */ + p->dma_write(0, CCR, lch); omap_clear_dma(lch); + } spin_lock_irqsave(&dma_chan_lock, flags); dma_chan[lch].dev_id = -1; @@ -941,7 +943,8 @@ void omap_stop_dma(int lch) u32 l; /* Disable all interrupts on the channel */ - omap_disable_channel_irq(lch); + if (cpu_class_is_omap1()) + p->dma_write(0, CICR, lch); l = p->dma_read(CCR, lch); if (IS_DMA_ERRATA(DMA_ERRATA_i541) && diff --git a/trunk/arch/arm/plat-omap/include/plat/board.h b/trunk/arch/arm/plat-omap/include/plat/board.h index e62f20a5c0af..4814c5b65306 100644 --- a/trunk/arch/arm/plat-omap/include/plat/board.h +++ b/trunk/arch/arm/plat-omap/include/plat/board.h @@ -57,6 +57,44 @@ struct omap_camera_sensor_config { int (*power_off)(void * data); }; +struct omap_usb_config { + /* Configure drivers according to the connectors on your board: + * - "A" connector (rectagular) + * ... for host/OHCI use, set "register_host". + * - "B" connector (squarish) or "Mini-B" + * ... for device/gadget use, set "register_dev". + * - "Mini-AB" connector (very similar to Mini-B) + * ... for OTG use as device OR host, initialize "otg" + */ + unsigned register_host:1; + unsigned register_dev:1; + u8 otg; /* port number, 1-based: usb1 == 2 */ + + u8 hmc_mode; + + /* implicitly true if otg: host supports remote wakeup? */ + u8 rwc; + + /* signaling pins used to talk to transceiver on usbN: + * 0 == usbN unused + * 2 == usb0-only, using internal transceiver + * 3 == 3 wire bidirectional + * 4 == 4 wire bidirectional + * 6 == 6 wire unidirectional (or TLL) + */ + u8 pins[3]; + + struct platform_device *udc_device; + struct platform_device *ohci_device; + struct platform_device *otg_device; + + u32 (*usb0_init)(unsigned nwires, unsigned is_device); + u32 (*usb1_init)(unsigned nwires); + u32 (*usb2_init)(unsigned nwires, unsigned alt_pingroup); + + int (*ocpi_enable)(void); +}; + struct omap_lcd_config { char panel_name[16]; char ctrl_name[16]; diff --git a/trunk/arch/arm/plat-omap/include/plat/clock.h b/trunk/arch/arm/plat-omap/include/plat/clock.h index 656b9862279e..d0ef57c1d71b 100644 --- a/trunk/arch/arm/plat-omap/include/plat/clock.h +++ b/trunk/arch/arm/plat-omap/include/plat/clock.h @@ -156,6 +156,7 @@ struct dpll_data { u8 min_divider; u16 max_divider; u8 modes; +#if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) void __iomem *autoidle_reg; void __iomem *idlest_reg; u32 autoidle_mask; @@ -166,6 +167,7 @@ struct dpll_data { u8 auto_recal_bit; u8 recal_en_bit; u8 recal_st_bit; +# endif u8 flags; }; diff --git a/trunk/arch/arm/plat-omap/include/plat/dsp.h b/trunk/arch/arm/plat-omap/include/plat/dsp.h index 5927709b1908..9c604b390f9f 100644 --- a/trunk/arch/arm/plat-omap/include/plat/dsp.h +++ b/trunk/arch/arm/plat-omap/include/plat/dsp.h @@ -18,9 +18,6 @@ struct omap_dsp_platform_data { u32 (*dsp_cm_read)(s16 , u16); u32 (*dsp_cm_rmw_bits)(u32, u32, s16, s16); - void (*set_bootaddr)(u32); - void (*set_bootmode)(u8); - phys_addr_t phys_mempool_base; phys_addr_t phys_mempool_size; }; diff --git a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h index a8ecc53b3670..c835b7194ff5 100644 --- a/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h +++ b/trunk/arch/arm/plat-omap/include/plat/omap_hwmod.h @@ -629,8 +629,6 @@ int omap_hwmod_no_setup_reset(struct omap_hwmod *oh); int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx); -extern void __init omap_hwmod_init(void); - /* * Chip variant-specific hwmod init routines - XXX should be converted * to use initcalls once the initial boot ordering is straightened out diff --git a/trunk/arch/arm/plat-omap/include/plat/usb.h b/trunk/arch/arm/plat-omap/include/plat/usb.h index 548a4c8d63df..762eeb0626c1 100644 --- a/trunk/arch/arm/plat-omap/include/plat/usb.h +++ b/trunk/arch/arm/plat-omap/include/plat/usb.h @@ -44,8 +44,6 @@ struct usbhs_omap_board_data { struct regulator *regulator[OMAP3_HS_USB_PORTS]; }; -#ifdef CONFIG_ARCH_OMAP2PLUS - struct ehci_hcd_omap_platform_data { enum usbhs_omap_port_mode port_mode[OMAP3_HS_USB_PORTS]; int reset_gpio_port[OMAP3_HS_USB_PORTS]; @@ -66,6 +64,26 @@ struct usbhs_omap_platform_data { }; /*-------------------------------------------------------------------------*/ +#define OMAP1_OTG_BASE 0xfffb0400 +#define OMAP1_UDC_BASE 0xfffb4000 +#define OMAP1_OHCI_BASE 0xfffba000 + +#define OMAP2_OHCI_BASE 0x4805e000 +#define OMAP2_UDC_BASE 0x4805e200 +#define OMAP2_OTG_BASE 0x4805e300 + +#ifdef CONFIG_ARCH_OMAP1 + +#define OTG_BASE OMAP1_OTG_BASE +#define UDC_BASE OMAP1_UDC_BASE +#define OMAP_OHCI_BASE OMAP1_OHCI_BASE + +#else + +#define OTG_BASE OMAP2_OTG_BASE +#define UDC_BASE OMAP2_UDC_BASE +#define OMAP_OHCI_BASE OMAP2_OHCI_BASE + struct omap_musb_board_data { u8 interface_type; u8 mode; @@ -89,6 +107,44 @@ extern int omap4430_phy_init(struct device *dev); extern int omap4430_phy_exit(struct device *dev); extern int omap4430_phy_suspend(struct device *dev, int suspend); +/* + * NOTE: Please update omap USB drivers to use ioremap + read/write + */ + +#define OMAP2_L4_IO_OFFSET 0xb2000000 +#define OMAP2_L4_IO_ADDRESS(pa) IOMEM((pa) + OMAP2_L4_IO_OFFSET) + +static inline u8 omap_readb(u32 pa) +{ + return __raw_readb(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline u16 omap_readw(u32 pa) +{ + return __raw_readw(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline u32 omap_readl(u32 pa) +{ + return __raw_readl(OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline void omap_writeb(u8 v, u32 pa) +{ + __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa)); +} + + +static inline void omap_writew(u16 v, u32 pa) +{ + __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa)); +} + +static inline void omap_writel(u32 v, u32 pa) +{ + __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa)); +} + #endif extern void am35x_musb_reset(void); @@ -97,6 +153,142 @@ extern void am35x_musb_clear_irq(void); extern void am35x_set_mode(u8 musb_mode); extern void ti81xx_musb_phy_power(u8 on); +/* + * FIXME correct answer depends on hmc_mode, + * as does (on omap1) any nonzero value for config->otg port number + */ +#ifdef CONFIG_USB_GADGET_OMAP +#define is_usb0_device(config) 1 +#else +#define is_usb0_device(config) 0 +#endif + +void omap_otg_init(struct omap_usb_config *config); + +#if defined(CONFIG_USB) || defined(CONFIG_USB_MODULE) +void omap1_usb_init(struct omap_usb_config *pdata); +#else +static inline void omap1_usb_init(struct omap_usb_config *pdata) +{ +} +#endif + +#if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP_OTG_MODULE) +void omap2_usbfs_init(struct omap_usb_config *pdata); +#else +static inline void omap2_usbfs_init(struct omap_usb_config *pdata) +{ +} +#endif + +/*-------------------------------------------------------------------------*/ + +/* + * OTG and transceiver registers, for OMAPs starting with ARM926 + */ +#define OTG_REV (OTG_BASE + 0x00) +#define OTG_SYSCON_1 (OTG_BASE + 0x04) +# define USB2_TRX_MODE(w) (((w)>>24)&0x07) +# define USB1_TRX_MODE(w) (((w)>>20)&0x07) +# define USB0_TRX_MODE(w) (((w)>>16)&0x07) +# define OTG_IDLE_EN (1 << 15) +# define HST_IDLE_EN (1 << 14) +# define DEV_IDLE_EN (1 << 13) +# define OTG_RESET_DONE (1 << 2) +# define OTG_SOFT_RESET (1 << 1) +#define OTG_SYSCON_2 (OTG_BASE + 0x08) +# define OTG_EN (1 << 31) +# define USBX_SYNCHRO (1 << 30) +# define OTG_MST16 (1 << 29) +# define SRP_GPDATA (1 << 28) +# define SRP_GPDVBUS (1 << 27) +# define SRP_GPUVBUS(w) (((w)>>24)&0x07) +# define A_WAIT_VRISE(w) (((w)>>20)&0x07) +# define B_ASE_BRST(w) (((w)>>16)&0x07) +# define SRP_DPW (1 << 14) +# define SRP_DATA (1 << 13) +# define SRP_VBUS (1 << 12) +# define OTG_PADEN (1 << 10) +# define HMC_PADEN (1 << 9) +# define UHOST_EN (1 << 8) +# define HMC_TLLSPEED (1 << 7) +# define HMC_TLLATTACH (1 << 6) +# define OTG_HMC(w) (((w)>>0)&0x3f) +#define OTG_CTRL (OTG_BASE + 0x0c) +# define OTG_USB2_EN (1 << 29) +# define OTG_USB2_DP (1 << 28) +# define OTG_USB2_DM (1 << 27) +# define OTG_USB1_EN (1 << 26) +# define OTG_USB1_DP (1 << 25) +# define OTG_USB1_DM (1 << 24) +# define OTG_USB0_EN (1 << 23) +# define OTG_USB0_DP (1 << 22) +# define OTG_USB0_DM (1 << 21) +# define OTG_ASESSVLD (1 << 20) +# define OTG_BSESSEND (1 << 19) +# define OTG_BSESSVLD (1 << 18) +# define OTG_VBUSVLD (1 << 17) +# define OTG_ID (1 << 16) +# define OTG_DRIVER_SEL (1 << 15) +# define OTG_A_SETB_HNPEN (1 << 12) +# define OTG_A_BUSREQ (1 << 11) +# define OTG_B_HNPEN (1 << 9) +# define OTG_B_BUSREQ (1 << 8) +# define OTG_BUSDROP (1 << 7) +# define OTG_PULLDOWN (1 << 5) +# define OTG_PULLUP (1 << 4) +# define OTG_DRV_VBUS (1 << 3) +# define OTG_PD_VBUS (1 << 2) +# define OTG_PU_VBUS (1 << 1) +# define OTG_PU_ID (1 << 0) +#define OTG_IRQ_EN (OTG_BASE + 0x10) /* 16-bit */ +# define DRIVER_SWITCH (1 << 15) +# define A_VBUS_ERR (1 << 13) +# define A_REQ_TMROUT (1 << 12) +# define A_SRP_DETECT (1 << 11) +# define B_HNP_FAIL (1 << 10) +# define B_SRP_TMROUT (1 << 9) +# define B_SRP_DONE (1 << 8) +# define B_SRP_STARTED (1 << 7) +# define OPRT_CHG (1 << 0) +#define OTG_IRQ_SRC (OTG_BASE + 0x14) /* 16-bit */ + // same bits as in IRQ_EN +#define OTG_OUTCTRL (OTG_BASE + 0x18) /* 16-bit */ +# define OTGVPD (1 << 14) +# define OTGVPU (1 << 13) +# define OTGPUID (1 << 12) +# define USB2VDR (1 << 10) +# define USB2PDEN (1 << 9) +# define USB2PUEN (1 << 8) +# define USB1VDR (1 << 6) +# define USB1PDEN (1 << 5) +# define USB1PUEN (1 << 4) +# define USB0VDR (1 << 2) +# define USB0PDEN (1 << 1) +# define USB0PUEN (1 << 0) +#define OTG_TEST (OTG_BASE + 0x20) /* 16-bit */ +#define OTG_VENDOR_CODE (OTG_BASE + 0xfc) /* 16-bit */ + +/*-------------------------------------------------------------------------*/ + +/* OMAP1 */ +#define USB_TRANSCEIVER_CTRL (0xfffe1000 + 0x0064) +# define CONF_USB2_UNI_R (1 << 8) +# define CONF_USB1_UNI_R (1 << 7) +# define CONF_USB_PORT0_R(x) (((x)>>4)&0x7) +# define CONF_USB0_ISOLATE_R (1 << 3) +# define CONF_USB_PWRDN_DM_R (1 << 2) +# define CONF_USB_PWRDN_DP_R (1 << 1) + +/* OMAP2 */ +# define USB_UNIDIR 0x0 +# define USB_UNIDIR_TLL 0x1 +# define USB_BIDIR 0x2 +# define USB_BIDIR_TLL 0x3 +# define USBTXWRMODEI(port, x) ((x) << (22 - (port * 2))) +# define USBT2TLL5PI (1 << 17) +# define USB0PUENACTLOI (1 << 16) +# define USBSTANDBYCTRL (1 << 15) /* AM35x */ /* USB 2.0 PHY Control */ #define CONF2_PHY_GPIOMODE (1 << 23) diff --git a/trunk/arch/arm/plat-omap/usb.c b/trunk/arch/arm/plat-omap/usb.c new file mode 100644 index 000000000000..daa0327381b5 --- /dev/null +++ b/trunk/arch/arm/plat-omap/usb.c @@ -0,0 +1,145 @@ + /* + * arch/arm/plat-omap/usb.c -- platform level USB initialization + * + * Copyright (C) 2004 Texas Instruments, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#undef DEBUG + +#include +#include +#include +#include +#include + +#include +#include + +#include + +#ifdef CONFIG_ARCH_OMAP_OTG + +void __init +omap_otg_init(struct omap_usb_config *config) +{ + u32 syscon; + int alt_pingroup = 0; + + /* NOTE: no bus or clock setup (yet?) */ + + syscon = omap_readl(OTG_SYSCON_1) & 0xffff; + if (!(syscon & OTG_RESET_DONE)) + pr_debug("USB resets not complete?\n"); + + //omap_writew(0, OTG_IRQ_EN); + + /* pin muxing and transceiver pinouts */ + if (config->pins[0] > 2) /* alt pingroup 2 */ + alt_pingroup = 1; + syscon |= config->usb0_init(config->pins[0], is_usb0_device(config)); + syscon |= config->usb1_init(config->pins[1]); + syscon |= config->usb2_init(config->pins[2], alt_pingroup); + pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); + omap_writel(syscon, OTG_SYSCON_1); + + syscon = config->hmc_mode; + syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */; +#ifdef CONFIG_USB_OTG + if (config->otg) + syscon |= OTG_EN; +#endif + if (cpu_class_is_omap1()) + pr_debug("USB_TRANSCEIVER_CTRL = %03x\n", + omap_readl(USB_TRANSCEIVER_CTRL)); + pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2)); + omap_writel(syscon, OTG_SYSCON_2); + + printk("USB: hmc %d", config->hmc_mode); + if (!alt_pingroup) + printk(", usb2 alt %d wires", config->pins[2]); + else if (config->pins[0]) + printk(", usb0 %d wires%s", config->pins[0], + is_usb0_device(config) ? " (dev)" : ""); + if (config->pins[1]) + printk(", usb1 %d wires", config->pins[1]); + if (!alt_pingroup && config->pins[2]) + printk(", usb2 %d wires", config->pins[2]); + if (config->otg) + printk(", Mini-AB on usb%d", config->otg - 1); + printk("\n"); + + if (cpu_class_is_omap1()) { + u16 w; + + /* leave USB clocks/controllers off until needed */ + w = omap_readw(ULPD_SOFT_REQ); + w &= ~SOFT_USB_CLK_REQ; + omap_writew(w, ULPD_SOFT_REQ); + + w = omap_readw(ULPD_CLOCK_CTRL); + w &= ~USB_MCLK_EN; + w |= DIS_USB_PVCI_CLK; + omap_writew(w, ULPD_CLOCK_CTRL); + } + syscon = omap_readl(OTG_SYSCON_1); + syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN; + +#ifdef CONFIG_USB_GADGET_OMAP + if (config->otg || config->register_dev) { + struct platform_device *udc_device = config->udc_device; + int status; + + syscon &= ~DEV_IDLE_EN; + udc_device->dev.platform_data = config; + status = platform_device_register(udc_device); + if (status) + pr_debug("can't register UDC device, %d\n", status); + } +#endif + +#if defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE) + if (config->otg || config->register_host) { + struct platform_device *ohci_device = config->ohci_device; + int status; + + syscon &= ~HST_IDLE_EN; + ohci_device->dev.platform_data = config; + status = platform_device_register(ohci_device); + if (status) + pr_debug("can't register OHCI device, %d\n", status); + } +#endif + +#ifdef CONFIG_USB_OTG + if (config->otg) { + struct platform_device *otg_device = config->otg_device; + int status; + + syscon &= ~OTG_IDLE_EN; + otg_device->dev.platform_data = config; + status = platform_device_register(otg_device); + if (status) + pr_debug("can't register OTG device, %d\n", status); + } +#endif + pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1)); + omap_writel(syscon, OTG_SYSCON_1); +} + +#else +void omap_otg_init(struct omap_usb_config *config) {} +#endif diff --git a/trunk/arch/arm/plat-samsung/Kconfig b/trunk/arch/arm/plat-samsung/Kconfig index ffc84acb7e97..a2fae4ea0936 100644 --- a/trunk/arch/arm/plat-samsung/Kconfig +++ b/trunk/arch/arm/plat-samsung/Kconfig @@ -491,6 +491,14 @@ config S5P_SLEEP Internal config node to apply common S5P sleep management code. Can be selected by S5P and newer SoCs with similar sleep procedure. +comment "Power Domain" + +config SAMSUNG_PD + bool "Samsung Power Domain" + depends on PM_RUNTIME + help + Say Y here if you want to control Power Domain by Runtime PM. + config DEBUG_S3C_UART depends on PLAT_SAMSUNG int diff --git a/trunk/arch/arm/plat-samsung/Makefile b/trunk/arch/arm/plat-samsung/Makefile index 4bb58c2dc704..860b2db4db15 100644 --- a/trunk/arch/arm/plat-samsung/Makefile +++ b/trunk/arch/arm/plat-samsung/Makefile @@ -60,6 +60,10 @@ obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o obj-$(CONFIG_S5P_PM) += s5p-pm.o s5p-irq-pm.o obj-$(CONFIG_S5P_SLEEP) += s5p-sleep.o +# PD support + +obj-$(CONFIG_SAMSUNG_PD) += pd.o + # PWM support obj-$(CONFIG_HAVE_PWM) += pwm.o diff --git a/trunk/arch/arm/plat-samsung/include/plat/devs.h b/trunk/arch/arm/plat-samsung/include/plat/devs.h index 5da4b4f38f40..61ca2f356c52 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/devs.h +++ b/trunk/arch/arm/plat-samsung/include/plat/devs.h @@ -131,6 +131,7 @@ extern struct platform_device exynos4_device_ohci; extern struct platform_device exynos4_device_pcm0; extern struct platform_device exynos4_device_pcm1; extern struct platform_device exynos4_device_pcm2; +extern struct platform_device exynos4_device_pd[]; extern struct platform_device exynos4_device_spdif; extern struct platform_device exynos_device_drm; diff --git a/trunk/arch/arm/plat-samsung/include/plat/fb.h b/trunk/arch/arm/plat-samsung/include/plat/fb.h index b885322717a1..536002ff2ab8 100644 --- a/trunk/arch/arm/plat-samsung/include/plat/fb.h +++ b/trunk/arch/arm/plat-samsung/include/plat/fb.h @@ -43,6 +43,7 @@ struct s3c_fb_pd_win { * @setup_gpio: Setup the external GPIO pins to the right state to transfer * the data from the display system to the connected display * device. + * @default_win: default window layer number to be used for UI layer. * @vidcon0: The base vidcon0 values to control the panel data format. * @vidcon1: The base vidcon1 values to control the panel data output. * @vtiming: Video timing when connected to a RGB type panel. diff --git a/trunk/arch/arm/plat-samsung/include/plat/pd.h b/trunk/arch/arm/plat-samsung/include/plat/pd.h new file mode 100644 index 000000000000..abb4bc32716a --- /dev/null +++ b/trunk/arch/arm/plat-samsung/include/plat/pd.h @@ -0,0 +1,30 @@ +/* linux/arch/arm/plat-samsung/include/plat/pd.h + * + * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_PLAT_SAMSUNG_PD_H +#define __ASM_PLAT_SAMSUNG_PD_H __FILE__ + +struct samsung_pd_info { + int (*enable)(struct device *dev); + int (*disable)(struct device *dev); + void __iomem *base; +}; + +enum exynos4_pd_block { + PD_MFC, + PD_G3D, + PD_LCD0, + PD_LCD1, + PD_TV, + PD_CAM, + PD_GPS +}; + +#endif /* __ASM_PLAT_SAMSUNG_PD_H */ diff --git a/trunk/arch/arm/plat-samsung/pd.c b/trunk/arch/arm/plat-samsung/pd.c new file mode 100644 index 000000000000..312b510d86b7 --- /dev/null +++ b/trunk/arch/arm/plat-samsung/pd.c @@ -0,0 +1,95 @@ +/* linux/arch/arm/plat-samsung/pd.c + * + * Copyright (c) 2010 Samsung Electronics Co., Ltd. + * http://www.samsung.com + * + * Samsung Power domain support + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#include +#include +#include +#include +#include + +#include + +static int samsung_pd_probe(struct platform_device *pdev) +{ + struct samsung_pd_info *pdata = pdev->dev.platform_data; + struct device *dev = &pdev->dev; + + if (!pdata) { + dev_err(dev, "no device data specified\n"); + return -ENOENT; + } + + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + dev_info(dev, "power domain registered\n"); + return 0; +} + +static int __devexit samsung_pd_remove(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + + pm_runtime_disable(dev); + return 0; +} + +static int samsung_pd_runtime_suspend(struct device *dev) +{ + struct samsung_pd_info *pdata = dev->platform_data; + int ret = 0; + + if (pdata->disable) + ret = pdata->disable(dev); + + dev_dbg(dev, "suspended\n"); + return ret; +} + +static int samsung_pd_runtime_resume(struct device *dev) +{ + struct samsung_pd_info *pdata = dev->platform_data; + int ret = 0; + + if (pdata->enable) + ret = pdata->enable(dev); + + dev_dbg(dev, "resumed\n"); + return ret; +} + +static const struct dev_pm_ops samsung_pd_pm_ops = { + .runtime_suspend = samsung_pd_runtime_suspend, + .runtime_resume = samsung_pd_runtime_resume, +}; + +static struct platform_driver samsung_pd_driver = { + .driver = { + .name = "samsung-pd", + .owner = THIS_MODULE, + .pm = &samsung_pd_pm_ops, + }, + .probe = samsung_pd_probe, + .remove = __devexit_p(samsung_pd_remove), +}; + +static int __init samsung_pd_init(void) +{ + int ret; + + ret = platform_driver_register(&samsung_pd_driver); + if (ret) + printk(KERN_ERR "%s: failed to add PD driver\n", __func__); + + return ret; +} +arch_initcall(samsung_pd_init); diff --git a/trunk/arch/arm/plat-samsung/pwm.c b/trunk/arch/arm/plat-samsung/pwm.c index d3583050fb05..c559d8438c70 100644 --- a/trunk/arch/arm/plat-samsung/pwm.c +++ b/trunk/arch/arm/plat-samsung/pwm.c @@ -36,6 +36,7 @@ struct pwm_device { unsigned int duty_ns; unsigned char tcon_base; + unsigned char running; unsigned char use_count; unsigned char pwm_id; }; @@ -115,6 +116,7 @@ int pwm_enable(struct pwm_device *pwm) local_irq_restore(flags); + pwm->running = 1; return 0; } @@ -132,6 +134,8 @@ void pwm_disable(struct pwm_device *pwm) __raw_writel(tcon, S3C2410_TCON); local_irq_restore(flags); + + pwm->running = 0; } EXPORT_SYMBOL(pwm_disable); diff --git a/trunk/drivers/amba/tegra-ahb.c b/trunk/drivers/amba/tegra-ahb.c index 0b6f0b28a487..aa0b1f160528 100644 --- a/trunk/drivers/amba/tegra-ahb.c +++ b/trunk/drivers/amba/tegra-ahb.c @@ -264,6 +264,11 @@ static int __devinit tegra_ahb_probe(struct platform_device *pdev) return 0; } +static int __devexit tegra_ahb_remove(struct platform_device *pdev) +{ + return 0; +} + static const struct of_device_id tegra_ahb_of_match[] __devinitconst = { { .compatible = "nvidia,tegra30-ahb", }, { .compatible = "nvidia,tegra20-ahb", }, @@ -272,6 +277,7 @@ static const struct of_device_id tegra_ahb_of_match[] __devinitconst = { static struct platform_driver tegra_ahb_driver = { .probe = tegra_ahb_probe, + .remove = __devexit_p(tegra_ahb_remove), .driver = { .name = DRV_NAME, .owner = THIS_MODULE, diff --git a/trunk/drivers/mmc/host/sdhci-tegra.c b/trunk/drivers/mmc/host/sdhci-tegra.c index 6e5338a071ce..b38d8a78f6a0 100644 --- a/trunk/drivers/mmc/host/sdhci-tegra.c +++ b/trunk/drivers/mmc/host/sdhci-tegra.c @@ -223,7 +223,6 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata( { struct tegra_sdhci_platform_data *plat; struct device_node *np = pdev->dev.of_node; - u32 bus_width; if (!np) return NULL; @@ -237,9 +236,7 @@ static struct tegra_sdhci_platform_data * __devinit sdhci_tegra_dt_parse_pdata( plat->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0); plat->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0); plat->power_gpio = of_get_named_gpio(np, "power-gpios", 0); - - if (of_property_read_u32(np, "bus-width", &bus_width) == 0 && - bus_width == 8) + if (of_find_property(np, "support-8bit", NULL)) plat->is_8bit = 1; return plat; diff --git a/trunk/drivers/rtc/rtc-at91rm9200.c b/trunk/drivers/rtc/rtc-at91rm9200.c index fca9790c7de7..dc474bc6522d 100644 --- a/trunk/drivers/rtc/rtc-at91rm9200.c +++ b/trunk/drivers/rtc/rtc-at91rm9200.c @@ -27,7 +27,6 @@ #include #include #include -#include #include diff --git a/trunk/drivers/usb/gadget/Kconfig b/trunk/drivers/usb/gadget/Kconfig index 271ca161d7ef..bddc8fd9a7be 100644 --- a/trunk/drivers/usb/gadget/Kconfig +++ b/trunk/drivers/usb/gadget/Kconfig @@ -185,7 +185,7 @@ config USB_FUSB300 config USB_OMAP tristate "OMAP USB Device Controller" - depends on ARCH_OMAP1 + depends on ARCH_OMAP select ISP1301_OMAP if MACH_OMAP_H2 || MACH_OMAP_H3 || MACH_OMAP_H4_OTG select USB_OTG_UTILS if ARCH_OMAP help diff --git a/trunk/drivers/usb/gadget/omap_udc.c b/trunk/drivers/usb/gadget/omap_udc.c index 89cbd2b22ab0..a460e8c204f4 100644 --- a/trunk/drivers/usb/gadget/omap_udc.c +++ b/trunk/drivers/usb/gadget/omap_udc.c @@ -44,8 +44,7 @@ #include #include - -#include +#include #include "omap_udc.h" diff --git a/trunk/drivers/usb/host/Kconfig b/trunk/drivers/usb/host/Kconfig index dcfaaa91a3fb..83e58df29fe3 100644 --- a/trunk/drivers/usb/host/Kconfig +++ b/trunk/drivers/usb/host/Kconfig @@ -308,7 +308,7 @@ config USB_OHCI_HCD config USB_OHCI_HCD_OMAP1 bool "OHCI support for OMAP1/2 chips" - depends on USB_OHCI_HCD && ARCH_OMAP1 + depends on USB_OHCI_HCD && (ARCH_OMAP1 || ARCH_OMAP2) default y ---help--- Enables support for the OHCI controller on OMAP1/2 chips. diff --git a/trunk/drivers/usb/host/ohci-omap.c b/trunk/drivers/usb/host/ohci-omap.c index b02c344e2cc9..9ce35d0d9d5d 100644 --- a/trunk/drivers/usb/host/ohci-omap.c +++ b/trunk/drivers/usb/host/ohci-omap.c @@ -20,15 +20,14 @@ #include #include +#include #include #include #include -#include - -#include #include -#include +#include +#include /* OMAP-1510 OHCI has its own MMU for DMA */ diff --git a/trunk/drivers/usb/otg/isp1301_omap.c b/trunk/drivers/usb/otg/isp1301_omap.c index e0558dfcfafc..70cf5d7bca48 100644 --- a/trunk/drivers/usb/otg/isp1301_omap.c +++ b/trunk/drivers/usb/otg/isp1301_omap.c @@ -36,9 +36,9 @@ #include #include +#include #include -#include #ifndef DEBUG #undef VERBOSE diff --git a/trunk/sound/soc/tegra/Kconfig b/trunk/sound/soc/tegra/Kconfig index 76dc230f2bb0..c1c8e955f4d3 100644 --- a/trunk/sound/soc/tegra/Kconfig +++ b/trunk/sound/soc/tegra/Kconfig @@ -58,9 +58,17 @@ config SND_SOC_TEGRA_WM8753 Say Y or M here if you want to add support for SoC audio on Tegra boards using the WM8753 codec, such as Whistler. +config MACH_HAS_SND_SOC_TEGRA_WM8903 + bool + help + Machines that use the SND_SOC_TEGRA_WM8903 driver should select + this config option, in order to allow the user to enable + SND_SOC_TEGRA_WM8903. + config SND_SOC_TEGRA_WM8903 tristate "SoC Audio support for Tegra boards using a WM8903 codec" depends on SND_SOC_TEGRA && I2C + depends on MACH_HAS_SND_SOC_TEGRA_WM8903 select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC select SND_SOC_TEGRA30_I2S if ARCH_TEGRA_3x_SOC select SND_SOC_WM8903 @@ -71,7 +79,7 @@ config SND_SOC_TEGRA_WM8903 config SND_SOC_TEGRA_TRIMSLICE tristate "SoC Audio support for TrimSlice board" - depends on SND_SOC_TEGRA && I2C + depends on SND_SOC_TEGRA && MACH_TRIMSLICE && I2C select SND_SOC_TEGRA20_I2S if ARCH_TEGRA_2x_SOC select SND_SOC_TLV320AIC23 help