From a5bf0d39df9ed1cc645932557aa91ef4c9cd46da Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 3 Feb 2010 15:48:03 +0000 Subject: [PATCH] --- yaml --- r: 180269 b: refs/heads/master c: 4aba098c8d64329f0c4b24d12e1dc5398dd41a75 h: refs/heads/master i: 180267: 11e70db4afb5704b6b2b6c67ed1ba5f7414d110b v: v3 --- [refs] | 2 +- trunk/arch/arm/mm/proc-arm6_7.S | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index aafd2c9ee8c2..c556dbcb7048 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0b7d5170dc5a4aca144b27d40b67d73b245df066 +refs/heads/master: 4aba098c8d64329f0c4b24d12e1dc5398dd41a75 diff --git a/trunk/arch/arm/mm/proc-arm6_7.S b/trunk/arch/arm/mm/proc-arm6_7.S index 3f9cd3d8f6d5..795dc615f43b 100644 --- a/trunk/arch/arm/mm/proc-arm6_7.S +++ b/trunk/arch/arm/mm/proc-arm6_7.S @@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area) ENTRY(cpu_arm7_data_abort) mrc p15, 0, r1, c5, c0, 0 @ get FSR mrc p15, 0, r0, c6, c0, 0 @ get FAR - ldr r8, [r0] @ read arm instruction + ldr r8, [r2] @ read arm instruction tst r8, #1 << 20 @ L = 0 -> write? orreq r1, r1, #1 << 11 @ yes. and r7, r8, #15 << 24