From a69a741fdd45f2cc2df2ac2835ea0d66cd4160a6 Mon Sep 17 00:00:00 2001
From: Jongpill Lee <boyko.lee@samsung.com>
Date: Fri, 27 Aug 2010 17:53:26 +0900
Subject: [PATCH] --- yaml --- r: 210113 b: refs/heads/master c:
 3297c2e6d7c3b1498b28c93141056cbe96444fde h: refs/heads/master i:   210111:
 9551e7332a206fb96849b77cba2cf3a874beabda v: v3

---
 [refs]                                        |  2 +-
 trunk/arch/arm/mach-s5pv310/clock.c           | 21 ++++++++++++-------
 .../mach-s5pv310/include/mach/regs-clock.h    |  2 ++
 3 files changed, 16 insertions(+), 9 deletions(-)

diff --git a/[refs] b/[refs]
index dc8cc7d1cf00..c8ea838ad8eb 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5a847b4af8057f0297356824f793988d311d7aa0
+refs/heads/master: 3297c2e6d7c3b1498b28c93141056cbe96444fde
diff --git a/trunk/arch/arm/mach-s5pv310/clock.c b/trunk/arch/arm/mach-s5pv310/clock.c
index 165c8bf412b2..26a0f03df8ea 100644
--- a/trunk/arch/arm/mach-s5pv310/clock.c
+++ b/trunk/arch/arm/mach-s5pv310/clock.c
@@ -30,6 +30,11 @@ static struct clk clk_sclk_hdmi27m = {
 	.rate		= 27000000,
 };
 
+static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable)
+{
+	return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable);
+}
+
 static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable)
 {
 	return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable);
@@ -397,7 +402,7 @@ static struct clksrc_clk clksrcs[] = {
 		.clk	= {
 			.name		= "uclk1",
 			.id		= 0,
-			.enable		= s5pv310_clk_ip_peril_ctrl,
+			.enable		= s5pv310_clksrc_mask_peril0_ctrl,
 			.ctrlbit	= (1 << 0),
 		},
 		.sources = &clkset_group,
@@ -407,8 +412,8 @@ static struct clksrc_clk clksrcs[] = {
 		.clk		= {
 			.name		= "uclk1",
 			.id		= 1,
-			.enable		= s5pv310_clk_ip_peril_ctrl,
-			.ctrlbit	= (1 << 1),
+			.enable		= s5pv310_clksrc_mask_peril0_ctrl,
+			.ctrlbit	= (1 << 4),
 		},
 		.sources = &clkset_group,
 		.reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 },
@@ -417,8 +422,8 @@ static struct clksrc_clk clksrcs[] = {
 		.clk		= {
 			.name		= "uclk1",
 			.id		= 2,
-			.enable		= s5pv310_clk_ip_peril_ctrl,
-			.ctrlbit	= (1 << 2),
+			.enable		= s5pv310_clksrc_mask_peril0_ctrl,
+			.ctrlbit	= (1 << 8),
 		},
 		.sources = &clkset_group,
 		.reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 },
@@ -427,8 +432,8 @@ static struct clksrc_clk clksrcs[] = {
 		.clk		= {
 			.name		= "uclk1",
 			.id		= 3,
-			.enable		= s5pv310_clk_ip_peril_ctrl,
-			.ctrlbit	= (1 << 3),
+			.enable		= s5pv310_clksrc_mask_peril0_ctrl,
+			.ctrlbit	= (1 << 12),
 		},
 		.sources = &clkset_group,
 		.reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 },
@@ -437,7 +442,7 @@ static struct clksrc_clk clksrcs[] = {
 		.clk		= {
 			.name		= "sclk_pwm",
 			.id		= -1,
-			.enable		= s5pv310_clk_ip_peril_ctrl,
+			.enable		= s5pv310_clksrc_mask_peril0_ctrl,
 			.ctrlbit	= (1 << 24),
 		},
 		.sources = &clkset_group,
diff --git a/trunk/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/trunk/arch/arm/mach-s5pv310/include/mach/regs-clock.h
index 7727b4563a26..4013553cd9be 100644
--- a/trunk/arch/arm/mach-s5pv310/include/mach/regs-clock.h
+++ b/trunk/arch/arm/mach-s5pv310/include/mach/regs-clock.h
@@ -38,6 +38,8 @@
 #define S5P_CLKDIV_PERIL4		S5P_CLKREG(0x0C560)
 #define S5P_CLKDIV_PERIL5		S5P_CLKREG(0x0C564)
 
+#define S5P_CLKSRC_MASK_PERIL0		S5P_CLKREG(0x0C350)
+
 #define S5P_CLKGATE_IP_PERIL		S5P_CLKREG(0x0C950)
 
 #define S5P_CLKSRC_CORE			S5P_CLKREG(0x10200)