From a73fb4e389282ac5cb39fa3316cef48ca605106c Mon Sep 17 00:00:00 2001 From: Huang Shijie Date: Fri, 25 May 2012 17:25:35 +0800 Subject: [PATCH] --- yaml --- r: 313222 b: refs/heads/master c: 7a8e5149efd4e20e329beec47e3bb57ce2c5938a h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/Kconfig | 4 +- trunk/arch/arm/boot/dts/ea3250.dts | 174 ------------------ trunk/arch/arm/boot/dts/imx28-evk.dts | 6 + trunk/arch/arm/boot/dts/imx28.dtsi | 35 +++- trunk/arch/arm/boot/dts/lpc32xx.dtsi | 74 +++----- trunk/arch/arm/boot/dts/phy3250.dts | 61 ------ trunk/arch/arm/configs/lpc32xx_defconfig | 24 +-- trunk/arch/arm/mach-lpc32xx/Kconfig | 32 ++++ trunk/arch/arm/mach-lpc32xx/Makefile.boot | 1 - trunk/arch/arm/mach-lpc32xx/clock.c | 21 +-- .../arch/arm/mach-lpc32xx/include/mach/gpio.h | 2 + trunk/arch/arm/mach-lpc32xx/phy3250.c | 158 +++++++++------- trunk/arch/arm/mach-lpc32xx/serial.c | 90 ++++++++- trunk/arch/arm/mach-nomadik/Makefile | 2 + trunk/arch/arm/mach-nomadik/board-nhk8815.c | 67 ++----- trunk/arch/arm/mach-nomadik/clock.c | 75 ++++++++ trunk/arch/arm/mach-nomadik/clock.h | 15 ++ trunk/arch/arm/mach-nomadik/cpu-8815.c | 126 ++++++++----- trunk/arch/arm/mach-nomadik/i2c-8815nhk.c | 38 +--- .../arch/arm/mach-nomadik/include/mach/irqs.h | 85 ++++----- trunk/drivers/clk/Makefile | 1 - trunk/drivers/clk/clk-nomadik.c | 47 ----- .../include/linux/platform_data/clk-nomadik.h | 2 - 24 files changed, 509 insertions(+), 633 deletions(-) delete mode 100644 trunk/arch/arm/boot/dts/ea3250.dts create mode 100644 trunk/arch/arm/mach-lpc32xx/Kconfig create mode 100644 trunk/arch/arm/mach-nomadik/clock.c create mode 100644 trunk/arch/arm/mach-nomadik/clock.h delete mode 100644 trunk/drivers/clk/clk-nomadik.c delete mode 100644 trunk/include/linux/platform_data/clk-nomadik.h diff --git a/[refs] b/[refs] index ebca79335ab5..bc42d18f2e32 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 94a2597c01a4bd495789e1546374c26b19f6eafd +refs/heads/master: 7a8e5149efd4e20e329beec47e3bb57ce2c5938a diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index 8b0b743b4fb1..a91009c61870 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -913,7 +913,7 @@ config ARCH_NOMADIK select ARM_AMBA select ARM_VIC select CPU_ARM926T - select COMMON_CLK + select CLKDEV_LOOKUP select GENERIC_CLOCKEVENTS select PINCTRL select MIGHT_HAVE_CACHE_L2X0 @@ -1021,6 +1021,8 @@ source "arch/arm/mach-kirkwood/Kconfig" source "arch/arm/mach-ks8695/Kconfig" +source "arch/arm/mach-lpc32xx/Kconfig" + source "arch/arm/mach-msm/Kconfig" source "arch/arm/mach-mv78xx0/Kconfig" diff --git a/trunk/arch/arm/boot/dts/ea3250.dts b/trunk/arch/arm/boot/dts/ea3250.dts deleted file mode 100644 index d79b28d9c963..000000000000 --- a/trunk/arch/arm/boot/dts/ea3250.dts +++ /dev/null @@ -1,174 +0,0 @@ -/* - * Embedded Artists LPC3250 board - * - * Copyright 2012 Roland Stigge - * - * The code contained herein is licensed under the GNU General Public - * License. You may obtain a copy of the GNU General Public License - * Version 2 or later at the following locations: - * - * http://www.opensource.org/licenses/gpl-license.html - * http://www.gnu.org/copyleft/gpl.html - */ - -/dts-v1/; -/include/ "lpc32xx.dtsi" - -/ { - model = "Embedded Artists LPC3250 board based on NXP LPC3250"; - compatible = "ea,ea3250", "nxp,lpc3250"; - #address-cells = <1>; - #size-cells = <1>; - - memory { - device_type = "memory"; - reg = <0 0x4000000>; - }; - - ahb { - mac: ethernet@31060000 { - phy-mode = "rmii"; - use-iram; - }; - - /* Here, choose exactly one from: ohci, usbd */ - ohci@31020000 { - transceiver = <&isp1301>; - status = "okay"; - }; - -/* - usbd@31020000 { - transceiver = <&isp1301>; - status = "okay"; - }; -*/ - - /* 128MB Flash via SLC NAND controller */ - slc: flash@20020000 { - status = "okay"; - #address-cells = <1>; - #size-cells = <1>; - - nxp,wdr-clks = <14>; - nxp,wwidth = <260000000>; - nxp,whold = <104000000>; - nxp,wsetup = <200000000>; - nxp,rdr-clks = <14>; - nxp,rwidth = <34666666>; - nxp,rhold = <104000000>; - nxp,rsetup = <200000000>; - nand-on-flash-bbt; - gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */ - - mtd0@00000000 { - label = "ea3250-boot"; - reg = <0x00000000 0x00080000>; - read-only; - }; - - mtd1@00080000 { - label = "ea3250-uboot"; - reg = <0x00080000 0x000c0000>; - read-only; - }; - - mtd2@00140000 { - label = "ea3250-kernel"; - reg = <0x00140000 0x00400000>; - }; - - mtd3@00540000 { - label = "ea3250-rootfs"; - reg = <0x00540000 0x07ac0000>; - }; - }; - - apb { - uart5: serial@40090000 { - status = "okay"; - }; - - uart3: serial@40080000 { - status = "okay"; - }; - - uart6: serial@40098000 { - status = "okay"; - }; - - i2c1: i2c@400A0000 { - clock-frequency = <100000>; - - eeprom@50 { - compatible = "at,24c256"; - reg = <0x50>; - }; - - eeprom@57 { - compatible = "at,24c64"; - reg = <0x57>; - }; - - uda1380: uda1380@18 { - compatible = "nxp,uda1380"; - reg = <0x18>; - power-gpio = <&gpio 0x59 0>; - reset-gpio = <&gpio 0x51 0>; - dac-clk = "wspll"; - }; - - pca9532: pca9532@60 { - compatible = "nxp,pca9532"; - gpio-controller; - #gpio-cells = <2>; - reg = <0x60>; - }; - }; - - i2c2: i2c@400A8000 { - clock-frequency = <100000>; - }; - - i2cusb: i2c@31020300 { - clock-frequency = <100000>; - - isp1301: usb-transceiver@2d { - compatible = "nxp,isp1301"; - reg = <0x2d>; - }; - }; - - sd@20098000 { - wp-gpios = <&pca9532 5 0>; - cd-gpios = <&pca9532 4 0>; - cd-inverted; - bus-width = <4>; - status = "okay"; - }; - }; - - fab { - uart1: serial@40014000 { - status = "okay"; - }; - - /* 3-axis accelerometer X,Y,Z (or AD-IN instead of Z) */ - adc@40048000 { - status = "okay"; - }; - }; - }; - - gpio_keys { - compatible = "gpio-keys"; - #address-cells = <1>; - #size-cells = <0>; - autorepeat; - button@21 { - label = "GPIO Key UP"; - linux,code = <103>; - gpios = <&gpio 4 1 0>; /* GPI_P3 1 */ - }; - }; -}; diff --git a/trunk/arch/arm/boot/dts/imx28-evk.dts b/trunk/arch/arm/boot/dts/imx28-evk.dts index ee520a529cb4..e53cf6716b9e 100644 --- a/trunk/arch/arm/boot/dts/imx28-evk.dts +++ b/trunk/arch/arm/boot/dts/imx28-evk.dts @@ -22,6 +22,12 @@ apb@80000000 { apbh@80000000 { + gpmi-nand@8000c000 { + pinctrl-names = "default"; + pinctrl-0 = <&gpmi_pins_a &gpmi_status_cfg>; + status = "okay"; + }; + ssp0: ssp@80010000 { compatible = "fsl,imx28-mmc"; pinctrl-names = "default"; diff --git a/trunk/arch/arm/boot/dts/imx28.dtsi b/trunk/arch/arm/boot/dts/imx28.dtsi index 4634cb861a59..a89da5ac71f7 100644 --- a/trunk/arch/arm/boot/dts/imx28.dtsi +++ b/trunk/arch/arm/boot/dts/imx28.dtsi @@ -68,15 +68,15 @@ status = "disabled"; }; - bch@8000a000 { - reg = <0x8000a000 2000>; - interrupts = <41>; - status = "disabled"; - }; - - gpmi@8000c000 { - reg = <0x8000c000 2000>; - interrupts = <42 88>; + gpmi-nand@8000c000 { + compatible = "fsl,imx28-gpmi-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x8000c000 2000>, <0x8000a000 2000>; + reg-names = "gpmi-nand", "bch"; + interrupts = <88>, <41>; + interrupt-names = "gpmi-dma", "bch"; + fsl,gpmi-dma-channel = <4>; status = "disabled"; }; @@ -167,6 +167,23 @@ fsl,pull-up = <0>; }; + gpmi_pins_a: gpmi-nand@0 { + reg = <0>; + fsl,pinmux-ids = <0x0000 0x0010 0x0020 + 0x0030 0x0040 0x0050 0x0060 + 0x0070 0x0100 0x0110 0x0140 + 0x0150 0x0180 0x0190 0x01a0 + 0x01b0 0x01c0>; + fsl,drive-strength = <0>; + fsl,voltage = <1>; + fsl,pull-up = <0>; + }; + + gpmi_status_cfg: gpmi-status-cfg { + fsl,pinmux-ids = <0x0180 0x0190 0x01c0>; + fsl,drive-strength = <2>; + }; + mac0_pins_a: mac0@0 { reg = <0>; fsl,pinmux-ids = <0x4000 0x4010 0x4020 diff --git a/trunk/arch/arm/boot/dts/lpc32xx.dtsi b/trunk/arch/arm/boot/dts/lpc32xx.dtsi index c5f37fbd33e6..3f5dad801a98 100644 --- a/trunk/arch/arm/boot/dts/lpc32xx.dtsi +++ b/trunk/arch/arm/boot/dts/lpc32xx.dtsi @@ -35,14 +35,13 @@ slc: flash@20020000 { compatible = "nxp,lpc3220-slc"; reg = <0x20020000 0x1000>; - status = "disabled"; + status = "disable"; }; - mlc: flash@200a8000 { + mlc: flash@200B0000 { compatible = "nxp,lpc3220-mlc"; - reg = <0x200a8000 0x11000>; - interrupts = <11 0>; - status = "disabled"; + reg = <0x200B0000 0x1000>; + status = "disable"; }; dma@31000000 { @@ -58,21 +57,21 @@ compatible = "nxp,ohci-nxp", "usb-ohci"; reg = <0x31020000 0x300>; interrupts = <0x3b 0>; - status = "disabled"; + status = "disable"; }; usbd@31020000 { compatible = "nxp,lpc3220-udc"; reg = <0x31020000 0x300>; interrupts = <0x3d 0>, <0x3e 0>, <0x3c 0>, <0x3a 0>; - status = "disabled"; + status = "disable"; }; clcd@31040000 { compatible = "arm,pl110", "arm,primecell"; reg = <0x31040000 0x1000>; interrupts = <0x0e 0>; - status = "disabled"; + status = "disable"; }; mac: ethernet@31060000 { @@ -115,10 +114,9 @@ }; sd@20098000 { - compatible = "arm,pl18x", "arm,primecell"; + compatible = "arm,pl180", "arm,primecell"; reg = <0x20098000 0x1000>; interrupts = <0x0f 0>, <0x0d 0>; - status = "disabled"; }; i2s1: i2s@2009C000 { @@ -126,42 +124,24 @@ reg = <0x2009C000 0x1000>; }; - /* UART5 first since it is the default console, ttyS0 */ - uart5: serial@40090000 { - /* actually, ns16550a w/ 64 byte fifos! */ - compatible = "nxp,lpc3220-uart"; - reg = <0x40090000 0x1000>; - interrupts = <9 0>; - clock-frequency = <13000000>; - reg-shift = <2>; - status = "disabled"; - }; - uart3: serial@40080000 { - compatible = "nxp,lpc3220-uart"; + compatible = "nxp,serial"; reg = <0x40080000 0x1000>; - interrupts = <7 0>; - clock-frequency = <13000000>; - reg-shift = <2>; - status = "disabled"; }; uart4: serial@40088000 { - compatible = "nxp,lpc3220-uart"; + compatible = "nxp,serial"; reg = <0x40088000 0x1000>; - interrupts = <8 0>; - clock-frequency = <13000000>; - reg-shift = <2>; - status = "disabled"; + }; + + uart5: serial@40090000 { + compatible = "nxp,serial"; + reg = <0x40090000 0x1000>; }; uart6: serial@40098000 { - compatible = "nxp,lpc3220-uart"; + compatible = "nxp,serial"; reg = <0x40098000 0x1000>; - interrupts = <10 0>; - clock-frequency = <13000000>; - reg-shift = <2>; - status = "disabled"; }; i2c1: i2c@400A0000 { @@ -212,24 +192,18 @@ }; uart1: serial@40014000 { - compatible = "nxp,lpc3220-hsuart"; + compatible = "nxp,serial"; reg = <0x40014000 0x1000>; - interrupts = <26 0>; - status = "disabled"; }; uart2: serial@40018000 { - compatible = "nxp,lpc3220-hsuart"; + compatible = "nxp,serial"; reg = <0x40018000 0x1000>; - interrupts = <25 0>; - status = "disabled"; }; - uart7: serial@4001c000 { - compatible = "nxp,lpc3220-hsuart"; - reg = <0x4001c000 0x1000>; - interrupts = <24 0>; - status = "disabled"; + uart7: serial@4001C000 { + compatible = "nxp,serial"; + reg = <0x4001C000 0x1000>; }; rtc@40024000 { @@ -261,21 +235,19 @@ compatible = "nxp,lpc3220-adc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; - status = "disabled"; + status = "disable"; }; tsc@40048000 { compatible = "nxp,lpc3220-tsc"; reg = <0x40048000 0x1000>; interrupts = <0x27 0>; - status = "disabled"; + status = "disable"; }; key@40050000 { compatible = "nxp,lpc3220-key"; reg = <0x40050000 0x1000>; - interrupts = <54 0>; - status = "disabled"; }; }; diff --git a/trunk/arch/arm/boot/dts/phy3250.dts b/trunk/arch/arm/boot/dts/phy3250.dts index 802ec5b2fd00..c4ff6d1a018b 100644 --- a/trunk/arch/arm/boot/dts/phy3250.dts +++ b/trunk/arch/arm/boot/dts/phy3250.dts @@ -54,17 +54,6 @@ #address-cells = <1>; #size-cells = <1>; - nxp,wdr-clks = <14>; - nxp,wwidth = <40000000>; - nxp,whold = <100000000>; - nxp,wsetup = <100000000>; - nxp,rdr-clks = <14>; - nxp,rwidth = <40000000>; - nxp,rhold = <66666666>; - nxp,rsetup = <100000000>; - nand-on-flash-bbt; - gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */ - mtd0@00000000 { label = "phy3250-boot"; reg = <0x00000000 0x00064000>; @@ -94,14 +83,6 @@ }; apb { - uart5: serial@40090000 { - status = "okay"; - }; - - uart3: serial@40080000 { - status = "okay"; - }; - i2c1: i2c@400A0000 { clock-frequency = <100000>; @@ -133,58 +114,16 @@ }; ssp0: ssp@20084000 { - #address-cells = <1>; - #size-cells = <0>; - pl022,num-chipselects = <1>; - cs-gpios = <&gpio 3 5 0>; - eeprom: at25@0 { - pl022,hierarchy = <0>; - pl022,interface = <0>; - pl022,slave-tx-disable = <0>; - pl022,com-mode = <0>; - pl022,rx-level-trig = <1>; - pl022,tx-level-trig = <1>; - pl022,ctrl-len = <11>; - pl022,wait-state = <0>; - pl022,duplex = <0>; - - at25,byte-len = <0x8000>; - at25,addr-mode = <2>; - at25,page-size = <64>; - compatible = "atmel,at25"; - reg = <0>; - spi-max-frequency = <5000000>; }; }; - - sd@20098000 { - wp-gpios = <&gpio 3 0 0>; - cd-gpios = <&gpio 3 1 0>; - cd-inverted; - bus-width = <4>; - status = "okay"; - }; }; fab { - uart2: serial@40018000 { - status = "okay"; - }; - tsc@40048000 { status = "okay"; }; - - key@40050000 { - status = "okay"; - keypad,num-rows = <1>; - keypad,num-columns = <1>; - nxp,debounce-delay-ms = <3>; - nxp,scan-delay-ms = <34>; - linux,keymap = <0x00000002>; - }; }; }; diff --git a/trunk/arch/arm/configs/lpc32xx_defconfig b/trunk/arch/arm/configs/lpc32xx_defconfig index eceed186a3c1..4fa60547494a 100644 --- a/trunk/arch/arm/configs/lpc32xx_defconfig +++ b/trunk/arch/arm/configs/lpc32xx_defconfig @@ -1,7 +1,5 @@ CONFIG_EXPERIMENTAL=y CONFIG_SYSVIPC=y -CONFIG_NO_HZ=y -CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_LOG_BUF_SHIFT=16 @@ -18,6 +16,8 @@ CONFIG_MODULE_UNLOAD=y # CONFIG_BLK_DEV_BSG is not set CONFIG_PARTITION_ADVANCED=y CONFIG_ARCH_LPC32XX=y +CONFIG_NO_HZ=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_PREEMPT=y CONFIG_AEABI=y CONFIG_ZBOOT_ROM_TEXT=0x0 @@ -52,17 +52,13 @@ CONFIG_MTD=y CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_CHAR=y CONFIG_MTD_BLOCK=y -CONFIG_MTD_M25P80=y CONFIG_MTD_NAND=y CONFIG_MTD_NAND_MUSEUM_IDS=y -CONFIG_MTD_NAND_SLC_LPC32XX=y -CONFIG_MTD_NAND_MLC_LPC32XX=y CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_CRYPTOLOOP=y CONFIG_BLK_DEV_RAM=y CONFIG_BLK_DEV_RAM_COUNT=1 CONFIG_BLK_DEV_RAM_SIZE=16384 -CONFIG_EEPROM_AT24=y CONFIG_EEPROM_AT25=y CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y @@ -83,22 +79,16 @@ CONFIG_LPC_ENET=y # CONFIG_NET_VENDOR_STMICRO is not set CONFIG_SMSC_PHY=y # CONFIG_WLAN is not set -CONFIG_INPUT_MATRIXKMAP=y # CONFIG_INPUT_MOUSEDEV_PSAUX is not set CONFIG_INPUT_MOUSEDEV_SCREEN_X=240 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=320 CONFIG_INPUT_EVDEV=y -# CONFIG_KEYBOARD_ATKBD is not set -CONFIG_KEYBOARD_LPC32XX=y # CONFIG_INPUT_MOUSE is not set CONFIG_INPUT_TOUCHSCREEN=y CONFIG_TOUCHSCREEN_LPC32XX=y -CONFIG_SERIO_LIBPS2=y # CONFIG_LEGACY_PTYS is not set CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250_CONSOLE=y -CONFIG_SERIAL_HS_LPC32XX=y -CONFIG_SERIAL_OF_PLATFORM=y # CONFIG_HW_RANDOM is not set CONFIG_I2C=y CONFIG_I2C_CHARDEV=y @@ -106,8 +96,7 @@ CONFIG_I2C_PNX=y CONFIG_SPI=y CONFIG_SPI_PL022=y CONFIG_GPIO_SYSFS=y -CONFIG_SENSORS_DS620=y -CONFIG_SENSORS_MAX6639=y +# CONFIG_HWMON is not set CONFIG_WATCHDOG=y CONFIG_PNX4008_WATCHDOG=y CONFIG_FB=y @@ -144,8 +133,6 @@ CONFIG_MMC=y CONFIG_MMC_ARMMMCI=y CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y -CONFIG_LEDS_PCA9532=y -CONFIG_LEDS_PCA9532_GPIO=y CONFIG_LEDS_GPIO=y CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y @@ -159,10 +146,10 @@ CONFIG_RTC_DRV_DS1374=y CONFIG_RTC_DRV_PCF8563=y CONFIG_RTC_DRV_LPC32XX=y CONFIG_DMADEVICES=y +CONFIG_AMBA_PL08X=y CONFIG_STAGING=y -CONFIG_LPC32XX_ADC=y -CONFIG_MAX517=y CONFIG_IIO=y +CONFIG_LPC32XX_ADC=y CONFIG_EXT2_FS=y CONFIG_AUTOFS4_FS=y CONFIG_MSDOS_FS=y @@ -172,6 +159,7 @@ CONFIG_JFFS2_FS=y CONFIG_JFFS2_FS_WBUF_VERIFY=y CONFIG_CRAMFS=y CONFIG_NFS_FS=y +CONFIG_NFS_V3=y CONFIG_ROOT_NFS=y CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y diff --git a/trunk/arch/arm/mach-lpc32xx/Kconfig b/trunk/arch/arm/mach-lpc32xx/Kconfig new file mode 100644 index 000000000000..e0b3eee83834 --- /dev/null +++ b/trunk/arch/arm/mach-lpc32xx/Kconfig @@ -0,0 +1,32 @@ +if ARCH_LPC32XX + +menu "Individual UART enable selections" + +config ARCH_LPC32XX_UART3_SELECT + bool "Add support for standard UART3" + help + Adds support for standard UART 3 when the 8250 serial support + is enabled. + +config ARCH_LPC32XX_UART4_SELECT + bool "Add support for standard UART4" + help + Adds support for standard UART 4 when the 8250 serial support + is enabled. + +config ARCH_LPC32XX_UART5_SELECT + bool "Add support for standard UART5" + default y + help + Adds support for standard UART 5 when the 8250 serial support + is enabled. + +config ARCH_LPC32XX_UART6_SELECT + bool "Add support for standard UART6" + help + Adds support for standard UART 6 when the 8250 serial support + is enabled. + +endmenu + +endif diff --git a/trunk/arch/arm/mach-lpc32xx/Makefile.boot b/trunk/arch/arm/mach-lpc32xx/Makefile.boot index 697323b5f92d..2cfe0ee635c5 100644 --- a/trunk/arch/arm/mach-lpc32xx/Makefile.boot +++ b/trunk/arch/arm/mach-lpc32xx/Makefile.boot @@ -2,4 +2,3 @@ params_phys-y := 0x80000100 initrd_phys-y := 0x82000000 -dtb-$(CONFIG_ARCH_LPC32XX) += ea3250.dtb phy3250.dtb diff --git a/trunk/arch/arm/mach-lpc32xx/clock.c b/trunk/arch/arm/mach-lpc32xx/clock.c index e8d315e6db09..f6a3ffec1f4b 100644 --- a/trunk/arch/arm/mach-lpc32xx/clock.c +++ b/trunk/arch/arm/mach-lpc32xx/clock.c @@ -691,21 +691,10 @@ static struct clk clk_nand = { .parent = &clk_hclk, .enable = local_onoff_enable, .enable_reg = LPC32XX_CLKPWR_NAND_CLK_CTRL, - .enable_mask = LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN | - LPC32XX_CLKPWR_NANDCLK_SEL_SLC, + .enable_mask = LPC32XX_CLKPWR_NANDCLK_SLCCLK_EN, .get_rate = local_return_parent_rate, }; -static struct clk clk_nand_mlc = { - .parent = &clk_hclk, - .enable = local_onoff_enable, - .enable_reg = LPC32XX_CLKPWR_NAND_CLK_CTRL, - .enable_mask = LPC32XX_CLKPWR_NANDCLK_MLCCLK_EN | - LPC32XX_CLKPWR_NANDCLK_DMA_INT | - LPC32XX_CLKPWR_NANDCLK_INTSEL_MLC, - .get_rate = local_return_parent_rate, -}; - static struct clk clk_i2s0 = { .parent = &clk_hclk, .enable = local_onoff_enable, @@ -718,8 +707,7 @@ static struct clk clk_i2s1 = { .parent = &clk_hclk, .enable = local_onoff_enable, .enable_reg = LPC32XX_CLKPWR_I2S_CLK_CTRL, - .enable_mask = LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN | - LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA, + .enable_mask = LPC32XX_CLKPWR_I2SCTRL_I2SCLK1_EN, .get_rate = local_return_parent_rate, }; @@ -1132,9 +1120,8 @@ static struct clk_lookup lookups[] = { CLKDEV_INIT("31020300.i2c", NULL, &clk_i2c2), CLKDEV_INIT("dev:ssp0", NULL, &clk_ssp0), CLKDEV_INIT("dev:ssp1", NULL, &clk_ssp1), - CLKDEV_INIT("40050000.key", NULL, &clk_kscan), - CLKDEV_INIT("20020000.flash", NULL, &clk_nand), - CLKDEV_INIT("200a8000.flash", NULL, &clk_nand_mlc), + CLKDEV_INIT("lpc32xx_keys.0", NULL, &clk_kscan), + CLKDEV_INIT("lpc32xx-nand.0", "nand_ck", &clk_nand), CLKDEV_INIT("40048000.adc", NULL, &clk_adc), CLKDEV_INIT(NULL, "i2s0_ck", &clk_i2s0), CLKDEV_INIT(NULL, "i2s1_ck", &clk_i2s1), diff --git a/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h b/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h index 0052e7a76179..2ba6ca412bef 100644 --- a/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h +++ b/trunk/arch/arm/mach-lpc32xx/include/mach/gpio.h @@ -3,4 +3,6 @@ #include "gpio-lpc32xx.h" +#define ARCH_NR_GPIOS (LPC32XX_GPO_P3_GRP + LPC32XX_GPO_P3_MAX) + #endif /* __MACH_GPIO_H */ diff --git a/trunk/arch/arm/mach-lpc32xx/phy3250.c b/trunk/arch/arm/mach-lpc32xx/phy3250.c index c1aabfcbde49..540106cdb9ec 100644 --- a/trunk/arch/arm/mach-lpc32xx/phy3250.c +++ b/trunk/arch/arm/mach-lpc32xx/phy3250.c @@ -30,13 +30,12 @@ #include #include #include -#include -#include #include #include #include #include #include +#include #include #include @@ -51,12 +50,9 @@ /* * Mapped GPIOLIB GPIOs */ -#define SPI0_CS_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) -#define LCD_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0) -#define BKL_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4) -#define MMC_PWR_ENABLE_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 5) -#define MMC_CD_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 1) -#define MMC_WP_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 0) +#define SPI0_CS_GPIO LPC32XX_GPIO(LPC32XX_GPIO_P3_GRP, 5) +#define LCD_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 0) +#define BKL_POWER_GPIO LPC32XX_GPIO(LPC32XX_GPO_P3_GRP, 4) /* * AMBA LCD controller @@ -162,6 +158,24 @@ static struct clcd_board lpc32xx_clcd_data = { /* * AMBA SSP (SPI) */ +static void phy3250_spi_cs_set(u32 control) +{ + gpio_set_value(SPI0_CS_GPIO, (int) control); +} + +static struct pl022_config_chip spi0_chip_info = { + .com_mode = INTERRUPT_TRANSFER, + .iface = SSP_INTERFACE_MOTOROLA_SPI, + .hierarchy = SSP_MASTER, + .slave_tx_disable = 0, + .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, + .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, + .ctrl_len = SSP_BITS_8, + .wait_state = SSP_MWIRE_WAIT_ZERO, + .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, + .cs_control = phy3250_spi_cs_set, +}; + static struct pl022_ssp_controller lpc32xx_ssp0_data = { .bus_id = 0, .num_chipselect = 1, @@ -174,57 +188,45 @@ static struct pl022_ssp_controller lpc32xx_ssp1_data = { .enable_dma = 0, }; -static struct pl08x_channel_data pl08x_slave_channels[] = { - { - .bus_id = "nand-slc", - .min_signal = 1, /* SLC NAND Flash */ - .max_signal = 1, - .periph_buses = PL08X_AHB1, - }, - { - .bus_id = "nand-mlc", - .min_signal = 12, /* MLC NAND Flash */ - .max_signal = 12, - .periph_buses = PL08X_AHB1, - }, -}; - -/* NOTE: These will change, according to RMK */ -static int pl08x_get_signal(struct pl08x_dma_chan *ch) -{ - return ch->cd->min_signal; -} - -static void pl08x_put_signal(struct pl08x_dma_chan *ch) +/* AT25 driver registration */ +static int __init phy3250_spi_board_register(void) { +#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE) + static struct spi_board_info info[] = { + { + .modalias = "spidev", + .max_speed_hz = 5000000, + .bus_num = 0, + .chip_select = 0, + .controller_data = &spi0_chip_info, + }, + }; + +#else + static struct spi_eeprom eeprom = { + .name = "at25256a", + .byte_len = 0x8000, + .page_size = 64, + .flags = EE_ADDR2, + }; + + static struct spi_board_info info[] = { + { + .modalias = "at25", + .max_speed_hz = 5000000, + .bus_num = 0, + .chip_select = 0, + .mode = SPI_MODE_0, + .platform_data = &eeprom, + .controller_data = &spi0_chip_info, + }, + }; +#endif + return spi_register_board_info(info, ARRAY_SIZE(info)); } +arch_initcall(phy3250_spi_board_register); static struct pl08x_platform_data pl08x_pd = { - .slave_channels = &pl08x_slave_channels[0], - .num_slave_channels = ARRAY_SIZE(pl08x_slave_channels), - .get_signal = pl08x_get_signal, - .put_signal = pl08x_put_signal, - .lli_buses = PL08X_AHB1, - .mem_buses = PL08X_AHB1, -}; - -static int mmc_handle_ios(struct device *dev, struct mmc_ios *ios) -{ - /* Only on and off are supported */ - if (ios->power_mode == MMC_POWER_OFF) - gpio_set_value(MMC_PWR_ENABLE_GPIO, 0); - else - gpio_set_value(MMC_PWR_ENABLE_GPIO, 1); - return 0; -} - -static struct mmci_platform_data lpc32xx_mmci_data = { - .ocr_mask = MMC_VDD_30_31 | MMC_VDD_31_32 | - MMC_VDD_32_33 | MMC_VDD_33_34, - .ios_handler = mmc_handle_ios, - .dma_filter = NULL, - /* No DMA for now since AMBA PL080 dmaengine driver only does scatter - * gather, and the MMCI driver doesn't do it this way */ }; static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { @@ -232,8 +234,6 @@ static const struct of_dev_auxdata lpc32xx_auxdata_lookup[] __initconst = { OF_DEV_AUXDATA("arm,pl022", 0x2008C000, "dev:ssp1", &lpc32xx_ssp1_data), OF_DEV_AUXDATA("arm,pl110", 0x31040000, "dev:clcd", &lpc32xx_clcd_data), OF_DEV_AUXDATA("arm,pl080", 0x31000000, "pl08xdmac", &pl08x_pd), - OF_DEV_AUXDATA("arm,pl18x", 0x20098000, "20098000.sd", - &lpc32xx_mmci_data), { } }; @@ -241,6 +241,10 @@ static void __init lpc3250_machine_init(void) { u32 tmp; + /* Setup SLC NAND controller muxing */ + __raw_writel(LPC32XX_CLKPWR_NANDCLK_SEL_SLC, + LPC32XX_CLKPWR_NAND_CLK_CTRL); + /* Setup LCD muxing to RGB565 */ tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL) & ~(LPC32XX_CLKPWR_LCDCTRL_LCDTYPE_MSK | @@ -260,12 +264,34 @@ static void __init lpc3250_machine_init(void) LPC32XX_CLKPWR_I2CCLK_I2C2HI_DRIVE; __raw_writel(tmp, LPC32XX_CLKPWR_I2C_CLK_CTRL); + /* Disable IrDA pulsing support on UART6 */ + tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); + tmp |= LPC32XX_UART_UART6_IRDAMOD_BYPASS; + __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); + + /* Enable DMA for I2S1 channel */ + tmp = __raw_readl(LPC32XX_CLKPWR_I2S_CLK_CTRL); + tmp = LPC32XX_CLKPWR_I2SCTRL_I2S1_USE_DMA; + __raw_writel(tmp, LPC32XX_CLKPWR_I2S_CLK_CTRL); + lpc32xx_serial_init(); - tmp = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); - tmp |= LPC32XX_CLKPWR_MSCARD_SDCARD_EN | - LPC32XX_CLKPWR_MSCARD_MSDIO_PU_EN; - __raw_writel(tmp, LPC32XX_CLKPWR_MS_CTRL); + /* + * AMBA peripheral clocks need to be enabled prior to AMBA device + * detection or a data fault will occur, so enable the clocks + * here. + */ + tmp = __raw_readl(LPC32XX_CLKPWR_LCDCLK_CTRL); + __raw_writel((tmp | LPC32XX_CLKPWR_LCDCTRL_CLK_EN), + LPC32XX_CLKPWR_LCDCLK_CTRL); + + tmp = __raw_readl(LPC32XX_CLKPWR_SSP_CLK_CTRL); + __raw_writel((tmp | LPC32XX_CLKPWR_SSPCTRL_SSPCLK0_EN), + LPC32XX_CLKPWR_SSP_CLK_CTRL); + + tmp = __raw_readl(LPC32XX_CLKPWR_DMA_CLK_CTRL); + __raw_writel((tmp | LPC32XX_CLKPWR_DMACLKCTRL_CLK_EN), + LPC32XX_CLKPWR_DMA_CLK_CTRL); /* Test clock needed for UDA1380 initial init */ __raw_writel(LPC32XX_CLKPWR_TESTCLK2_SEL_MOSC | @@ -276,10 +302,12 @@ static void __init lpc3250_machine_init(void) lpc32xx_auxdata_lookup, NULL); /* Register GPIOs used on this board */ - if (gpio_request(MMC_PWR_ENABLE_GPIO, "mmc_power_en")) - pr_err("Error requesting gpio %u", MMC_PWR_ENABLE_GPIO); - else if (gpio_direction_output(MMC_PWR_ENABLE_GPIO, 1)) - pr_err("Error setting gpio %u to output", MMC_PWR_ENABLE_GPIO); + if (gpio_request(SPI0_CS_GPIO, "spi0 cs")) + printk(KERN_ERR "Error requesting gpio %u", + SPI0_CS_GPIO); + else if (gpio_direction_output(SPI0_CS_GPIO, 1)) + printk(KERN_ERR "Error setting gpio %u to output", + SPI0_CS_GPIO); } static char const *lpc32xx_dt_compat[] __initdata = { diff --git a/trunk/arch/arm/mach-lpc32xx/serial.c b/trunk/arch/arm/mach-lpc32xx/serial.c index 05621a29fba2..f2735281616a 100644 --- a/trunk/arch/arm/mach-lpc32xx/serial.c +++ b/trunk/arch/arm/mach-lpc32xx/serial.c @@ -31,6 +31,59 @@ #define LPC32XX_SUART_FIFO_SIZE 64 +/* Standard 8250/16550 compatible serial ports */ +static struct plat_serial8250_port serial_std_platform_data[] = { +#ifdef CONFIG_ARCH_LPC32XX_UART5_SELECT + { + .membase = io_p2v(LPC32XX_UART5_BASE), + .mapbase = LPC32XX_UART5_BASE, + .irq = IRQ_LPC32XX_UART_IIR5, + .uartclk = LPC32XX_MAIN_OSC_FREQ, + .regshift = 2, + .iotype = UPIO_MEM32, + .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | + UPF_SKIP_TEST, + }, +#endif +#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT + { + .membase = io_p2v(LPC32XX_UART3_BASE), + .mapbase = LPC32XX_UART3_BASE, + .irq = IRQ_LPC32XX_UART_IIR3, + .uartclk = LPC32XX_MAIN_OSC_FREQ, + .regshift = 2, + .iotype = UPIO_MEM32, + .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | + UPF_SKIP_TEST, + }, +#endif +#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT + { + .membase = io_p2v(LPC32XX_UART4_BASE), + .mapbase = LPC32XX_UART4_BASE, + .irq = IRQ_LPC32XX_UART_IIR4, + .uartclk = LPC32XX_MAIN_OSC_FREQ, + .regshift = 2, + .iotype = UPIO_MEM32, + .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | + UPF_SKIP_TEST, + }, +#endif +#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT + { + .membase = io_p2v(LPC32XX_UART6_BASE), + .mapbase = LPC32XX_UART6_BASE, + .irq = IRQ_LPC32XX_UART_IIR6, + .uartclk = LPC32XX_MAIN_OSC_FREQ, + .regshift = 2, + .iotype = UPIO_MEM32, + .flags = UPF_BOOT_AUTOCONF | UPF_BUGGY_UART | + UPF_SKIP_TEST, + }, +#endif + { }, +}; + struct uartinit { char *uart_ck_name; u32 ck_mode_mask; @@ -39,6 +92,7 @@ struct uartinit { }; static struct uartinit uartinit_data[] __initdata = { +#ifdef CONFIG_ARCH_LPC32XX_UART5_SELECT { .uart_ck_name = "uart5_ck", .ck_mode_mask = @@ -46,6 +100,8 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL, .mapbase = LPC32XX_UART5_BASE, }, +#endif +#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT { .uart_ck_name = "uart3_ck", .ck_mode_mask = @@ -53,6 +109,8 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL, .mapbase = LPC32XX_UART3_BASE, }, +#endif +#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT { .uart_ck_name = "uart4_ck", .ck_mode_mask = @@ -60,6 +118,8 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL, .mapbase = LPC32XX_UART4_BASE, }, +#endif +#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT { .uart_ck_name = "uart6_ck", .ck_mode_mask = @@ -67,6 +127,19 @@ static struct uartinit uartinit_data[] __initdata = { .pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL, .mapbase = LPC32XX_UART6_BASE, }, +#endif +}; + +static struct platform_device serial_std_platform_device = { + .name = "serial8250", + .id = 0, + .dev = { + .platform_data = serial_std_platform_data, + }, +}; + +static struct platform_device *lpc32xx_serial_devs[] __initdata = { + &serial_std_platform_device, }; void __init lpc32xx_serial_init(void) @@ -83,8 +156,15 @@ void __init lpc32xx_serial_init(void) clk = clk_get(NULL, uartinit_data[i].uart_ck_name); if (!IS_ERR(clk)) { clk_enable(clk); + serial_std_platform_data[i].uartclk = + clk_get_rate(clk); } + /* Fall back on main osc rate if clock rate return fails */ + if (serial_std_platform_data[i].uartclk == 0) + serial_std_platform_data[i].uartclk = + LPC32XX_MAIN_OSC_FREQ; + /* Setup UART clock modes for all UARTs, disable autoclock */ clkmodes |= uartinit_data[i].ck_mode_mask; @@ -109,7 +189,7 @@ void __init lpc32xx_serial_init(void) __raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE); for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) { /* Force a flush of the RX FIFOs to work around a HW bug */ - puart = uartinit_data[i].mapbase; + puart = serial_std_platform_data[i].mapbase; __raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart)); __raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart)); j = LPC32XX_SUART_FIFO_SIZE; @@ -118,13 +198,11 @@ void __init lpc32xx_serial_init(void) __raw_writel(0, LPC32XX_UART_IIR_FCR(puart)); } - /* Disable IrDA pulsing support on UART6 */ - tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); - tmp |= LPC32XX_UART_UART6_IRDAMOD_BYPASS; - __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); - /* Disable UART5->USB transparent mode or USB won't work */ tmp = __raw_readl(LPC32XX_UARTCTL_CTRL); tmp &= ~LPC32XX_UART_U5_ROUTE_TO_USB; __raw_writel(tmp, LPC32XX_UARTCTL_CTRL); + + platform_add_devices(lpc32xx_serial_devs, + ARRAY_SIZE(lpc32xx_serial_devs)); } diff --git a/trunk/arch/arm/mach-nomadik/Makefile b/trunk/arch/arm/mach-nomadik/Makefile index a42c9a33d3bf..a6bbd1a7b4e7 100644 --- a/trunk/arch/arm/mach-nomadik/Makefile +++ b/trunk/arch/arm/mach-nomadik/Makefile @@ -7,6 +7,8 @@ # Object file lists. +obj-y += clock.o + # Cpu revision obj-$(CONFIG_NOMADIK_8815) += cpu-8815.o diff --git a/trunk/arch/arm/mach-nomadik/board-nhk8815.c b/trunk/arch/arm/mach-nomadik/board-nhk8815.c index f4535a7dadf5..2e8d3e176bc7 100644 --- a/trunk/arch/arm/mach-nomadik/board-nhk8815.c +++ b/trunk/arch/arm/mach-nomadik/board-nhk8815.c @@ -14,14 +14,12 @@ #include #include #include -#include #include #include #include #include #include #include -#include #include #include #include @@ -187,28 +185,16 @@ static void __init nhk8815_onenand_init(void) #endif } -static struct mmci_platform_data mmcsd_plat_data = { - .ocr_mask = MMC_VDD_29_30, - .f_max = 48000000, - .gpio_wp = -1, - .gpio_cd = 111, - .cd_invert = true, - .capabilities = MMC_CAP_MMC_HIGHSPEED | - MMC_CAP_SD_HIGHSPEED | MMC_CAP_4_BIT_DATA, -}; +static AMBA_APB_DEVICE(uart0, "uart0", 0, NOMADIK_UART0_BASE, + { IRQ_UART0 }, NULL); -static int __init nhk8815_mmcsd_init(void) -{ - int ret; +static AMBA_APB_DEVICE(uart1, "uart1", 0, NOMADIK_UART1_BASE, + { IRQ_UART1 }, NULL); - ret = gpio_request(112, "card detect bias"); - if (ret) - return ret; - gpio_direction_output(112, 0); - amba_apb_device_add(NULL, "mmci", NOMADIK_SDI_BASE, SZ_4K, IRQ_SDMMC, 0, &mmcsd_plat_data, 0x10180180); - return 0; -} -module_init(nhk8815_mmcsd_init); +static struct amba_device *amba_devs[] __initdata = { + &uart0_device, + &uart1_device, +}; static struct resource nhk8815_eth_resources[] = { { @@ -267,46 +253,17 @@ static struct sys_timer nomadik_timer = { .init = nomadik_timer_init, }; -static struct i2c_board_info __initdata nhk8815_i2c0_devices[] = { - { - I2C_BOARD_INFO("stw4811", 0x2d), - }, -}; - -static struct i2c_board_info __initdata nhk8815_i2c1_devices[] = { - { - I2C_BOARD_INFO("camera", 0x10), - }, - { - I2C_BOARD_INFO("stw5095", 0x1a), - }, - { - I2C_BOARD_INFO("lis3lv02dl", 0x1d), - }, -}; - -static struct i2c_board_info __initdata nhk8815_i2c2_devices[] = { - { - I2C_BOARD_INFO("stw4811-usb", 0x2d), - }, -}; - static void __init nhk8815_platform_init(void) { + int i; + cpu8815_platform_init(); nhk8815_onenand_init(); platform_add_devices(nhk8815_platform_devices, ARRAY_SIZE(nhk8815_platform_devices)); - amba_apb_device_add(NULL, "uart0", NOMADIK_UART0_BASE, SZ_4K, IRQ_UART0, 0, NULL, 0); - amba_apb_device_add(NULL, "uart1", NOMADIK_UART1_BASE, SZ_4K, IRQ_UART1, 0, NULL, 0); - - i2c_register_board_info(0, nhk8815_i2c0_devices, - ARRAY_SIZE(nhk8815_i2c0_devices)); - i2c_register_board_info(1, nhk8815_i2c1_devices, - ARRAY_SIZE(nhk8815_i2c1_devices)); - i2c_register_board_info(2, nhk8815_i2c2_devices, - ARRAY_SIZE(nhk8815_i2c2_devices)); + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) + amba_device_register(amba_devs[i], &iomem_resource); } MACHINE_START(NOMADIK, "NHK8815") diff --git a/trunk/arch/arm/mach-nomadik/clock.c b/trunk/arch/arm/mach-nomadik/clock.c new file mode 100644 index 000000000000..48a59f24e10c --- /dev/null +++ b/trunk/arch/arm/mach-nomadik/clock.c @@ -0,0 +1,75 @@ +/* + * linux/arch/arm/mach-nomadik/clock.c + * + * Copyright (C) 2009 Alessandro Rubini + */ +#include +#include +#include +#include +#include +#include "clock.h" + +/* + * The nomadik board uses generic clocks, but the serial pl011 file + * calls clk_enable(), clk_disable(), clk_get_rate(), so we provide them + */ +unsigned long clk_get_rate(struct clk *clk) +{ + return clk->rate; +} +EXPORT_SYMBOL(clk_get_rate); + +/* enable and disable do nothing */ +int clk_enable(struct clk *clk) +{ + return 0; +} +EXPORT_SYMBOL(clk_enable); + +void clk_disable(struct clk *clk) +{ +} +EXPORT_SYMBOL(clk_disable); + +static struct clk clk_24 = { + .rate = 2400000, +}; + +static struct clk clk_48 = { + .rate = 48 * 1000 * 1000, +}; + +/* + * Catch-all default clock to satisfy drivers using the clk API. We don't + * model the actual hardware clocks yet. + */ +static struct clk clk_default; + +#define CLK(_clk, dev) \ + { \ + .clk = _clk, \ + .dev_id = dev, \ + } + +static struct clk_lookup lookups[] = { + { + .con_id = "apb_pclk", + .clk = &clk_default, + }, + CLK(&clk_24, "mtu0"), + CLK(&clk_24, "mtu1"), + CLK(&clk_48, "uart0"), + CLK(&clk_48, "uart1"), + CLK(&clk_default, "gpio.0"), + CLK(&clk_default, "gpio.1"), + CLK(&clk_default, "gpio.2"), + CLK(&clk_default, "gpio.3"), + CLK(&clk_default, "rng"), +}; + +int __init clk_init(void) +{ + clkdev_add_table(lookups, ARRAY_SIZE(lookups)); + return 0; +} diff --git a/trunk/arch/arm/mach-nomadik/clock.h b/trunk/arch/arm/mach-nomadik/clock.h new file mode 100644 index 000000000000..78da2e7c3985 --- /dev/null +++ b/trunk/arch/arm/mach-nomadik/clock.h @@ -0,0 +1,15 @@ + +/* + * linux/arch/arm/mach-nomadik/clock.h + * + * Copyright (C) 2009 Alessandro Rubini + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +struct clk { + unsigned long rate; +}; + +int __init clk_init(void); diff --git a/trunk/arch/arm/mach-nomadik/cpu-8815.c b/trunk/arch/arm/mach-nomadik/cpu-8815.c index 6fd8e46567a4..27f43a46985e 100644 --- a/trunk/arch/arm/mach-nomadik/cpu-8815.c +++ b/trunk/arch/arm/mach-nomadik/cpu-8815.c @@ -22,10 +22,6 @@ #include #include #include -#include -#include -#include -#include #include #include @@ -36,63 +32,91 @@ #include #include +#include "clock.h" #include "cpu-8815.h" +#define __MEM_4K_RESOURCE(x) \ + .res = {.start = (x), .end = (x) + SZ_4K - 1, .flags = IORESOURCE_MEM} + /* The 8815 has 4 GPIO blocks, let's register them immediately */ -static resource_size_t __initdata cpu8815_gpio_base[] = { - NOMADIK_GPIO0_BASE, - NOMADIK_GPIO1_BASE, - NOMADIK_GPIO2_BASE, - NOMADIK_GPIO3_BASE, + +#define GPIO_RESOURCE(block) \ + { \ + .start = NOMADIK_GPIO##block##_BASE, \ + .end = NOMADIK_GPIO##block##_BASE + SZ_4K - 1, \ + .flags = IORESOURCE_MEM, \ + }, \ + { \ + .start = IRQ_GPIO##block, \ + .end = IRQ_GPIO##block, \ + .flags = IORESOURCE_IRQ, \ + } + +#define GPIO_DEVICE(block) \ + { \ + .name = "gpio", \ + .id = block, \ + .num_resources = 2, \ + .resource = &cpu8815_gpio_resources[block * 2], \ + .dev = { \ + .platform_data = &cpu8815_gpio[block], \ + }, \ + } + +static struct nmk_gpio_platform_data cpu8815_gpio[] = { + { + .name = "GPIO-0-31", + .first_gpio = 0, + .first_irq = NOMADIK_GPIO_TO_IRQ(0), + }, { + .name = "GPIO-32-63", + .first_gpio = 32, + .first_irq = NOMADIK_GPIO_TO_IRQ(32), + }, { + .name = "GPIO-64-95", + .first_gpio = 64, + .first_irq = NOMADIK_GPIO_TO_IRQ(64), + }, { + .name = "GPIO-96-127", /* 124..127 not routed to pin */ + .first_gpio = 96, + .first_irq = NOMADIK_GPIO_TO_IRQ(96), + } }; -static struct platform_device * -cpu8815_add_gpio(int id, resource_size_t addr, int irq, - struct nmk_gpio_platform_data *pdata) -{ - struct resource resources[] = { - { - .start = addr, - .end = addr + 127, - .flags = IORESOURCE_MEM, - }, - { - .start = irq, - .end = irq, - .flags = IORESOURCE_IRQ, - } - }; - - return platform_device_register_resndata(NULL, "gpio", id, - resources, ARRAY_SIZE(resources), - pdata, sizeof(*pdata)); -} +static struct resource cpu8815_gpio_resources[] = { + GPIO_RESOURCE(0), + GPIO_RESOURCE(1), + GPIO_RESOURCE(2), + GPIO_RESOURCE(3), +}; -void cpu8815_add_gpios(resource_size_t *base, int num, int irq, - struct nmk_gpio_platform_data *pdata) -{ - int first = 0; - int i; +static struct platform_device cpu8815_platform_gpio[] = { + GPIO_DEVICE(0), + GPIO_DEVICE(1), + GPIO_DEVICE(2), + GPIO_DEVICE(3), +}; - for (i = 0; i < num; i++, first += 32, irq++) { - pdata->first_gpio = first; - pdata->first_irq = NOMADIK_GPIO_TO_IRQ(first); - pdata->num_gpio = 32; +static AMBA_APB_DEVICE(cpu8815_amba_rng, "rng", 0, NOMADIK_RNG_BASE, { }, NULL); - cpu8815_add_gpio(i, base[i], irq, pdata); - } -} +static struct platform_device *platform_devs[] __initdata = { + cpu8815_platform_gpio + 0, + cpu8815_platform_gpio + 1, + cpu8815_platform_gpio + 2, + cpu8815_platform_gpio + 3, +}; + +static struct amba_device *amba_devs[] __initdata = { + &cpu8815_amba_rng_device +}; static int __init cpu8815_init(void) { - struct nmk_gpio_platform_data pdata = { - /* No custom data yet */ - }; - - cpu8815_add_gpios(cpu8815_gpio_base, ARRAY_SIZE(cpu8815_gpio_base), - IRQ_GPIO0, &pdata); - amba_apb_device_add(NULL, "rng", NOMADIK_RNG_BASE, SZ_4K, 0, 0, NULL, 0); - amba_apb_device_add(NULL, "rtc-pl031", NOMADIK_RTC_BASE, SZ_4K, IRQ_RTC_RTT, 0, NULL, 0); + int i; + + platform_add_devices(platform_devs, ARRAY_SIZE(platform_devs)); + for (i = 0; i < ARRAY_SIZE(amba_devs); i++) + amba_device_register(amba_devs[i], &iomem_resource); return 0; } arch_initcall(cpu8815_init); @@ -123,7 +147,7 @@ void __init cpu8815_init_irq(void) * Init clocks here so that they are available for system timer * initialization. */ - nomadik_clk_init(); + clk_init(); } /* diff --git a/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c b/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c index 6d14454d4609..0fc2f6f1cc97 100644 --- a/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c +++ b/trunk/arch/arm/mach-nomadik/i2c-8815nhk.c @@ -5,7 +5,6 @@ #include #include #include -#include /* * There are two busses in the 8815NHK. @@ -13,27 +12,19 @@ * use bit-bang through GPIO by now, to keep things simple */ -/* I2C0 connected to the STw4811 power management chip */ static struct i2c_gpio_platform_data nhk8815_i2c_data0 = { /* keep defaults for timeouts; pins are push-pull bidirectional */ .scl_pin = 62, .sda_pin = 63, }; -/* I2C1 connected to various sensors */ static struct i2c_gpio_platform_data nhk8815_i2c_data1 = { /* keep defaults for timeouts; pins are push-pull bidirectional */ .scl_pin = 53, .sda_pin = 54, }; -/* I2C2 connected to the USB portions of the STw4811 only */ -static struct i2c_gpio_platform_data nhk8815_i2c_data2 = { - /* keep defaults for timeouts; pins are push-pull bidirectional */ - .scl_pin = 73, - .sda_pin = 74, -}; - +/* first bus: GPIO XX and YY */ static struct platform_device nhk8815_i2c_dev0 = { .name = "i2c-gpio", .id = 0, @@ -41,7 +32,7 @@ static struct platform_device nhk8815_i2c_dev0 = { .platform_data = &nhk8815_i2c_data0, }, }; - +/* second bus: GPIO XX and YY */ static struct platform_device nhk8815_i2c_dev1 = { .name = "i2c-gpio", .id = 1, @@ -50,29 +41,15 @@ static struct platform_device nhk8815_i2c_dev1 = { }, }; -static struct platform_device nhk8815_i2c_dev2 = { - .name = "i2c-gpio", - .id = 2, - .dev = { - .platform_data = &nhk8815_i2c_data2, - }, -}; - -static pin_cfg_t cpu8815_pins_i2c[] = { - PIN_CFG_INPUT(62, GPIO, PULLUP), - PIN_CFG_INPUT(63, GPIO, PULLUP), - PIN_CFG_INPUT(53, GPIO, PULLUP), - PIN_CFG_INPUT(54, GPIO, PULLUP), - PIN_CFG_INPUT(73, GPIO, PULLUP), - PIN_CFG_INPUT(74, GPIO, PULLUP), -}; - static int __init nhk8815_i2c_init(void) { - nmk_config_pins(cpu8815_pins_i2c, ARRAY_SIZE(cpu8815_pins_i2c)); + nmk_gpio_set_mode(nhk8815_i2c_data0.scl_pin, NMK_GPIO_ALT_GPIO); + nmk_gpio_set_mode(nhk8815_i2c_data0.sda_pin, NMK_GPIO_ALT_GPIO); platform_device_register(&nhk8815_i2c_dev0); + + nmk_gpio_set_mode(nhk8815_i2c_data1.scl_pin, NMK_GPIO_ALT_GPIO); + nmk_gpio_set_mode(nhk8815_i2c_data1.sda_pin, NMK_GPIO_ALT_GPIO); platform_device_register(&nhk8815_i2c_dev1); - platform_device_register(&nhk8815_i2c_dev2); return 0; } @@ -81,7 +58,6 @@ static void __exit nhk8815_i2c_exit(void) { platform_device_unregister(&nhk8815_i2c_dev0); platform_device_unregister(&nhk8815_i2c_dev1); - platform_device_unregister(&nhk8815_i2c_dev2); return; } diff --git a/trunk/arch/arm/mach-nomadik/include/mach/irqs.h b/trunk/arch/arm/mach-nomadik/include/mach/irqs.h index a118e615f865..8faabc560398 100644 --- a/trunk/arch/arm/mach-nomadik/include/mach/irqs.h +++ b/trunk/arch/arm/mach-nomadik/include/mach/irqs.h @@ -22,56 +22,56 @@ #include -#define IRQ_VIC_START 1 /* first VIC interrupt is 1 */ +#define IRQ_VIC_START 0 /* first VIC interrupt is 0 */ /* * Interrupt numbers generic for all Nomadik Chip cuts */ -#define IRQ_WATCHDOG 1 -#define IRQ_SOFTINT 2 -#define IRQ_CRYPTO 3 -#define IRQ_OWM 4 -#define IRQ_MTU0 5 -#define IRQ_MTU1 6 -#define IRQ_GPIO0 7 -#define IRQ_GPIO1 8 -#define IRQ_GPIO2 9 -#define IRQ_GPIO3 10 -#define IRQ_RTC_RTT 11 -#define IRQ_SSP 12 -#define IRQ_UART0 13 -#define IRQ_DMA1 14 -#define IRQ_CLCD_MDIF 15 -#define IRQ_DMA0 16 -#define IRQ_PWRFAIL 17 -#define IRQ_UART1 18 -#define IRQ_FIRDA 19 -#define IRQ_MSP0 20 -#define IRQ_I2C0 21 -#define IRQ_I2C1 22 -#define IRQ_SDMMC 23 -#define IRQ_USBOTG 24 -#define IRQ_SVA_IT0 25 -#define IRQ_SVA_IT1 26 -#define IRQ_SAA_IT0 27 -#define IRQ_SAA_IT1 28 -#define IRQ_UART2 29 -#define IRQ_MSP2 30 -#define IRQ_L2CC 49 -#define IRQ_HPI 50 -#define IRQ_SKE 51 -#define IRQ_KP 52 -#define IRQ_MEMST 55 -#define IRQ_SGA_IT 59 -#define IRQ_USBM 61 -#define IRQ_MSP1 63 +#define IRQ_WATCHDOG 0 +#define IRQ_SOFTINT 1 +#define IRQ_CRYPTO 2 +#define IRQ_OWM 3 +#define IRQ_MTU0 4 +#define IRQ_MTU1 5 +#define IRQ_GPIO0 6 +#define IRQ_GPIO1 7 +#define IRQ_GPIO2 8 +#define IRQ_GPIO3 9 +#define IRQ_RTC_RTT 10 +#define IRQ_SSP 11 +#define IRQ_UART0 12 +#define IRQ_DMA1 13 +#define IRQ_CLCD_MDIF 14 +#define IRQ_DMA0 15 +#define IRQ_PWRFAIL 16 +#define IRQ_UART1 17 +#define IRQ_FIRDA 18 +#define IRQ_MSP0 19 +#define IRQ_I2C0 20 +#define IRQ_I2C1 21 +#define IRQ_SDMMC 22 +#define IRQ_USBOTG 23 +#define IRQ_SVA_IT0 24 +#define IRQ_SVA_IT1 25 +#define IRQ_SAA_IT0 26 +#define IRQ_SAA_IT1 27 +#define IRQ_UART2 28 +#define IRQ_MSP2 31 +#define IRQ_L2CC 48 +#define IRQ_HPI 49 +#define IRQ_SKE 50 +#define IRQ_KP 51 +#define IRQ_MEMST 54 +#define IRQ_SGA_IT 58 +#define IRQ_USBM 60 +#define IRQ_MSP1 62 -#define NOMADIK_GPIO_OFFSET (IRQ_VIC_START+64) +#define NOMADIK_SOC_NR_IRQS 64 /* After chip-specific IRQ numbers we have the GPIO ones */ #define NOMADIK_NR_GPIO 128 /* last 4 not wired to pins */ -#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_GPIO_OFFSET) -#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_GPIO_OFFSET) +#define NOMADIK_GPIO_TO_IRQ(gpio) ((gpio) + NOMADIK_SOC_NR_IRQS) +#define NOMADIK_IRQ_TO_GPIO(irq) ((irq) - NOMADIK_SOC_NR_IRQS) #define NR_IRQS NOMADIK_GPIO_TO_IRQ(NOMADIK_NR_GPIO) /* Following two are used by entry_macro.S, to access our dual-vic */ @@ -79,3 +79,4 @@ #define VIC_REG_IRQSR1 0x20 #endif /* __ASM_ARCH_IRQS_H */ + diff --git a/trunk/drivers/clk/Makefile b/trunk/drivers/clk/Makefile index 26b6b92942e1..b9a5158a30b1 100644 --- a/trunk/drivers/clk/Makefile +++ b/trunk/drivers/clk/Makefile @@ -3,6 +3,5 @@ obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o obj-$(CONFIG_COMMON_CLK) += clk.o clk-fixed-rate.o clk-gate.o \ clk-mux.o clk-divider.o clk-fixed-factor.o # SoCs specific -obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o obj-$(CONFIG_ARCH_MXS) += mxs/ obj-$(CONFIG_PLAT_SPEAR) += spear/ diff --git a/trunk/drivers/clk/clk-nomadik.c b/trunk/drivers/clk/clk-nomadik.c deleted file mode 100644 index 517a8ff7121e..000000000000 --- a/trunk/drivers/clk/clk-nomadik.c +++ /dev/null @@ -1,47 +0,0 @@ -#include -#include -#include -#include -#include - -/* - * The Nomadik clock tree is described in the STN8815A12 DB V4.2 - * reference manual for the chip, page 94 ff. - */ - -void __init nomadik_clk_init(void) -{ - struct clk *clk; - - clk = clk_register_fixed_rate(NULL, "apb_pclk", NULL, CLK_IS_ROOT, 0); - clk_register_clkdev(clk, "apb_pclk", NULL); - clk_register_clkdev(clk, NULL, "gpio.0"); - clk_register_clkdev(clk, NULL, "gpio.1"); - clk_register_clkdev(clk, NULL, "gpio.2"); - clk_register_clkdev(clk, NULL, "gpio.3"); - clk_register_clkdev(clk, NULL, "rng"); - - /* - * The 2.4 MHz TIMCLK reference clock is active at boot time, this is - * actually the MXTALCLK @19.2 MHz divided by 8. This clock is used - * by the timers and watchdog. See page 105 ff. - */ - clk = clk_register_fixed_rate(NULL, "TIMCLK", NULL, CLK_IS_ROOT, - 2400000); - clk_register_clkdev(clk, NULL, "mtu0"); - clk_register_clkdev(clk, NULL, "mtu1"); - - /* - * At boot time, PLL2 is set to generate a set of fixed clocks, - * one of them is CLK48, the 48 MHz clock, routed to the UART, MMC/SD - * I2C, IrDA, USB and SSP blocks. - */ - clk = clk_register_fixed_rate(NULL, "CLK48", NULL, CLK_IS_ROOT, - 48000000); - clk_register_clkdev(clk, NULL, "uart0"); - clk_register_clkdev(clk, NULL, "uart1"); - clk_register_clkdev(clk, NULL, "mmci"); - clk_register_clkdev(clk, NULL, "ssp"); - clk_register_clkdev(clk, NULL, "nmk-i2c.0"); - clk_register_clkdev(clk, NULL, "nmk-i2c.1"); -} diff --git a/trunk/include/linux/platform_data/clk-nomadik.h b/trunk/include/linux/platform_data/clk-nomadik.h deleted file mode 100644 index 5713c87b2477..000000000000 --- a/trunk/include/linux/platform_data/clk-nomadik.h +++ /dev/null @@ -1,2 +0,0 @@ -/* Minimal platform data header */ -void nomadik_clk_init(void);