From a77b0be563db113e6de85812c08e810241fcd6e9 Mon Sep 17 00:00:00 2001 From: Valentin Longchamp Date: Mon, 10 Aug 2009 18:33:10 +0200 Subject: [PATCH] --- yaml --- r: 160884 b: refs/heads/master c: 89829d5fe31dc42825f2560c3c2c641709ed594e h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/plat-mxc/include/mach/iomux-mx3.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index d76d7bc529bd..647f1b4ec2ef 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 94da274b4982f5b36b55bde0c76d3ef8233bceda +refs/heads/master: 89829d5fe31dc42825f2560c3c2c641709ed594e diff --git a/trunk/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/trunk/arch/arm/plat-mxc/include/mach/iomux-mx3.h index a3b206ce78b8..674527327946 100644 --- a/trunk/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/trunk/arch/arm/plat-mxc/include/mach/iomux-mx3.h @@ -682,6 +682,7 @@ enum iomux_pins { #define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO) #define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO) #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) +#define MX31_PIN_GPIO1_0__GPIO1_0 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO) /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 * cspi1_ss1*/