From a77cfcbff95142574803089f1143937f70184eed Mon Sep 17 00:00:00 2001
From: Ben Dooks <ben-linux@fluff.org>
Date: Thu, 15 Feb 2007 22:53:52 +0100
Subject: [PATCH] --- yaml --- r: 48956 b: refs/heads/master c:
 b4f14eb86cda9324a2ffbdf534385d012967acd8 h: refs/heads/master v: v3

---
 [refs]                                                 |  2 +-
 trunk/arch/arm/mach-s3c2443/s3c2443.c                  | 10 +++++++++-
 .../include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h  |  2 ++
 3 files changed, 12 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index f9b8764449c2..f3a313f8d5e7 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: d4156d52c7464e8f25a286e1c2975e91bdbc35d6
+refs/heads/master: b4f14eb86cda9324a2ffbdf534385d012967acd8
diff --git a/trunk/arch/arm/mach-s3c2443/s3c2443.c b/trunk/arch/arm/mach-s3c2443/s3c2443.c
index 9b91235c15d2..11b1d0b310c3 100644
--- a/trunk/arch/arm/mach-s3c2443/s3c2443.c
+++ b/trunk/arch/arm/mach-s3c2443/s3c2443.c
@@ -29,7 +29,8 @@
 #include <asm/io.h>
 #include <asm/irq.h>
 
-#include <asm/arch/regs-serial.h>
+#include <asm/arch/regs-s3c2443-clock.h>
+#include <asm/arch/reset.h>
 
 #include <asm/plat-s3c24xx/s3c2443.h>
 #include <asm/plat-s3c24xx/devs.h>
@@ -49,10 +50,17 @@ static struct sys_device s3c2443_sysdev = {
 	.cls		= &s3c2443_sysclass,
 };
 
+static void s3c2443_hard_reset(void)
+{
+	__raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
+}
+
 int __init s3c2443_init(void)
 {
 	printk("S3C2443: Initialising architecture\n");
 
+	s3c24xx_reset_hook = s3c2443_hard_reset;
+
 	s3c_device_nand.name = "s3c2412-nand";
 
 	return sysdev_register(&s3c2443_sysdev);
diff --git a/trunk/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h b/trunk/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
index e696554f9c21..ff0536d2de42 100644
--- a/trunk/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
+++ b/trunk/include/asm-arm/arch-s3c2410/regs-s3c2443-clock.h
@@ -38,6 +38,8 @@
 #define S3C2443_PWRCFG			S3C2443_CLKREG(0x60)
 #define S3C2443_RSTCON			S3C2443_CLKREG(0x64)
 
+#define S3C2443_SWRST_RESET		(0x533c2443)
+
 #define S3C2443_PLLCON_OFF		(1<<24)
 
 #define S3C2443_CLKSRC_I2S_EXT		(1<<14)