From a793b33e3fd3b7a05c3b85aea64d0d20ca774ec3 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Tue, 28 Mar 2006 09:28:14 +1100 Subject: [PATCH] --- yaml --- r: 24635 b: refs/heads/master c: ff2e6d7e27cf1f757ab0d97e1a9e46de47152a0e h: refs/heads/master i: 24633: 93bce96226c1651dae3d4a5aea7f462664a0a05e 24631: 16f3281f5753c0cf7711f8aa26dc4f95ca55f3bb v: v3 --- [refs] | 2 +- trunk/arch/powerpc/kernel/idle_6xx.S | 3 ++- trunk/arch/powerpc/kernel/idle_power4.S | 23 +++-------------------- 3 files changed, 6 insertions(+), 22 deletions(-) diff --git a/[refs] b/[refs] index 18045e15c14a..622085e39572 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 9618edab82fda8dbce5ea3abcdac9ded07abb2d4 +refs/heads/master: ff2e6d7e27cf1f757ab0d97e1a9e46de47152a0e diff --git a/trunk/arch/powerpc/kernel/idle_6xx.S b/trunk/arch/powerpc/kernel/idle_6xx.S index 1647ea361ef7..12a4efbaa08f 100644 --- a/trunk/arch/powerpc/kernel/idle_6xx.S +++ b/trunk/arch/powerpc/kernel/idle_6xx.S @@ -144,7 +144,8 @@ BEGIN_FTR_SECTION DSSALL sync END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) - ori r7,r7,MSR_EE /* Could be ommited (already set) */ + mfmsr r7 + ori r7,r7,MSR_EE oris r7,r7,MSR_POW@h sync isync diff --git a/trunk/arch/powerpc/kernel/idle_power4.S b/trunk/arch/powerpc/kernel/idle_power4.S index 692cf2ebe0f4..6dad1c02496e 100644 --- a/trunk/arch/powerpc/kernel/idle_power4.S +++ b/trunk/arch/powerpc/kernel/idle_power4.S @@ -1,11 +1,5 @@ /* - * This file contains the power_save function for 6xx & 7xxx CPUs - * rewritten in assembler - * - * Warning ! This code assumes that if your machine has a 750fx - * it will have PLL 1 set to low speed mode (used during NAP/DOZE). - * if this is not the case some additional changes will have to - * be done to check a runtime var (a bit like powersave-nap) + * This file contains the power_save function for 970-family CPUs. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License @@ -26,23 +20,10 @@ .text -/* - * Here is the power_save_6xx function. This could eventually be - * split into several functions & changing the function pointer - * depending on the various features. - */ _GLOBAL(power4_idle) BEGIN_FTR_SECTION blr END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP) - /* We must dynamically check for the NAP feature as it - * can be cleared by CPU init after the fixups are done - */ - LOAD_REG_ADDRBASE(r3,cur_cpu_spec) - ld r4,ADDROFF(cur_cpu_spec)(r3) - ld r4,CPU_SPEC_FEATURES(r4) - andi. r0,r4,CPU_FTR_CAN_NAP - beqlr /* Now check if user or arch enabled NAP mode */ LOAD_REG_ADDRBASE(r3,powersave_nap) lwz r4,ADDROFF(powersave_nap)(r3) @@ -54,6 +35,8 @@ BEGIN_FTR_SECTION DSSALL sync END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) + mfmsr r7 + ori r7,r7,MSR_EE oris r7,r7,MSR_POW@h sync isync