diff --git a/[refs] b/[refs] index 2a655c43087e..6ae8b7a4c2b9 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0ca2b776ab1f4ba99d7f592baa4ff8525e53b050 +refs/heads/master: d55b4c631e89a008e80b003e5aa4291d9ec800ac diff --git a/trunk/drivers/ata/ahci.c b/trunk/drivers/ata/ahci.c index 988f8bbd14ff..cef2e70d64f8 100644 --- a/trunk/drivers/ata/ahci.c +++ b/trunk/drivers/ata/ahci.c @@ -736,7 +736,8 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class) } /* check BUSY/DRQ, perform Command List Override if necessary */ - if (ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ)) { + ahci_tf_read(ap, &tf); + if (tf.command & (ATA_BUSY | ATA_DRQ)) { rc = ahci_clo(ap); if (rc == -EOPNOTSUPP) { diff --git a/trunk/drivers/ata/ata_piix.c b/trunk/drivers/ata/ata_piix.c index 720174d628fa..8385387c49cd 100644 --- a/trunk/drivers/ata/ata_piix.c +++ b/trunk/drivers/ata/ata_piix.c @@ -168,6 +168,7 @@ static const struct pci_device_id piix_pci_tbl[] = { #ifdef ATA_ENABLE_PATA /* Intel PIIX4 for the 430TX/440BX/MX chipset: UDMA 33 */ /* Also PIIX4E (fn3 rev 2) and PIIX4M (fn3 rev 3) */ + { 0x8086, 0x7110, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 }, { 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 }, { 0x8086, 0x24db, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, { 0x8086, 0x25a2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 }, diff --git a/trunk/drivers/ata/sata_nv.c b/trunk/drivers/ata/sata_nv.c index d65ebfd7c7b2..323b60710806 100644 --- a/trunk/drivers/ata/sata_nv.c +++ b/trunk/drivers/ata/sata_nv.c @@ -117,14 +117,10 @@ static const struct pci_device_id nv_pci_tbl[] = { { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA), GENERIC }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2), GENERIC }, { PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3), GENERIC }, - { PCI_VDEVICE(NVIDIA, 0x045c), GENERIC }, /* MCP65 */ - { PCI_VDEVICE(NVIDIA, 0x045d), GENERIC }, /* MCP65 */ - { PCI_VDEVICE(NVIDIA, 0x045e), GENERIC }, /* MCP65 */ - { PCI_VDEVICE(NVIDIA, 0x045f), GENERIC }, /* MCP65 */ - { PCI_VDEVICE(NVIDIA, 0x0550), GENERIC }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0551), GENERIC }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0552), GENERIC }, /* MCP67 */ - { PCI_VDEVICE(NVIDIA, 0x0553), GENERIC }, /* MCP67 */ + { PCI_VDEVICE(NVIDIA, 0x045c), GENERIC }, + { PCI_VDEVICE(NVIDIA, 0x045d), GENERIC }, + { PCI_VDEVICE(NVIDIA, 0x045e), GENERIC }, + { PCI_VDEVICE(NVIDIA, 0x045f), GENERIC }, { PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC }, diff --git a/trunk/include/asm-sparc64/futex.h b/trunk/include/asm-sparc64/futex.h index 7392fc4a954e..dee40206b221 100644 --- a/trunk/include/asm-sparc64/futex.h +++ b/trunk/include/asm-sparc64/futex.h @@ -87,22 +87,24 @@ static inline int futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval) { __asm__ __volatile__( - "\n1: casa [%3] %%asi, %2, %0\n" - "2:\n" + "\n1: lduwa [%2] %%asi, %0\n" + "2: casa [%2] %%asi, %0, %1\n" + "3:\n" " .section .fixup,#alloc,#execinstr\n" " .align 4\n" - "3: ba 2b\n" - " mov %4, %0\n" + "4: ba 3b\n" + " mov %3, %0\n" " .previous\n" " .section __ex_table,\"a\"\n" " .align 4\n" - " .word 1b, 3b\n" + " .word 1b, 4b\n" + " .word 2b, 4b\n" " .previous\n" - : "=r" (newval) - : "0" (newval), "r" (oldval), "r" (uaddr), "i" (-EFAULT) + : "=&r" (oldval) + : "r" (newval), "r" (uaddr), "i" (-EFAULT) : "memory"); - return newval; + return oldval; } #endif /* !(_SPARC64_FUTEX_H) */ diff --git a/trunk/net/tipc/port.c b/trunk/net/tipc/port.c index c1a1a76759b5..b7f3199523ca 100644 --- a/trunk/net/tipc/port.c +++ b/trunk/net/tipc/port.c @@ -1136,11 +1136,12 @@ int tipc_publish(u32 ref, unsigned int scope, struct tipc_name_seq const *seq) int res = -EINVAL; p_ptr = tipc_port_lock(ref); + if (!p_ptr) + return -EINVAL; + dbg("tipc_publ %u, p_ptr = %x, conn = %x, scope = %x, " "lower = %u, upper = %u\n", ref, p_ptr, p_ptr->publ.connected, scope, seq->lower, seq->upper); - if (!p_ptr) - return -EINVAL; if (p_ptr->publ.connected) goto exit; if (seq->lower > seq->upper)