From a8dbc26ef85d6c615a2fe4a6a4d43e3fee756c29 Mon Sep 17 00:00:00 2001 From: Bruce Allan Date: Tue, 31 Jan 2012 06:37:27 +0000 Subject: [PATCH] --- yaml --- r: 290023 b: refs/heads/master c: 9e2d7657e2a8fb40f732563dffb05151ea2d7e01 h: refs/heads/master i: 290021: e5e1519dde67ee65fb838c9e1763af5c6d7bbbd8 290019: c31ef089dd71b2b2b43f4341835d6acfff3da5b7 290015: ddb5f1d962fc1740001b2de65a8c76545ce6e35b v: v3 --- [refs] | 2 +- trunk/drivers/net/ethernet/intel/e1000e/ethtool.c | 2 +- trunk/drivers/net/ethernet/intel/e1000e/ich8lan.c | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 4c99f59f4b42..cc6fdfa9ea41 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f36bb6cacd3bcbab9605e06f585ee8f1ea450876 +refs/heads/master: 9e2d7657e2a8fb40f732563dffb05151ea2d7e01 diff --git a/trunk/drivers/net/ethernet/intel/e1000e/ethtool.c b/trunk/drivers/net/ethernet/intel/e1000e/ethtool.c index 92d5b6278955..f43af463ddc6 100644 --- a/trunk/drivers/net/ethernet/intel/e1000e/ethtool.c +++ b/trunk/drivers/net/ethernet/intel/e1000e/ethtool.c @@ -537,7 +537,7 @@ static int e1000_set_eeprom(struct net_device *netdev, ret_val = e1000_read_nvm(hw, first_word, 1, &eeprom_buff[0]); ptr++; } - if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) + if (((eeprom->offset + eeprom->len) & 1) && (!ret_val)) /* need read/modify/write of last changed EEPROM word */ /* only the first byte of the word is being modified */ ret_val = e1000_read_nvm(hw, last_word, 1, diff --git a/trunk/drivers/net/ethernet/intel/e1000e/ich8lan.c b/trunk/drivers/net/ethernet/intel/e1000e/ich8lan.c index 907b17b2e66a..0e64cc438494 100644 --- a/trunk/drivers/net/ethernet/intel/e1000e/ich8lan.c +++ b/trunk/drivers/net/ethernet/intel/e1000e/ich8lan.c @@ -2286,7 +2286,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) } udelay(1); } - if (ret_val == 0) { + if (!ret_val) { /* * Successful in waiting for previous cycle to timeout, * now set the Flash Cycle Done. @@ -2404,7 +2404,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, udelay(1); /* Steps */ ret_val = e1000_flash_cycle_init_ich8lan(hw); - if (ret_val != 0) + if (ret_val) break; hsflctl.regval = er16flash(ICH_FLASH_HSFCTL); @@ -2424,7 +2424,7 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset, * read in (shift in) the Flash Data0, the order is * least significant byte first msb to lsb */ - if (ret_val == 0) { + if (!ret_val) { flash_data = er32flash(ICH_FLASH_FDATA0); if (size == 1) *data = (u8)(flash_data & 0x000000FF); @@ -2936,7 +2936,7 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank) ret_val = e1000_flash_cycle_ich8lan(hw, ICH_FLASH_ERASE_COMMAND_TIMEOUT); - if (ret_val == 0) + if (!ret_val) break; /*