From a9ba5a253e547c4681fce38749dc7206428c1f01 Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Wed, 22 May 2013 18:38:10 +0530 Subject: [PATCH] --- yaml --- r: 376291 b: refs/heads/master c: 3e87974dec5ec25a8a4852d9292db6be659164e6 h: refs/heads/master i: 376289: 23600cc81ab3bf03ab002de51238b2a56977e9bf 376287: bcdd7f9df5af7e838e41e1ae27b7b0cb419ed424 v: v3 --- [refs] | 2 +- trunk/arch/arc/include/asm/cacheflush.h | 4 +++- trunk/arch/arc/mm/tlb.c | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 52a647e4ec7a..8c409fa8247e 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a950549c675f2c8c504469dec7d780da8a6433dc +refs/heads/master: 3e87974dec5ec25a8a4852d9292db6be659164e6 diff --git a/trunk/arch/arc/include/asm/cacheflush.h b/trunk/arch/arc/include/asm/cacheflush.h index 9f841af41092..7d819749478c 100644 --- a/trunk/arch/arc/include/asm/cacheflush.h +++ b/trunk/arch/arc/include/asm/cacheflush.h @@ -99,8 +99,10 @@ static inline int cache_is_vipt_aliasing(void) * checks if two addresses (after page aligning) index into same cache set */ #define addr_not_cache_congruent(addr1, addr2) \ +({ \ cache_is_vipt_aliasing() ? \ - (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0 \ + (CACHE_COLOR(addr1) != CACHE_COLOR(addr2)) : 0; \ +}) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ do { \ diff --git a/trunk/arch/arc/mm/tlb.c b/trunk/arch/arc/mm/tlb.c index 066145b5f348..fe1c5a073afe 100644 --- a/trunk/arch/arc/mm/tlb.c +++ b/trunk/arch/arc/mm/tlb.c @@ -444,7 +444,8 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned, * so userspace sees the right data. * (Avoids the flush for Non-exec + congruent mapping case) */ - if (vma->vm_flags & VM_EXEC || addr_not_cache_congruent(paddr, vaddr)) { + if ((vma->vm_flags & VM_EXEC) || + addr_not_cache_congruent(paddr, vaddr)) { struct page *page = pfn_to_page(pte_pfn(*ptep)); int dirty = test_and_clear_bit(PG_arch_1, &page->flags);