From aa433073349feafc24784321449869a4ad3fe446 Mon Sep 17 00:00:00 2001 From: Ilija Hadzic Date: Wed, 2 Jan 2013 18:27:44 -0500 Subject: [PATCH] --- yaml --- r: 358115 b: refs/heads/master c: d6e18a3406d401edeb96a01c7bb9d1689454c41b h: refs/heads/master i: 358113: c00ef4a2c7ab1b34085cf1b605716682965ddc12 358111: 8a104c525863699766953ef96531527ff1583981 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/evergreen_cs.c | 3 +++ trunk/drivers/gpu/drm/radeon/r600_cs.c | 8 ++++++++ 3 files changed, 12 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e1220a4d9ce6..55d7595f3da1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 40592a17b8747903be95338f461573916a71d739 +refs/heads/master: d6e18a3406d401edeb96a01c7bb9d1689454c41b diff --git a/trunk/drivers/gpu/drm/radeon/evergreen_cs.c b/trunk/drivers/gpu/drm/radeon/evergreen_cs.c index 26905322d8e7..02aeb7fc3778 100644 --- a/trunk/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/trunk/drivers/gpu/drm/radeon/evergreen_cs.c @@ -2101,6 +2101,9 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p, ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffffc); ib[idx+2] = upper_32_bits(offset) & 0xff; + } else if (idx_value & 0x100) { + DRM_ERROR("cannot use PFP on REG wait\n"); + return -EINVAL; } break; case PACKET3_CP_DMA: diff --git a/trunk/drivers/gpu/drm/radeon/r600_cs.c b/trunk/drivers/gpu/drm/radeon/r600_cs.c index e61a013e63fc..9d833728ed00 100644 --- a/trunk/drivers/gpu/drm/radeon/r600_cs.c +++ b/trunk/drivers/gpu/drm/radeon/r600_cs.c @@ -949,6 +949,11 @@ int r600_cs_common_vline_parse(struct radeon_cs_parser *p, DRM_ERROR("vline WAIT_REG_MEM waiting on MEM instead of REG\n"); return -EINVAL; } + /* bit 8 is me (0) or pfp (1) */ + if (wait_reg_mem_info & 0x100) { + DRM_ERROR("vline WAIT_REG_MEM waiting on PFP instead of ME\n"); + return -EINVAL; + } /* waiting for value to be equal */ if ((wait_reg_mem_info & 0x7) != 0x3) { DRM_ERROR("vline WAIT_REG_MEM function not equal\n"); @@ -1847,6 +1852,9 @@ static int r600_packet3_check(struct radeon_cs_parser *p, ib[idx+1] = (ib[idx+1] & 0x3) | (offset & 0xfffffff0); ib[idx+2] = upper_32_bits(offset) & 0xff; + } else if (idx_value & 0x100) { + DRM_ERROR("cannot use PFP on REG wait\n"); + return -EINVAL; } break; case PACKET3_CP_DMA: