From ac08eb7af12967790c967d229a5e318db6b77426 Mon Sep 17 00:00:00 2001
From: Thomas Abraham <thomas.abraham@linaro.org>
Date: Wed, 8 Feb 2012 11:42:43 +0900
Subject: [PATCH] --- yaml --- r: 287731 b: refs/heads/master c:
 da911782be4c82dc1222aa0cb5bef28605d1e117 h: refs/heads/master i:   287729:
 bc2b3c3ad8eebe99e86e31015a5f38aa3d9c50ba   287727:
 a99b5902af37e98760872d5f6840348d3d2a3650 v: v3

---
 [refs]                                  | 2 +-
 trunk/arch/arm/boot/dts/exynos4210.dtsi | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/[refs] b/[refs]
index ed47fd7d66ce..ea6a1f329ac2 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 35bded8f91e887bf2d692071bb720b03c6ccd3fe
+refs/heads/master: da911782be4c82dc1222aa0cb5bef28605d1e117
diff --git a/trunk/arch/arm/boot/dts/exynos4210.dtsi b/trunk/arch/arm/boot/dts/exynos4210.dtsi
index 63d7578856c1..a1dd2ee83753 100644
--- a/trunk/arch/arm/boot/dts/exynos4210.dtsi
+++ b/trunk/arch/arm/boot/dts/exynos4210.dtsi
@@ -29,6 +29,7 @@
 		compatible = "arm,cortex-a9-gic";
 		#interrupt-cells = <3>;
 		interrupt-controller;
+		cpu-offset = <0x8000>;
 		reg = <0x10490000 0x1000>, <0x10480000 0x100>;
 	};