diff --git a/[refs] b/[refs] index c7f395c4490f..4904e2ce5a8c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 4a7b98d7e7f1c05331bfa82e2427f896e57de35b +refs/heads/master: 3620c0dccfd35cd39324508d8c962d10f9a44ead diff --git a/trunk/arch/arm/mach-mx2/pcm038.c b/trunk/arch/arm/mach-mx2/pcm038.c index 91a1e4bbccbc..0594644b4057 100644 --- a/trunk/arch/arm/mach-mx2/pcm038.c +++ b/trunk/arch/arm/mach-mx2/pcm038.c @@ -19,6 +19,7 @@ #include #include +#include #include #include #include @@ -30,6 +31,31 @@ #include "devices.h" +/* + * Phytec's PCM038 comes with 2MiB battery buffered SRAM, + * 16 bit width + */ + +static struct platdata_mtd_ram pcm038_sram_data = { + .bankwidth = 2, +}; + +static struct resource pcm038_sram_resource = { + .start = CS1_BASE_ADDR, + .end = CS1_BASE_ADDR + 512 * 1024 - 1, + .flags = IORESOURCE_MEM, +}; + +static struct platform_device pcm038_sram_mtd_device = { + .name = "mtd-ram", + .id = 0, + .dev = { + .platform_data = &pcm038_sram_data, + }, + .num_resources = 1, + .resource = &pcm038_sram_resource, +}; + /* * Phytec's phyCORE-i.MX27 comes with 32MiB flash, * 16 bit width @@ -164,11 +190,22 @@ static void gpio_fec_inactive(void) static struct platform_device *platform_devices[] __initdata = { &pcm038_nor_mtd_device, &mxc_w1_master_device, + &pcm038_sram_mtd_device, }; +/* On pcm038 there's a sram attached to CS1, we enable the chipselect here and + * setup other stuffs to access the sram. */ +static void __init pcm038_init_sram(void) +{ + __raw_writel(0x0000d843, CSCR_U(1)); + __raw_writel(0x22252521, CSCR_L(1)); + __raw_writel(0x22220a00, CSCR_A(1)); +} + static void __init pcm038_init(void) { gpio_fec_active(); + pcm038_init_sram(); mxc_register_device(&mxc_uart_device0, &uart_pdata[0]); mxc_register_device(&mxc_uart_device1, &uart_pdata[1]);