From acc45bce8a581d6122fe06dbea66643984887896 Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 7 Mar 2008 11:47:23 +0100 Subject: [PATCH] --- yaml --- r: 87300 b: refs/heads/master c: 4c91363dc01310dc34f1621ef00d680b4404f71c h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/arm/mach-orion/addr-map.c | 14 ++++++++++---- 2 files changed, 11 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index fd11ffe9aab5..584652b5a498 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 88603f1dc1bf414dc21a0361693d1270231a6c59 +refs/heads/master: 4c91363dc01310dc34f1621ef00d680b4404f71c diff --git a/trunk/arch/arm/mach-orion/addr-map.c b/trunk/arch/arm/mach-orion/addr-map.c index 2e2fd63643c3..58cc3c0333b6 100644 --- a/trunk/arch/arm/mach-orion/addr-map.c +++ b/trunk/arch/arm/mach-orion/addr-map.c @@ -97,14 +97,20 @@ #define PCIE_BAR_CTRL(n) ORION_PCIE_REG(0x1804 + ((n - 1) * 4)) #define PCIE_BAR_LO(n) ORION_PCIE_REG(0x0010 + ((n) * 8)) #define PCIE_BAR_HI(n) ORION_PCIE_REG(0x0014 + ((n) * 8)) -#define PCIE_WIN_CTRL(n) ORION_PCIE_REG(0x1820 + ((n) << 4)) -#define PCIE_WIN_BASE(n) ORION_PCIE_REG(0x1824 + ((n) << 4)) -#define PCIE_WIN_REMAP(n) ORION_PCIE_REG(0x182c + ((n) << 4)) +#define PCIE_WIN_CTRL(n) (((n) < 5) ? \ + ORION_PCIE_REG(0x1820 + ((n) << 4)) : \ + ORION_PCIE_REG(0x1880)) +#define PCIE_WIN_BASE(n) (((n) < 5) ? \ + ORION_PCIE_REG(0x1824 + ((n) << 4)) : \ + ORION_PCIE_REG(0x1884)) +#define PCIE_WIN_REMAP(n) (((n) < 5) ? \ + ORION_PCIE_REG(0x182c + ((n) << 4)) : \ + ORION_PCIE_REG(0x188c)) #define PCIE_DEFWIN_CTRL ORION_PCIE_REG(0x18b0) #define PCIE_EXPROM_WIN_CTRL ORION_PCIE_REG(0x18c0) #define PCIE_EXPROM_WIN_REMP ORION_PCIE_REG(0x18c4) #define PCIE_MAX_BARS 3 -#define PCIE_MAX_WINS 5 +#define PCIE_MAX_WINS 6 /* * Use PCIE BAR '1' for all DDR banks