From ad09d77fb2378f0bd1fb974a6c525b9c4eb9bd1e Mon Sep 17 00:00:00 2001 From: Francois Romieu Date: Mon, 11 Sep 2006 20:10:58 +0200 Subject: [PATCH] --- yaml --- r: 35316 b: refs/heads/master c: b39fe41f481d20c201012e4483e76c203802dda7 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/net/r8169.c | 9 +++++++-- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 88c781045c58..e25f2a3f2161 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: d2eed8cff9a1a5d7e12ec9ddf71432c466b104d0 +refs/heads/master: b39fe41f481d20c201012e4483e76c203802dda7 diff --git a/trunk/drivers/net/r8169.c b/trunk/drivers/net/r8169.c index 93228c518ae7..805562b8624e 100644 --- a/trunk/drivers/net/r8169.c +++ b/trunk/drivers/net/r8169.c @@ -1904,10 +1904,15 @@ rtl8169_hw_start(struct net_device *dev) */ RTL_W16(IntrMitigate, 0x0000); - RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK)); + /* + * Magic spell: some iop3xx ARM board needs the TxDescAddrHigh + * register to be written before TxDescAddrLow to work. + * Switching from MMIO to I/O access fixes the issue as well. + */ RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32)); - RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK)); + RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK)); RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32)); + RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK)); RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); RTL_W8(Cfg9346, Cfg9346_Lock);