From adb3612819efd9f9c856276fab45faf1a9ec2ccd Mon Sep 17 00:00:00 2001
From: "Luck, Tony" <tony.luck@intel.com>
Date: Mon, 14 Jan 2008 09:59:24 -0800
Subject: [PATCH] --- yaml --- r: 75516 b: refs/heads/master c:
 1a499150e4ec1299232e24389f648d059ce5617a h: refs/heads/master v: v3

---
 [refs]                             |  2 +-
 trunk/arch/ia64/kernel/unaligned.c | 11 +++++++----
 2 files changed, 8 insertions(+), 5 deletions(-)

diff --git a/[refs] b/[refs]
index 5a8259d0b76c..9fd8fd7e5826 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 0938e7586440ac97cedc0f5528a8684ebfa4ce43
+refs/heads/master: 1a499150e4ec1299232e24389f648d059ce5617a
diff --git a/trunk/arch/ia64/kernel/unaligned.c b/trunk/arch/ia64/kernel/unaligned.c
index 2173de9fe917..f6a1aeb742b3 100644
--- a/trunk/arch/ia64/kernel/unaligned.c
+++ b/trunk/arch/ia64/kernel/unaligned.c
@@ -1488,16 +1488,19 @@ ia64_handle_unaligned (unsigned long ifa, struct pt_regs *regs)
 	      case LDFA_OP:
 	      case LDFCCLR_OP:
 	      case LDFCNC_OP:
-	      case LDF_IMM_OP:
-	      case LDFA_IMM_OP:
-	      case LDFCCLR_IMM_OP:
-	      case LDFCNC_IMM_OP:
 		if (u.insn.x)
 			ret = emulate_load_floatpair(ifa, u.insn, regs);
 		else
 			ret = emulate_load_float(ifa, u.insn, regs);
 		break;
 
+	      case LDF_IMM_OP:
+	      case LDFA_IMM_OP:
+	      case LDFCCLR_IMM_OP:
+	      case LDFCNC_IMM_OP:
+		ret = emulate_load_float(ifa, u.insn, regs);
+		break;
+
 	      case STF_OP:
 	      case STF_IMM_OP:
 		ret = emulate_store_float(ifa, u.insn, regs);