diff --git a/[refs] b/[refs]
index a2d81bead5dd..d1210e99630a 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 949a12e3a87281e38d3520823e7e171bbe45b448
+refs/heads/master: ba96796544f3bfc53a3269f0cf65651e349f8033
diff --git a/trunk/drivers/media/dvb/frontends/drxd.h b/trunk/drivers/media/dvb/frontends/drxd.h
index 9b11dc835c44..81093b9b1568 100644
--- a/trunk/drivers/media/dvb/frontends/drxd.h
+++ b/trunk/drivers/media/dvb/frontends/drxd.h
@@ -38,6 +38,7 @@ struct drxd_config
 #define DRXD_PLL_MT3X0823 2
 
 	u32 clock;
+	u8 insert_rs_byte;
 
 	u8 demod_address;
 	u8 demoda_address;
diff --git a/trunk/drivers/media/dvb/frontends/drxd_hard.c b/trunk/drivers/media/dvb/frontends/drxd_hard.c
index c4835b32e6d9..994195fe9fbb 100644
--- a/trunk/drivers/media/dvb/frontends/drxd_hard.c
+++ b/trunk/drivers/media/dvb/frontends/drxd_hard.c
@@ -2449,7 +2449,7 @@ static int CDRXD(struct drxd_state *state, u32 IntermediateFrequency)
 	state->tuner_mirrors=0;
 
 	/* modify MPEG output attributes */
-	state->insert_rs_byte = 0;
+	state->insert_rs_byte = state->config.insert_rs_byte;
 	state->enable_parallel = (ulSerialMode != 1);
 
 	/* Timing div, 250ns/Psys */