From ae2c6484ac28d29f9989b96ef48359f60c3df835 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 24 Apr 2005 14:58:08 -0700 Subject: [PATCH] --- yaml --- r: 400 b: refs/heads/master c: 8e293ada7d6aaee43dd56a8077b83577dd108667 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/ppc/platforms/pmac_smp.c | 14 +++++++------- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/[refs] b/[refs] index b93a620d4351..d1cc49fda558 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: e2178f199b341cc3e3ac86be50a54b0d8d8a132f +refs/heads/master: 8e293ada7d6aaee43dd56a8077b83577dd108667 diff --git a/trunk/arch/ppc/platforms/pmac_smp.c b/trunk/arch/ppc/platforms/pmac_smp.c index 731841f9a5b8..8e049dab4e63 100644 --- a/trunk/arch/ppc/platforms/pmac_smp.c +++ b/trunk/arch/ppc/platforms/pmac_smp.c @@ -91,11 +91,11 @@ extern void __secondary_start_psurge3(void); /* Temporary horrible hack */ #define PSURGE_QUAD_BIC(r, v) (PSURGE_QUAD_OUT((r), PSURGE_QUAD_IN(r) & ~(v))) /* virtual addresses for the above */ -static volatile u8 *hhead_base; -static volatile u8 *quad_base; -static volatile u32 *psurge_pri_intr; -static volatile u8 *psurge_sec_intr; -static volatile u32 *psurge_start; +static volatile u8 __iomem *hhead_base; +static volatile u8 __iomem *quad_base; +static volatile u32 __iomem *psurge_pri_intr; +static volatile u8 __iomem *psurge_sec_intr; +static volatile u32 __iomem *psurge_start; /* values for psurge_type */ #define PSURGE_NONE -1 @@ -322,10 +322,10 @@ static int __init smp_psurge_probe(void) /* All released cards using this HW design have 4 CPUs */ ncpus = 4; } else { - iounmap((void *) quad_base); + iounmap(quad_base); if ((in_8(hhead_base + HHEAD_CONFIG) & 0x02) == 0) { /* not a dual-cpu card */ - iounmap((void *) hhead_base); + iounmap(hhead_base); psurge_type = PSURGE_NONE; return 1; }