From ae95e485da176169646476f6495d9d1b875cad19 Mon Sep 17 00:00:00 2001 From: Mattias Nilsson Date: Fri, 12 Aug 2011 10:27:50 +0200 Subject: [PATCH] --- yaml --- r: 273424 b: refs/heads/master c: d65e12d70436cfb2728a78aec3f7bc1cd79eaa34 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/mfd/db8500-prcmu.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index f06630facbf6..beb2101cb509 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: a592c2e20fe2ba696cc7cd16d02abec8ac16ea41 +refs/heads/master: d65e12d70436cfb2728a78aec3f7bc1cd79eaa34 diff --git a/trunk/drivers/mfd/db8500-prcmu.c b/trunk/drivers/mfd/db8500-prcmu.c index dcc690efdc25..e2c4a26a9eb1 100644 --- a/trunk/drivers/mfd/db8500-prcmu.c +++ b/trunk/drivers/mfd/db8500-prcmu.c @@ -1840,6 +1840,16 @@ void __init prcmu_early_init(void) } } +static void __init init_prcm_registers(void) +{ + u32 val; + + val = readl(PRCM_A9PL_FORCE_CLKEN); + val &= ~(PRCM_A9PL_FORCE_CLKEN_PRCM_A9PL_FORCE_CLKEN | + PRCM_A9PL_FORCE_CLKEN_PRCM_A9AXI_FORCE_CLKEN); + writel(val, (PRCM_A9PL_FORCE_CLKEN)); +} + /* * Power domain switches (ePODs) modeled as regulators for the DB8500 SoC */ @@ -2038,6 +2048,8 @@ static int __init db8500_prcmu_probe(struct platform_device *pdev) if (ux500_is_svp()) return -ENODEV; + init_prcm_registers(); + /* Clean up the mailbox interrupts after pre-kernel code. */ writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);