From afc447fda77643c6235ff4f6b575a84e12a71825 Mon Sep 17 00:00:00 2001
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Date: Thu, 18 Dec 2008 19:37:23 +0300
Subject: [PATCH] --- yaml --- r: 127649 b: refs/heads/master c:
 94409d6e1088517b6d6c8e669c604cc86d08ac1b h: refs/heads/master i:   127647:
 7a366ac090d69235a7194531da1655e5e60edaf3 v: v3

---
 [refs]                                        |  2 +-
 .../powerpc/dts-bindings/fsl/board.txt        | 32 ++++++++++++++++++-
 2 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index a72aaf4f31ab..b1ef1c11555f 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 1b9e89046c31fd39d08742915b6bd72f6c239608
+refs/heads/master: 94409d6e1088517b6d6c8e669c604cc86d08ac1b
diff --git a/trunk/Documentation/powerpc/dts-bindings/fsl/board.txt b/trunk/Documentation/powerpc/dts-bindings/fsl/board.txt
index 81a917ef96e9..6c974d28eeb4 100644
--- a/trunk/Documentation/powerpc/dts-bindings/fsl/board.txt
+++ b/trunk/Documentation/powerpc/dts-bindings/fsl/board.txt
@@ -18,7 +18,7 @@ This is the memory-mapped registers for on board FPGA.
 
 Required properities:
 - compatible : should be "fsl,fpga-pixis".
-- reg : should contain the address and the lenght of the FPPGA register
+- reg : should contain the address and the length of the FPPGA register
   set.
 
 Example (MPC8610HPCD):
@@ -27,3 +27,33 @@ Example (MPC8610HPCD):
 		compatible = "fsl,fpga-pixis";
 		reg = <0xe8000000 32>;
 	};
+
+* Freescale BCSR GPIO banks
+
+Some BCSR registers act as simple GPIO controllers, each such
+register can be represented by the gpio-controller node.
+
+Required properities:
+- compatible : Should be "fsl,<board>-bcsr-gpio".
+- reg : Should contain the address and the length of the GPIO bank
+  register.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+  second cell is used to specify optional paramters (currently unused).
+- gpio-controller : Marks the port as GPIO controller.
+
+Example:
+
+	bcsr@1,0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "fsl,mpc8360mds-bcsr";
+		reg = <1 0 0x8000>;
+		ranges = <0 1 0 0x8000>;
+
+		bcsr13: gpio-controller@d {
+			#gpio-cells = <2>;
+			compatible = "fsl,mpc8360mds-bcsr-gpio";
+			reg = <0xd 1>;
+			gpio-controller;
+		};
+	};