From aff31fe090c9646120b484f09b2f79867cba73e5 Mon Sep 17 00:00:00 2001
From: Inki Dae <inki.dae@samsung.com>
Date: Tue, 29 Jan 2013 16:28:30 +0900
Subject: [PATCH] --- yaml --- r: 358343 b: refs/heads/master c:
 fe9e3137cffc880b5162f2cc039df48712c496bb h: refs/heads/master i:   358341:
 3bc3fec341359e4ab757dce5a70fb0c4bcb662c6   358339:
 d7fa09d42a4e39845990d43cbd940984e8df1c9c   358335:
 83a28e334b00e9aa74f69851f7dadec795c6d630 v: v3

---
 [refs]                                           |  2 +-
 trunk/drivers/gpu/drm/exynos/exynos_drm_iommu.h  |  2 +-
 trunk/drivers/gpu/drm/gma500/psb_intel_display.c | 12 ++++++------
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/[refs] b/[refs]
index 7cb58a27674a..396634c78162 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 907a773ba365daa9f86c6bb8cb11ddbf9b11a3d1
+refs/heads/master: fe9e3137cffc880b5162f2cc039df48712c496bb
diff --git a/trunk/drivers/gpu/drm/exynos/exynos_drm_iommu.h b/trunk/drivers/gpu/drm/exynos/exynos_drm_iommu.h
index 53b7deea8ab7..598e60f57d4b 100644
--- a/trunk/drivers/gpu/drm/exynos/exynos_drm_iommu.h
+++ b/trunk/drivers/gpu/drm/exynos/exynos_drm_iommu.h
@@ -14,7 +14,7 @@
 
 #define EXYNOS_DEV_ADDR_START	0x20000000
 #define EXYNOS_DEV_ADDR_SIZE	0x40000000
-#define EXYNOS_DEV_ADDR_ORDER	0x4
+#define EXYNOS_DEV_ADDR_ORDER	0x0
 
 #ifdef CONFIG_DRM_EXYNOS_IOMMU
 
diff --git a/trunk/drivers/gpu/drm/gma500/psb_intel_display.c b/trunk/drivers/gpu/drm/gma500/psb_intel_display.c
index 9edb1902a096..8033526bb53b 100644
--- a/trunk/drivers/gpu/drm/gma500/psb_intel_display.c
+++ b/trunk/drivers/gpu/drm/gma500/psb_intel_display.c
@@ -85,14 +85,14 @@ struct psb_intel_limit_t {
 #define I9XX_DOT_MAX		 400000
 #define I9XX_VCO_MIN		1400000
 #define I9XX_VCO_MAX		2800000
-#define I9XX_N_MIN		      1
-#define I9XX_N_MAX		      6
+#define I9XX_N_MIN		      3
+#define I9XX_N_MAX		      8
 #define I9XX_M_MIN		     70
 #define I9XX_M_MAX		    120
-#define I9XX_M1_MIN		      8
-#define I9XX_M1_MAX		     18
-#define I9XX_M2_MIN		      3
-#define I9XX_M2_MAX		      7
+#define I9XX_M1_MIN		     10
+#define I9XX_M1_MAX		     20
+#define I9XX_M2_MIN		      5
+#define I9XX_M2_MAX		      9
 #define I9XX_P_SDVO_DAC_MIN	      5
 #define I9XX_P_SDVO_DAC_MAX	     80
 #define I9XX_P_LVDS_MIN		      7