From b17ef6bd9a08b11633970c3596c61fa3ac4cd6f3 Mon Sep 17 00:00:00 2001
From: Thomas Abraham <thomas.ab@samsung.com>
Date: Sat, 2 Oct 2010 12:45:25 +0900
Subject: [PATCH] --- yaml --- r: 221077 b: refs/heads/master c:
 658bf4bef844c9a15e6700e1e27c939529f4a5ca h: refs/heads/master i:   221075:
 79d986a530a7ae9a26aba16ff63b16a0c886ccb8 v: v3

---
 [refs]                          | 2 +-
 trunk/arch/arm/plat-s5p/clock.c | 9 ---------
 2 files changed, 1 insertion(+), 10 deletions(-)

diff --git a/[refs] b/[refs]
index 93e30d1b8a35..2eb1582397c6 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: 5aed1f706b01ab27a307cf9983b2ee28d7d88919
+refs/heads/master: 658bf4bef844c9a15e6700e1e27c939529f4a5ca
diff --git a/trunk/arch/arm/plat-s5p/clock.c b/trunk/arch/arm/plat-s5p/clock.c
index 8aaf4e6b60c3..818800962694 100644
--- a/trunk/arch/arm/plat-s5p/clock.c
+++ b/trunk/arch/arm/plat-s5p/clock.c
@@ -88,14 +88,6 @@ struct clk clk_fout_vpll = {
 	.ctrlbit	= (1 << 31),
 };
 
-/* ARM clock */
-struct clk clk_arm = {
-	.name		= "armclk",
-	.id		= -1,
-	.rate		= 0,
-	.ctrlbit	= 0,
-};
-
 /* Possible clock sources for APLL Mux */
 static struct clk *clk_src_apll_list[] = {
 	[0] = &clk_fin_apll,
@@ -165,7 +157,6 @@ static struct clk *s5p_clks[] __initdata = {
 	&clk_fout_epll,
 	&clk_fout_dpll,
 	&clk_fout_vpll,
-	&clk_arm,
 	&clk_vpll,
 	&clk_xusbxti,
 };