From b183d2045c91f5ab7ea6c17249d9fe925ea92ed0 Mon Sep 17 00:00:00 2001 From: Hidetoshi Seto Date: Thu, 15 Apr 2010 13:17:33 +0900 Subject: [PATCH] --- yaml --- r: 197912 b: refs/heads/master c: f647a44f5725b0e6c8211096f4b49900164123ee h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/pci/pcie/aer/aer_inject.c | 2 +- trunk/drivers/pci/pcie/aer/aerdrv.c | 2 +- trunk/include/linux/pci_regs.h | 3 +-- 4 files changed, 4 insertions(+), 5 deletions(-) diff --git a/[refs] b/[refs] index 73a1389665e0..87650f084398 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 17e21854bd59862f4ee47d1c7e828549f782711b +refs/heads/master: f647a44f5725b0e6c8211096f4b49900164123ee diff --git a/trunk/drivers/pci/pcie/aer/aer_inject.c b/trunk/drivers/pci/pcie/aer/aer_inject.c index f8f425b8731d..909924692b8a 100644 --- a/trunk/drivers/pci/pcie/aer/aer_inject.c +++ b/trunk/drivers/pci/pcie/aer/aer_inject.c @@ -168,7 +168,7 @@ static u32 *find_pci_config_dword(struct aer_error *err, int where, target = &err->root_status; rw1cs = 1; break; - case PCI_ERR_ROOT_COR_SRC: + case PCI_ERR_ROOT_ERR_SRC: target = &err->source_id; break; } diff --git a/trunk/drivers/pci/pcie/aer/aerdrv.c b/trunk/drivers/pci/pcie/aer/aerdrv.c index b69dbdc36817..1a55c16e2f3f 100644 --- a/trunk/drivers/pci/pcie/aer/aerdrv.c +++ b/trunk/drivers/pci/pcie/aer/aerdrv.c @@ -210,7 +210,7 @@ irqreturn_t aer_irq(int irq, void *context) } /* Read error source and clear error status */ - pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_COR_SRC, &id); + pci_read_config_dword(pdev->port, pos + PCI_ERR_ROOT_ERR_SRC, &id); pci_write_config_dword(pdev->port, pos + PCI_ERR_ROOT_STATUS, status); /* Store error source for later DPC handler */ diff --git a/trunk/include/linux/pci_regs.h b/trunk/include/linux/pci_regs.h index c8f302991b66..dd0dd873f637 100644 --- a/trunk/include/linux/pci_regs.h +++ b/trunk/include/linux/pci_regs.h @@ -563,8 +563,7 @@ #define PCI_ERR_ROOT_FIRST_FATAL 0x00000010 /* First Fatal */ #define PCI_ERR_ROOT_NONFATAL_RCV 0x00000020 /* Non-Fatal Received */ #define PCI_ERR_ROOT_FATAL_RCV 0x00000040 /* Fatal Received */ -#define PCI_ERR_ROOT_COR_SRC 52 -#define PCI_ERR_ROOT_SRC 54 +#define PCI_ERR_ROOT_ERR_SRC 52 /* Error Source Identification */ /* Virtual Channel */ #define PCI_VC_PORT_REG1 4