From b244cf9946652011eec310658315caa7148740e4 Mon Sep 17 00:00:00 2001 From: Chris Zankel Date: Tue, 12 Feb 2008 13:10:40 -0800 Subject: [PATCH] --- yaml --- r: 85937 b: refs/heads/master c: 03dfa442e5aaf644bb9b3b506abbd76786867eb1 h: refs/heads/master i: 85935: 7b1c0cd52b1e34a9f79f658b803f2465cce07b2a v: v3 --- [refs] | 2 +- trunk/arch/xtensa/kernel/entry.S | 22 ---------------------- 2 files changed, 1 insertion(+), 23 deletions(-) diff --git a/[refs] b/[refs] index 67b248583010..2f71845e4522 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 3b4a49e21b0d8a69629623815a8caff3eb4cf9f7 +refs/heads/master: 03dfa442e5aaf644bb9b3b506abbd76786867eb1 diff --git a/trunk/arch/xtensa/kernel/entry.S b/trunk/arch/xtensa/kernel/entry.S index b4b14a579a3c..b51ddb0dcf28 100644 --- a/trunk/arch/xtensa/kernel/entry.S +++ b/trunk/arch/xtensa/kernel/entry.S @@ -28,7 +28,6 @@ /* Unimplemented features. */ -#undef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION #undef KERNEL_STACK_OVERFLOW_CHECK #undef PREEMPTIBLE_KERNEL #undef ALLOCA_EXCEPTION_IN_IRAM @@ -431,11 +430,8 @@ common_exception_return: _bbsi.l a4, TIF_NEED_RESCHED, 3f _bbci.l a4, TIF_SIGPENDING, 4f -#ifndef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION l32i a4, a1, PT_DEPC bgeui a4, VALID_DOUBLE_EXCEPTION_ADDRESS, 4f -#endif - /* Reenable interrupts and call do_signal() */ wsr a3, PS @@ -1247,16 +1243,6 @@ fast_syscall_spill_registers_fixup: * Note: This frame might be the same as above. */ -#ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION - /* Restore registers we precautiously saved. - * We have the value of the 'right' a3 - */ - - l32i a7, a2, PT_AREG5 - l32i a11, a2, PT_AREG6 - l32i a15, a2, PT_AREG7 -#endif - /* Setup stack pointer. */ addi a2, a2, -PT_USER_SIZE @@ -1290,14 +1276,6 @@ fast_syscall_spill_registers_fixup_return: s32i a2, a3, EXC_TABLE_PARAM l32i a2, a3, EXC_TABLE_KSTK -#ifdef SIGNAL_HANDLING_IN_DOUBLE_EXCEPTION - /* Save registers again that might be clobbered. */ - - s32i a7, a2, PT_AREG5 - s32i a11, a2, PT_AREG6 - s32i a15, a2, PT_AREG7 -#endif - /* Load WB at the time the exception occurred. */ rsr a3, SAR # WB is still in SAR