diff --git a/[refs] b/[refs] index 55b63dde4e2f..79748086370b 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 928ee513c2fc39799cb13302bc02344a849fa37c +refs/heads/master: e25db641c0e6dd49c5db24dbe154048d4a466727 diff --git a/trunk/Documentation/DocBook/genericirq.tmpl b/trunk/Documentation/DocBook/genericirq.tmpl index 0f4a4b6321e4..4215f69ce7e6 100644 --- a/trunk/Documentation/DocBook/genericirq.tmpl +++ b/trunk/Documentation/DocBook/genericirq.tmpl @@ -303,10 +303,10 @@ desc->status |= running; do { if (desc->status & masked) desc->chip->enable(); - desc-status &= ~pending; + desc->status &= ~pending; handle_IRQ_event(desc->action); } while (status & pending); -desc-status &= ~running; +desc->status &= ~running; desc->chip->end(); diff --git a/trunk/Documentation/cachetlb.txt b/trunk/Documentation/cachetlb.txt index 53245c429f7d..73e794f0ff09 100644 --- a/trunk/Documentation/cachetlb.txt +++ b/trunk/Documentation/cachetlb.txt @@ -179,10 +179,21 @@ Here are the routines, one by one: lines associated with 'mm'. This interface is used to handle whole address space - page table operations such as what happens during - fork, exit, and exec. + page table operations such as what happens during exit and exec. + +2) void flush_cache_dup_mm(struct mm_struct *mm) + + This interface flushes an entire user address space from + the caches. That is, after running, there will be no cache + lines associated with 'mm'. + + This interface is used to handle whole address space + page table operations such as what happens during fork. + + This option is separate from flush_cache_mm to allow some + optimizations for VIPT caches. -2) void flush_cache_range(struct vm_area_struct *vma, +3) void flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) Here we are flushing a specific range of (user) virtual @@ -199,7 +210,7 @@ Here are the routines, one by one: call flush_cache_page (see below) for each entry which may be modified. -3) void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn) +4) void flush_cache_page(struct vm_area_struct *vma, unsigned long addr, unsigned long pfn) This time we need to remove a PAGE_SIZE sized range from the cache. The 'vma' is the backing structure used by @@ -220,7 +231,7 @@ Here are the routines, one by one: This is used primarily during fault processing. -4) void flush_cache_kmaps(void) +5) void flush_cache_kmaps(void) This routine need only be implemented if the platform utilizes highmem. It will be called right before all of the kmaps @@ -232,7 +243,7 @@ Here are the routines, one by one: This routing should be implemented in asm/highmem.h -5) void flush_cache_vmap(unsigned long start, unsigned long end) +6) void flush_cache_vmap(unsigned long start, unsigned long end) void flush_cache_vunmap(unsigned long start, unsigned long end) Here in these two interfaces we are flushing a specific range diff --git a/trunk/Documentation/feature-removal-schedule.txt b/trunk/Documentation/feature-removal-schedule.txt index 64ce44da5936..30f3c8c9c12a 100644 --- a/trunk/Documentation/feature-removal-schedule.txt +++ b/trunk/Documentation/feature-removal-schedule.txt @@ -151,15 +151,6 @@ Who: Thomas Gleixner --------------------------- -What: I2C interface of the it87 driver -When: January 2007 -Why: The ISA interface is faster and should be always available. The I2C - probing is also known to cause trouble in at least one case (see - bug #5889.) -Who: Jean Delvare - ---------------------------- - What: Unused EXPORT_SYMBOL/EXPORT_SYMBOL_GPL exports (temporary transition config option provided until then) The transition config option will also be removed at the same time. @@ -216,22 +207,6 @@ Who: Thomas Gleixner --------------------------- -What: Bridge netfilter deferred IPv4/IPv6 output hook calling -When: January 2007 -Why: The deferred output hooks are a layering violation causing unusual - and broken behaviour on bridge devices. Examples of things they - break include QoS classifation using the MARK or CLASSIFY targets, - the IPsec policy match and connection tracking with VLANs on a - bridge. Their only use is to enable bridge output port filtering - within iptables with the physdev match, which can also be done by - combining iptables and ebtables using netfilter marks. Until it - will get removed the hook deferral is disabled by default and is - only enabled when needed. - -Who: Patrick McHardy - ---------------------------- - What: PHYSDEVPATH, PHYSDEVBUS, PHYSDEVDRIVER in the uevent environment When: October 2008 Why: The stacking of class devices makes these values misleading and diff --git a/trunk/Documentation/filesystems/bfs.txt b/trunk/Documentation/filesystems/bfs.txt index d2841e0bcf02..ea825e178e79 100644 --- a/trunk/Documentation/filesystems/bfs.txt +++ b/trunk/Documentation/filesystems/bfs.txt @@ -54,4 +54,4 @@ The first 4 bytes should be 0x1badface. If you have any patches, questions or suggestions regarding this BFS implementation please contact the author: -Tigran A. Aivazian +Tigran Aivazian diff --git a/trunk/Documentation/hwmon/f71805f b/trunk/Documentation/hwmon/f71805f index 2ca69df669c3..bfd0f154959c 100644 --- a/trunk/Documentation/hwmon/f71805f +++ b/trunk/Documentation/hwmon/f71805f @@ -6,6 +6,10 @@ Supported chips: Prefix: 'f71805f' Addresses scanned: none, address read from Super I/O config space Datasheet: Provided by Fintek on request + * Fintek F71872F/FG + Prefix: 'f71872f' + Addresses scanned: none, address read from Super I/O config space + Datasheet: Provided by Fintek on request Author: Jean Delvare @@ -13,8 +17,8 @@ Thanks to Denis Kieft from Barracuda Networks for the donation of a test system (custom Jetway K8M8MS motherboard, with CPU and RAM) and for providing initial documentation. -Thanks to Kris Chen from Fintek for answering technical questions and -providing additional documentation. +Thanks to Kris Chen and Aaron Huang from Fintek for answering technical +questions and providing additional documentation. Thanks to Chris Lin from Jetway for providing wiring schematics and answering technical questions. @@ -28,8 +32,11 @@ capabilities. It can monitor up to 9 voltages (counting its own power source), 3 fans and 3 temperature sensors. This chip also has fan controlling features, using either DC or PWM, in -three different modes (one manual, two automatic). The driver doesn't -support these features yet. +three different modes (one manual, two automatic). + +The Fintek F71872F/FG Super I/O chip is almost the same, with two +additional internal voltages monitored (VSB and battery). It also features +6 VID inputs. The VID inputs are not yet supported by this driver. The driver assumes that no more than one chip is present, which seems reasonable. @@ -42,7 +49,8 @@ Voltages are sampled by an 8-bit ADC with a LSB of 8 mV. The supported range is thus from 0 to 2.040 V. Voltage values outside of this range need external resistors. An exception is in0, which is used to monitor the chip's own power source (+3.3V), and is divided internally by a -factor 2. +factor 2. For the F71872F/FG, in9 (VSB) and in10 (battery) are also +divided internally by a factor 2. The two LSB of the voltage limit registers are not used (always 0), so you can only set the limits in steps of 32 mV (before scaling). @@ -61,9 +69,12 @@ in5 VIN5 +12V 200K 20K 11.00 1.05 V in6 VIN6 VCC1.5V 10K - 1.00 1.50 V in7 VIN7 VCORE 10K - 1.00 ~1.40 V (1) in8 VIN8 VSB5V 200K 47K 1.00 0.95 V +in10 VSB VSB3.3V int. int. 2.00 1.65 V (3) +in9 VBAT VBATTERY int. int. 2.00 1.50 V (3) (1) Depends on your hardware setup. (2) Obviously not correct, swapping R1 and R2 would make more sense. +(3) F71872F/FG only. These values can be used as hints at best, as motherboard manufacturers are free to use a completely different setup. As a matter of fact, the @@ -103,3 +114,38 @@ sensor. Each channel can be used for connecting either a thermal diode or a thermistor. The driver reports the currently selected mode, but doesn't allow changing it. In theory, the BIOS should have configured everything properly. + + +Fan Control +----------- + +Both PWM (pulse-width modulation) and DC fan speed control methods are +supported. The right one to use depends on external circuitry on the +motherboard, so the driver assumes that the BIOS set the method +properly. The driver will report the method, but won't let you change +it. + +When the PWM method is used, you can select the operating frequency, +from 187.5 kHz (default) to 31 Hz. The best frequency depends on the +fan model. As a rule of thumb, lower frequencies seem to give better +control, but may generate annoying high-pitch noise. Fintek recommends +not going below 1 kHz, as the fan tachometers get confused by lower +frequencies as well. + +When the DC method is used, Fintek recommends not going below 5 V, which +corresponds to a pwm value of 106 for the driver. The driver doesn't +enforce this limit though. + +Three different fan control modes are supported: + +* Manual mode + You ask for a specific PWM duty cycle or DC voltage. + +* Fan speed mode + You ask for a specific fan speed. This mode assumes that pwm1 + corresponds to fan1, pwm2 to fan2 and pwm3 to fan3. + +* Temperature mode + You define 3 temperature/fan speed trip points, and the fan speed is + adjusted depending on the measured temperature, using interpolation. + This mode is not yet supported by the driver. diff --git a/trunk/Documentation/hwmon/it87 b/trunk/Documentation/hwmon/it87 index e783fd62e308..74a80992d237 100644 --- a/trunk/Documentation/hwmon/it87 +++ b/trunk/Documentation/hwmon/it87 @@ -9,8 +9,7 @@ Supported chips: http://www.ite.com.tw/ * IT8712F Prefix: 'it8712' - Addresses scanned: I2C 0x2d - from Super I/O config space (8 I/O ports) + Addresses scanned: from Super I/O config space (8 I/O ports) Datasheet: Publicly available at the ITE website http://www.ite.com.tw/ * IT8716F @@ -53,6 +52,18 @@ Module Parameters misconfigured by BIOS - PWM values would be inverted. This option tries to fix this. Please contact your BIOS manufacturer and ask him for fix. + +Hardware Interfaces +------------------- + +All the chips suported by this driver are LPC Super-I/O chips, accessed +through the LPC bus (ISA-like I/O ports). The IT8712F additionally has an +SMBus interface to the hardware monitoring functions. This driver no +longer supports this interface though, as it is slower and less reliable +than the ISA access, and was only available on a small number of +motherboard models. + + Description ----------- diff --git a/trunk/Documentation/hwmon/k8temp b/trunk/Documentation/hwmon/k8temp index 30d123b8d920..0005c7166146 100644 --- a/trunk/Documentation/hwmon/k8temp +++ b/trunk/Documentation/hwmon/k8temp @@ -8,7 +8,7 @@ Supported chips: Datasheet: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/32559.pdf Author: Rudolf Marek -Contact: Rudolf Marek +Contact: Rudolf Marek Description ----------- diff --git a/trunk/Documentation/hwmon/pc87427 b/trunk/Documentation/hwmon/pc87427 new file mode 100644 index 000000000000..9a0708f9f49e --- /dev/null +++ b/trunk/Documentation/hwmon/pc87427 @@ -0,0 +1,38 @@ +Kernel driver pc87427 +===================== + +Supported chips: + * National Semiconductor PC87427 + Prefix: 'pc87427' + Addresses scanned: none, address read from Super I/O config space + Datasheet: http://www.winbond.com.tw/E-WINBONDHTM/partner/apc_007.html + +Author: Jean Delvare + +Thanks to Amir Habibi at Candelis for setting up a test system, and to +Michael Kress for testing several iterations of this driver. + + +Description +----------- + +The National Semiconductor Super I/O chip includes complete hardware +monitoring capabilities. It can monitor up to 18 voltages, 8 fans and +6 temperature sensors. Only the fans are supported at the moment. + +This chip also has fan controlling features, which are not yet supported +by this driver either. + +The driver assumes that no more than one chip is present, which seems +reasonable. + + +Fan Monitoring +-------------- + +Fan rotation speeds are reported as 14-bit values from a gated clock +signal. Speeds down to 83 RPM can be measured. + +An alarm is triggered if the rotation speed drops below a programmable +limit. Another alarm is triggered if the speed is too low to to be measured +(including stalled or missing fan). diff --git a/trunk/Documentation/hwmon/sysfs-interface b/trunk/Documentation/hwmon/sysfs-interface index d1d390aaf620..efef3b962cd3 100644 --- a/trunk/Documentation/hwmon/sysfs-interface +++ b/trunk/Documentation/hwmon/sysfs-interface @@ -208,12 +208,14 @@ temp[1-*]_auto_point[1-*]_temp_hyst **************** temp[1-*]_type Sensor type selection. - Integers 1 to 4 or thermistor Beta value (typically 3435) + Integers 1 to 6 or thermistor Beta value (typically 3435) RW 1: PII/Celeron Diode 2: 3904 transistor 3: thermal diode 4: thermistor (default/unknown Beta) + 5: AMD AMDSI + 6: Intel PECI Not all types are supported by all chips temp[1-*]_max Temperature max value. diff --git a/trunk/Documentation/hwmon/w83627ehf b/trunk/Documentation/hwmon/w83627ehf index caa610a297e8..8a15a7408753 100644 --- a/trunk/Documentation/hwmon/w83627ehf +++ b/trunk/Documentation/hwmon/w83627ehf @@ -10,7 +10,7 @@ Supported chips: Authors: Jean Delvare Yuan Mu (Winbond) - Rudolf Marek + Rudolf Marek Description ----------- diff --git a/trunk/Documentation/hwmon/w83791d b/trunk/Documentation/hwmon/w83791d index 19b2ed739fa1..db9881df88a5 100644 --- a/trunk/Documentation/hwmon/w83791d +++ b/trunk/Documentation/hwmon/w83791d @@ -18,7 +18,7 @@ Credits: and Mark Studebaker w83792d.c: Chunhao Huang , - Rudolf Marek + Rudolf Marek Additional contributors: Sven Anders diff --git a/trunk/Documentation/hwmon/w83793 b/trunk/Documentation/hwmon/w83793 new file mode 100644 index 000000000000..45e5408340e0 --- /dev/null +++ b/trunk/Documentation/hwmon/w83793 @@ -0,0 +1,110 @@ +Kernel driver w83793 +==================== + +Supported chips: + * Winbond W83793G/W83793R + Prefix: 'w83793' + Addresses scanned: I2C 0x2c - 0x2f + Datasheet: Still not published + +Authors: + Yuan Mu (Winbond Electronics) + Rudolf Marek + + +Module parameters +----------------- + +* reset int + (default 0) + This parameter is not recommended, it will lose motherboard specific + settings. Use 'reset=1' to reset the chip when loading this module. + +* force_subclients=bus,caddr,saddr1,saddr2 + This is used to force the i2c addresses for subclients of + a certain chip. Typical usage is `force_subclients=0,0x2f,0x4a,0x4b' + to force the subclients of chip 0x2f on bus 0 to i2c addresses + 0x4a and 0x4b. + + +Description +----------- + +This driver implements support for Winbond W83793G/W83793R chips. + +* Exported features + This driver exports 10 voltage sensors, up to 12 fan tachometer inputs, + 6 remote temperatures, up to 8 sets of PWM fan controls, SmartFan + (automatic fan speed control) on all temperature/PWM combinations, 2 + sets of 6-pin CPU VID input. + +* Sensor resolutions + If your motherboard maker used the reference design, the resolution of + voltage0-2 is 2mV, resolution of voltage3/4/5 is 16mV, 8mV for voltage6, + 24mV for voltage7/8. Temp1-4 have a 0.25 degree Celsius resolution, + temp5-6 have a 1 degree Celsiis resolution. + +* Temperature sensor types + Temp1-4 have 3 possible types. It can be read from (and written to) + temp[1-4]_type. + - If the value of 0, the related temperature channel stops + monitoring. + - If the value is 3, it starts monitoring using a remote termal diode + (default). + - If the value is 5, it starts monitoring using the temperature sensor + in AMD CPU and get result by AMDSI. + - If the value is 6, it starts monitoring using the temperature sensor + in Intel CPU and get result by PECI. + Temp5-6 can be connected to external thermistors (value of + temp[5-6]_type is 4). They can also be disabled (value is 0). + +* Alarm mechanism + For voltage sensors, an alarm triggers if the measured value is below + the low voltage limit or over the high voltage limit. + For temperature sensors, an alarm triggers if the measured value goes + above the high temperature limit, and wears off only after the measured + value drops below the hysteresis value. + For fan sensors, an alarm triggers if the measured value is below the + low speed limit. + +* SmartFan/PWM control + If you want to set a pwm fan to manual mode, you just need to make sure it + is not controlled by any temp channel, for example, you want to set fan1 + to manual mode, you need to check the value of temp[1-6]_fan_map, make + sure bit 0 is cleared in the 6 values. And then set the pwm1 value to + control the fan. + + Each temperature channel can control all the 8 PWM outputs (by setting the + corresponding bit in tempX_fan_map), you can set the temperature channel + mode using temp[1-6]_pwm_enable, 2 is Thermal Cruise mode and 3 + is the SmartFanII mode. Temperature channels will try to speed up or + slow down all controlled fans, this means one fan can receive different + PWM value requests from different temperature channels, but the chip + will always pick the safest (max) PWM value for each fan. + + In Thermal Cruise mode, the chip attempts to keep the temperature at a + predefined value, within a tolerance margin. So if tempX_input > + thermal_cruiseX + toleranceX, the chip will increase the PWM value, + if tempX_input < thermal_cruiseX - toleranceX, the chip will decrease + the PWM value. If the temperature is within the tolerance range, the PWM + value is left unchanged. + + SmartFanII works differently, you have to define up to 7 PWM, temperature + trip points, defining a PWM/temperature curve which the chip will follow. + While not fundamentally different from the Thermal Cruise mode, the + implementation is quite different, giving you a finer-grained control. + +* Chassis + If the case open alarm triggers, it will stay in this state unless cleared + by any write to the sysfs file "chassis". + +* VID and VRM + The VRM version is detected automatically, don't modify the it unless you + *do* know the cpu VRM version and it's not properly detected. + + +Notes +----- + + Only Fan1-5 and PWM1-3 are guaranteed to always exist, other fan inputs and + PWM outputs may or may not exist depending on the chip pin configuration. diff --git a/trunk/Documentation/kernel-parameters.txt b/trunk/Documentation/kernel-parameters.txt index d8323b8893c3..ef69c75780bf 100644 --- a/trunk/Documentation/kernel-parameters.txt +++ b/trunk/Documentation/kernel-parameters.txt @@ -1656,6 +1656,12 @@ and is between 256 and 4096 characters. It is defined in the file sym53c416= [HW,SCSI] See header of drivers/scsi/sym53c416.c. + sysrq_always_enabled + [KNL] + Ignore sysrq setting - this boot parameter will + neutralize any effect of /proc/sys/kernel/sysrq. + Useful for debugging. + t128= [HW,SCSI] See header of drivers/scsi/t128.c. diff --git a/trunk/MAINTAINERS b/trunk/MAINTAINERS index 8a0bfeca55c9..dea5b2a6de0a 100644 --- a/trunk/MAINTAINERS +++ b/trunk/MAINTAINERS @@ -277,7 +277,7 @@ S: Maintained ALI1563 I2C DRIVER P: Rudolf Marek -M: r.marek@sh.cvut.cz +M: r.marek@assembler.cz L: i2c@lm-sensors.org S: Maintained @@ -296,6 +296,13 @@ L: info-linux@geode.amd.com W: http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2452_11363,00.html S: Supported +AMS (Apple Motion Sensor) DRIVER +P: Stelian Pop +M: stelian@popies.net +P: Michael Hanselmann +M: linux-kernel@hansmi.ch +S: Supported + AMSO1100 RNIC DRIVER P: Tom Tucker M: tom@opengridcomputing.com @@ -1747,6 +1754,13 @@ W: http://nfs.sourceforge.net/ W: http://www.cse.unsw.edu.au/~neilb/patches/linux-devel/ S: Maintained +KERNEL VIRTUAL MACHINE (KVM) +P: Avi Kivity +M: avi@qumranet.com +L: kvm-devel@lists.sourceforge.net +W: kvm.sourceforge.net +S: Supported + KEXEC P: Eric Biederman M: ebiederm@xmission.com @@ -3429,6 +3443,12 @@ M: bezaur@gmail.com L: lm-sensors@lm-sensors.org S: Maintained +W83793 HARDWARE MONITORING DRIVER +P: Rudolf Marek +M: r.marek@assembler.cz +L: lm-sensors@lm-sensors.org +S: Maintained + W83L51xD SD/MMC CARD INTERFACE DRIVER P: Pierre Ossman M: drzeus-wbsd@drzeus.cx diff --git a/trunk/Makefile b/trunk/Makefile index 4eabaa8afbff..4a4720387936 100644 --- a/trunk/Makefile +++ b/trunk/Makefile @@ -1,7 +1,7 @@ VERSION = 2 PATCHLEVEL = 6 -SUBLEVEL = 19 -EXTRAVERSION = +SUBLEVEL = 20 +EXTRAVERSION =-rc1 NAME=Avast! A bilge rat! # *DOCUMENTATION* @@ -496,11 +496,6 @@ else CFLAGS += -fomit-frame-pointer endif -ifdef CONFIG_UNWIND_INFO -CFLAGS += -fasynchronous-unwind-tables -LDFLAGS_vmlinux += --eh-frame-hdr -endif - ifdef CONFIG_DEBUG_INFO CFLAGS += -g endif @@ -1390,12 +1385,18 @@ endif #ifeq ($(mixed-targets),1) PHONY += checkstack kernelrelease kernelversion -# Use $(SUBARCH) here instead of $(ARCH) so that this works for UML. -# In the UML case, $(SUBARCH) is the name of the underlying -# architecture, while for all other arches, it is the same as $(ARCH). +# UML needs a little special treatment here. It wants to use the host +# toolchain, so needs $(SUBARCH) passed to checkstack.pl. Everyone +# else wants $(ARCH), including people doing cross-builds, which means +# that $(SUBARCH) doesn't work here. +ifeq ($(ARCH), um) +CHECKSTACK_ARCH := $(SUBARCH) +else +CHECKSTACK_ARCH := $(ARCH) +endif checkstack: $(OBJDUMP) -d vmlinux $$(find . -name '*.ko') | \ - $(PERL) $(src)/scripts/checkstack.pl $(SUBARCH) + $(PERL) $(src)/scripts/checkstack.pl $(CHECKSTACK_ARCH) kernelrelease: $(if $(wildcard include/config/kernel.release), $(Q)echo $(KERNELRELEASE), \ diff --git a/trunk/arch/arm/Kconfig b/trunk/arch/arm/Kconfig index aa1d400d721a..6783c2e5512d 100644 --- a/trunk/arch/arm/Kconfig +++ b/trunk/arch/arm/Kconfig @@ -740,7 +740,7 @@ config XIP_PHYS_ADDR endmenu -if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP) +if (ARCH_SA1100 || ARCH_INTEGRATOR || ARCH_OMAP || ARCH_IMX ) menu "CPU Frequency scaling" @@ -767,6 +767,15 @@ config CPU_FREQ_INTEGRATOR If in doubt, say Y. +config CPU_FREQ_IMX + tristate "CPUfreq driver for i.MX CPUs" + depends on ARCH_IMX && CPU_FREQ + default n + help + This enables the CPUfreq driver for i.MX CPUs. + + If in doubt, say N. + endmenu endif @@ -945,6 +954,8 @@ source "drivers/video/Kconfig" source "sound/Kconfig" +source "drivers/hid/Kconfig" + source "drivers/usb/Kconfig" source "drivers/mmc/Kconfig" diff --git a/trunk/arch/arm/kernel/apm.c b/trunk/arch/arm/kernel/apm.c index a11fb9a40c04..2c37b70b17ab 100644 --- a/trunk/arch/arm/kernel/apm.c +++ b/trunk/arch/arm/kernel/apm.c @@ -423,7 +423,7 @@ static int apm_open(struct inode * inode, struct file * filp) { struct apm_user *as; - as = (struct apm_user *)kzalloc(sizeof(*as), GFP_KERNEL); + as = kzalloc(sizeof(*as), GFP_KERNEL); if (as) { /* * XXX - this is a tiny bit broken, when we consider BSD diff --git a/trunk/arch/arm/kernel/calls.S b/trunk/arch/arm/kernel/calls.S index 3173924a9b60..e8f74363328c 100644 --- a/trunk/arch/arm/kernel/calls.S +++ b/trunk/arch/arm/kernel/calls.S @@ -331,6 +331,19 @@ CALL(sys_mbind) /* 320 */ CALL(sys_get_mempolicy) CALL(sys_set_mempolicy) + CALL(sys_openat) + CALL(sys_mkdirat) + CALL(sys_mknodat) +/* 325 */ CALL(sys_fchownat) + CALL(sys_futimesat) + CALL(sys_fstatat64) + CALL(sys_unlinkat) + CALL(sys_renameat) +/* 330 */ CALL(sys_linkat) + CALL(sys_symlinkat) + CALL(sys_readlinkat) + CALL(sys_fchmodat) + CALL(sys_faccessat) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/trunk/arch/arm/kernel/ecard.c b/trunk/arch/arm/kernel/ecard.c index a786f769035d..71257e3d513f 100644 --- a/trunk/arch/arm/kernel/ecard.c +++ b/trunk/arch/arm/kernel/ecard.c @@ -353,7 +353,7 @@ int ecard_readchunk(struct in_chunk_dir *cd, ecard_t *ec, int id, int num) } if (c_id(&excd) == 0x80) { /* loader */ if (!ec->loader) { - ec->loader = (loader_t)kmalloc(c_len(&excd), + ec->loader = kmalloc(c_len(&excd), GFP_KERNEL); if (ec->loader) ecard_readbytes(ec->loader, ec, diff --git a/trunk/arch/arm/kernel/head.S b/trunk/arch/arm/kernel/head.S index bda0748ffb00..d994561816a1 100644 --- a/trunk/arch/arm/kernel/head.S +++ b/trunk/arch/arm/kernel/head.S @@ -22,30 +22,31 @@ #include #include -#define KERNEL_RAM_ADDR (PAGE_OFFSET + TEXT_OFFSET) +#define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET) +#define KERNEL_RAM_PADDR (PHYS_OFFSET + TEXT_OFFSET) /* * swapper_pg_dir is the virtual address of the initial page table. - * We place the page tables 16K below KERNEL_RAM_ADDR. Therefore, we must - * make sure that KERNEL_RAM_ADDR is correctly set. Currently, we expect + * We place the page tables 16K below KERNEL_RAM_VADDR. Therefore, we must + * make sure that KERNEL_RAM_VADDR is correctly set. Currently, we expect * the least significant 16 bits to be 0x8000, but we could probably - * relax this restriction to KERNEL_RAM_ADDR >= PAGE_OFFSET + 0x4000. + * relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x4000. */ -#if (KERNEL_RAM_ADDR & 0xffff) != 0x8000 -#error KERNEL_RAM_ADDR must start at 0xXXXX8000 +#if (KERNEL_RAM_VADDR & 0xffff) != 0x8000 +#error KERNEL_RAM_VADDR must start at 0xXXXX8000 #endif .globl swapper_pg_dir - .equ swapper_pg_dir, KERNEL_RAM_ADDR - 0x4000 + .equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000 .macro pgtbl, rd - ldr \rd, =(__virt_to_phys(KERNEL_RAM_ADDR - 0x4000)) + ldr \rd, =(KERNEL_RAM_PADDR - 0x4000) .endm #ifdef CONFIG_XIP_KERNEL #define TEXTADDR XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) #else -#define TEXTADDR KERNEL_RAM_ADDR +#define TEXTADDR KERNEL_RAM_VADDR #endif /* diff --git a/trunk/arch/arm/kernel/setup.c b/trunk/arch/arm/kernel/setup.c index 238dd9b6db84..cf2bd4242803 100644 --- a/trunk/arch/arm/kernel/setup.c +++ b/trunk/arch/arm/kernel/setup.c @@ -354,9 +354,6 @@ static void __init setup_processor(void) #ifndef CONFIG_ARM_THUMB elf_hwcap &= ~HWCAP_THUMB; #endif -#ifndef CONFIG_VFP - elf_hwcap &= ~HWCAP_VFP; -#endif cpu_proc_init(); } diff --git a/trunk/arch/arm/mach-at91rm9200/at91sam9260_devices.c b/trunk/arch/arm/mach-at91rm9200/at91sam9260_devices.c index a6c596dc4516..f42d3a40ec3c 100644 --- a/trunk/arch/arm/mach-at91rm9200/at91sam9260_devices.c +++ b/trunk/arch/arm/mach-at91rm9200/at91sam9260_devices.c @@ -18,6 +18,7 @@ #include #include #include +#include #include "generic.h" diff --git a/trunk/arch/arm/mach-at91rm9200/board-sam9260ek.c b/trunk/arch/arm/mach-at91rm9200/board-sam9260ek.c index ffca9bdec37b..da5d58ac870b 100644 --- a/trunk/arch/arm/mach-at91rm9200/board-sam9260ek.c +++ b/trunk/arch/arm/mach-at91rm9200/board-sam9260ek.c @@ -119,6 +119,7 @@ static struct spi_board_info ek_spi_devices[] = { * MACB Ethernet device */ static struct __initdata eth_platform_data ek_macb_data = { + .phy_irq_pin = AT91_PIN_PA7, .is_rmii = 1, }; diff --git a/trunk/arch/arm/mach-imx/Makefile b/trunk/arch/arm/mach-imx/Makefile index 0b27d79f2efd..02272aa36e90 100644 --- a/trunk/arch/arm/mach-imx/Makefile +++ b/trunk/arch/arm/mach-imx/Makefile @@ -9,6 +9,8 @@ obj-y += irq.o time.o dma.o generic.o +obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o + # Specific board support obj-$(CONFIG_ARCH_MX1ADS) += mx1ads.o diff --git a/trunk/arch/arm/mach-imx/cpufreq.c b/trunk/arch/arm/mach-imx/cpufreq.c new file mode 100644 index 000000000000..ac5f99895660 --- /dev/null +++ b/trunk/arch/arm/mach-imx/cpufreq.c @@ -0,0 +1,287 @@ +/* + * cpu.c: clock scaling for the iMX + * + * Copyright (C) 2000 2001, The Delft University of Technology + * Copyright (c) 2004 Sascha Hauer + * Copyright (C) 2006 Inky Lung + * Copyright (C) 2006 Pavel Pisa, PiKRON + * + * Based on SA1100 version written by: + * - Johan Pouwelse (J.A.Pouwelse@its.tudelft.nl): initial version + * - Erik Mouw (J.A.K.Mouw@its.tudelft.nl): + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +/*#define DEBUG*/ + +#include +#include +#include +#include +#include + +#include + +#include "generic.h" + +#ifndef __val2mfld +#define __val2mfld(mask,val) (((mask)&~((mask)<<1))*(val)&(mask)) +#endif +#ifndef __mfld2val +#define __mfld2val(mask,val) (((val)&(mask))/((mask)&~((mask)<<1))) +#endif + +#define CR_920T_CLOCK_MODE 0xC0000000 +#define CR_920T_FASTBUS_MODE 0x00000000 +#define CR_920T_ASYNC_MODE 0xC0000000 + +static u32 mpctl0_at_boot; + +static void imx_set_async_mode(void) +{ + adjust_cr(CR_920T_CLOCK_MODE, CR_920T_ASYNC_MODE); +} + +static void imx_set_fastbus_mode(void) +{ + adjust_cr(CR_920T_CLOCK_MODE, CR_920T_FASTBUS_MODE); +} + +static void imx_set_mpctl0(u32 mpctl0) +{ + unsigned long flags; + + if (mpctl0 == 0) { + local_irq_save(flags); + CSCR &= ~CSCR_MPEN; + local_irq_restore(flags); + return; + } + + local_irq_save(flags); + MPCTL0 = mpctl0; + CSCR |= CSCR_MPEN; + local_irq_restore(flags); +} + +/** + * imx_compute_mpctl - compute new PLL parameters + * @new_mpctl: pointer to location assigned by new PLL control register value + * @cur_mpctl: current PLL control register parameters + * @freq: required frequency in Hz + * @relation: is one of %CPUFREQ_RELATION_L (supremum) + * and %CPUFREQ_RELATION_H (infimum) + */ +long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation) +{ + u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512); + u32 mfi; + u32 mfn; + u32 mfd; + u32 pd; + unsigned long long ll; + long l; + long quot; + + /* Fdppl=2*Fref*(MFI+MFN/(MFD+1))/(PD+1) */ + /* PD=<0,15>, MFD=<1,1023>, MFI=<5,15> MFN=<0,1022> */ + + if (cur_mpctl) { + mfd = ((cur_mpctl >> 16) & 0x3ff) + 1; + pd = ((cur_mpctl >> 26) & 0xf) + 1; + } else { + pd=2; mfd=313; + } + + /* pd=2; mfd=313; mfi=8; mfn=183; */ + /* (MFI+MFN/(MFD)) = Fdppl / (2*Fref) * (PD); */ + + quot = (f_ref + (1 << 9)) >> 10; + l = (freq * pd + quot) / (2 * quot); + mfi = l >> 10; + mfn = ((l & ((1 << 10) - 1)) * mfd + (1 << 9)) >> 10; + + mfd -= 1; + pd -= 1; + + *new_mpctl = ((mfi & 0xf) << 10) | (mfn & 0x3ff) | ((mfd & 0x3ff) << 16) + | ((pd & 0xf) << 26); + + ll = 2 * (unsigned long long)f_ref * ( (mfi<<16) + (mfn<<16) / (mfd+1) ); + quot = (pd+1) * (1<<16); + ll += quot / 2; + do_div(ll, quot); + freq = ll; + + pr_debug(KERN_DEBUG "imx: new PLL parameters pd=%d mfd=%d mfi=%d mfn=%d, freq=%ld\n", + pd, mfd, mfi, mfn, freq); + + return freq; +} + + +static int imx_verify_speed(struct cpufreq_policy *policy) +{ + if (policy->cpu != 0) + return -EINVAL; + + cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); + + return 0; +} + +static unsigned int imx_get_speed(unsigned int cpu) +{ + unsigned int freq; + unsigned int cr; + unsigned int cscr; + unsigned int bclk_div; + + if (cpu) + return 0; + + cscr = CSCR; + bclk_div = __mfld2val(CSCR_BCLK_DIV, cscr) + 1; + cr = get_cr(); + + if((cr & CR_920T_CLOCK_MODE) == CR_920T_FASTBUS_MODE) { + freq = imx_get_system_clk(); + freq = (freq + bclk_div/2) / bclk_div; + } else { + freq = imx_get_mcu_clk(); + if (cscr & CSCR_MPU_PRESC) + freq /= 2; + } + + freq = (freq + 500) / 1000; + + return freq; +} + +static int imx_set_target(struct cpufreq_policy *policy, + unsigned int target_freq, + unsigned int relation) +{ + struct cpufreq_freqs freqs; + u32 mpctl0 = 0; + u32 cscr; + unsigned long flags; + long freq; + long sysclk; + unsigned int bclk_div = 1; + + freq = target_freq * 1000; + + pr_debug(KERN_DEBUG "imx: requested frequency %ld Hz, mpctl0 at boot 0x%08x\n", + freq, mpctl0_at_boot); + + sysclk = imx_get_system_clk(); + + if (freq > sysclk + 1000000) { + freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation); + if (freq < 0) { + printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq); + return -EINVAL; + } + } else { + if(freq + 1000 < sysclk) { + if (relation == CPUFREQ_RELATION_L) + bclk_div = (sysclk - 1000) / freq; + else + bclk_div = (sysclk + freq + 1000) / freq; + + if(bclk_div > 16) + bclk_div = 16; + } + freq = (sysclk + bclk_div / 2) / bclk_div; + } + + freqs.old = imx_get_speed(0); + freqs.new = (freq + 500) / 1000; + freqs.cpu = 0; + freqs.flags = 0; + + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); + + local_irq_save(flags); + + imx_set_fastbus_mode(); + + imx_set_mpctl0(mpctl0); + + cscr = CSCR; + cscr &= ~CSCR_BCLK_DIV; + cscr |= __val2mfld(CSCR_BCLK_DIV, bclk_div - 1); + CSCR = cscr; + + if(mpctl0) { + CSCR |= CSCR_MPLL_RESTART; + + /* Wait until MPLL is stablized */ + while( CSCR & CSCR_MPLL_RESTART ); + + imx_set_async_mode(); + } + + local_irq_restore(flags); + + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); + + pr_debug(KERN_INFO "imx: set frequency %ld Hz, running from %s\n", + freq, mpctl0? "MPLL": "SPLL"); + + return 0; +} + +static int __init imx_cpufreq_driver_init(struct cpufreq_policy *policy) +{ + printk(KERN_INFO "i.MX cpu freq change driver v1.0\n"); + + if (policy->cpu != 0) + return -EINVAL; + + policy->cur = policy->min = policy->max = imx_get_speed(0); + policy->governor = CPUFREQ_DEFAULT_GOVERNOR; + policy->cpuinfo.min_freq = 8000; + policy->cpuinfo.max_freq = 200000; + policy->cpuinfo.transition_latency = CPUFREQ_ETERNAL; + return 0; +} + +static struct cpufreq_driver imx_driver = { + .flags = CPUFREQ_STICKY, + .verify = imx_verify_speed, + .target = imx_set_target, + .get = imx_get_speed, + .init = imx_cpufreq_driver_init, + .name = "imx", +}; + +static int __init imx_cpufreq_init(void) +{ + + mpctl0_at_boot = 0; + + if((CSCR & CSCR_MPEN) && + ((get_cr() & CR_920T_CLOCK_MODE) != CR_920T_FASTBUS_MODE)) + mpctl0_at_boot = MPCTL0; + + return cpufreq_register_driver(&imx_driver); +} + +arch_initcall(imx_cpufreq_init); + diff --git a/trunk/arch/arm/mach-netx/time.c b/trunk/arch/arm/mach-netx/time.c index 0993336c0b55..5773b55ef4a6 100644 --- a/trunk/arch/arm/mach-netx/time.c +++ b/trunk/arch/arm/mach-netx/time.c @@ -19,21 +19,14 @@ #include #include +#include +#include #include #include #include #include -/* - * Returns number of us since last clock interrupt. Note that interrupts - * will have been disabled by do_gettimeoffset() - */ -static unsigned long netx_gettimeoffset(void) -{ - return readl(NETX_GPIO_COUNTER_CURRENT(0)) / 100; -} - /* * IRQ handler for the timer */ @@ -43,6 +36,7 @@ netx_timer_interrupt(int irq, void *dev_id) write_seqlock(&xtime_lock); timer_tick(); + write_sequnlock(&xtime_lock); /* acknowledge interrupt */ @@ -51,13 +45,26 @@ netx_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } - static struct irqaction netx_timer_irq = { .name = "NetX Timer Tick", .flags = IRQF_DISABLED | IRQF_TIMER, .handler = netx_timer_interrupt, }; +cycle_t netx_get_cycles(void) +{ + return readl(NETX_GPIO_COUNTER_CURRENT(1)); +} + +static struct clocksource clocksource_netx = { + .name = "netx_timer", + .rating = 200, + .read = netx_get_cycles, + .mask = CLOCKSOURCE_MASK(32), + .shift = 20, + .is_continuous = 1, +}; + /* * Set up timer interrupt */ @@ -80,9 +87,20 @@ static void __init netx_timer_init(void) NETX_GPIO_COUNTER_CTRL(0)); setup_irq(NETX_IRQ_TIMER0, &netx_timer_irq); + + /* Setup timer one for clocksource */ + writel(0, NETX_GPIO_COUNTER_CTRL(1)); + writel(0, NETX_GPIO_COUNTER_CURRENT(1)); + writel(0xFFFFFFFF, NETX_GPIO_COUNTER_MAX(1)); + + writel(NETX_GPIO_COUNTER_CTRL_RUN, + NETX_GPIO_COUNTER_CTRL(1)); + + clocksource_netx.mult = + clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_netx.shift); + clocksource_register(&clocksource_netx); } struct sys_timer netx_timer = { - .init = netx_timer_init, - .offset = netx_gettimeoffset, + .init = netx_timer_init, }; diff --git a/trunk/arch/arm/mach-omap1/Kconfig b/trunk/arch/arm/mach-omap1/Kconfig index d135568dc9e7..8781aaeb576b 100644 --- a/trunk/arch/arm/mach-omap1/Kconfig +++ b/trunk/arch/arm/mach-omap1/Kconfig @@ -43,6 +43,7 @@ config MACH_OMAP_H3 config MACH_OMAP_OSK bool "TI OSK Support" depends on ARCH_OMAP1 && ARCH_OMAP16XX + select TPS65010 help TI OMAP 5912 OSK (OMAP Starter Kit) board support. Say Y here if you have such a board. diff --git a/trunk/arch/arm/mach-omap1/board-osk.c b/trunk/arch/arm/mach-omap1/board-osk.c index 3a622801d7b0..7d0cf7af88ce 100644 --- a/trunk/arch/arm/mach-omap1/board-osk.c +++ b/trunk/arch/arm/mach-omap1/board-osk.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include diff --git a/trunk/arch/arm/mach-pxa/time.c b/trunk/arch/arm/mach-pxa/time.c index b91466861029..3775b8f38429 100644 --- a/trunk/arch/arm/mach-pxa/time.c +++ b/trunk/arch/arm/mach-pxa/time.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include @@ -48,27 +49,6 @@ static int pxa_set_rtc(void) return 0; } -/* IRQs are disabled before entering here from do_gettimeofday() */ -static unsigned long pxa_gettimeoffset (void) -{ - long ticks_to_match, elapsed, usec; - - /* Get ticks before next timer match */ - ticks_to_match = OSMR0 - OSCR; - - /* We need elapsed ticks since last match */ - elapsed = LATCH - ticks_to_match; - - /* don't get fooled by the workaround in pxa_timer_interrupt() */ - if (elapsed <= 0) - return 0; - - /* Now convert them to usec */ - usec = (unsigned long)(elapsed * (tick_nsec / 1000))/LATCH; - - return usec; -} - #ifdef CONFIG_NO_IDLE_HZ static unsigned long initial_match; static int match_posponed; @@ -121,6 +101,20 @@ static struct irqaction pxa_timer_irq = { .handler = pxa_timer_interrupt, }; +cycle_t pxa_get_cycles(void) +{ + return OSCR; +} + +static struct clocksource clocksource_pxa = { + .name = "pxa_timer", + .rating = 200, + .read = pxa_get_cycles, + .mask = CLOCKSOURCE_MASK(32), + .shift = 20, + .is_continuous = 1, +}; + static void __init pxa_timer_init(void) { struct timespec tv; @@ -139,6 +133,14 @@ static void __init pxa_timer_init(void) OIER = OIER_E0; /* enable match on timer 0 to cause interrupts */ OSMR0 = OSCR + LATCH; /* set initial match */ local_irq_restore(flags); + + /* on PXA OSCR runs continiously and is not written to, so we can use it + * as clock source directly. + */ + clocksource_pxa.mult = + clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift); + clocksource_register(&clocksource_pxa); + } #ifdef CONFIG_NO_IDLE_HZ @@ -211,7 +213,6 @@ struct sys_timer pxa_timer = { .init = pxa_timer_init, .suspend = pxa_timer_suspend, .resume = pxa_timer_resume, - .offset = pxa_gettimeoffset, #ifdef CONFIG_NO_IDLE_HZ .dyn_tick = &pxa_dyn_tick, #endif diff --git a/trunk/arch/arm/mach-pxa/trizeps4.c b/trunk/arch/arm/mach-pxa/trizeps4.c index c1827d021ba8..119c64b7223f 100644 --- a/trunk/arch/arm/mach-pxa/trizeps4.c +++ b/trunk/arch/arm/mach-pxa/trizeps4.c @@ -393,10 +393,6 @@ static struct pxafb_mach_info sharp_lcd = { .pxafb_backlight_power = board_backlight_power, }; -static void __init trizeps4_fixup(struct machine_desc *desc, struct tag *tags, char **cmdline, struct meminfo *mi) -{ -} - static void __init trizeps4_init(void) { platform_add_devices(trizeps4_devices, ARRAY_SIZE(trizeps4_devices)); @@ -469,7 +465,6 @@ MACHINE_START(TRIZEPS4, "Keith und Koep Trizeps IV module") .phys_io = 0x40000000, .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .boot_params = TRIZEPS4_SDRAM_BASE + 0x100, - .fixup = trizeps4_fixup, .init_machine = trizeps4_init, .map_io = trizeps4_map_io, .init_irq = pxa_init_irq, diff --git a/trunk/arch/arm/mach-sa1100/jornada720.c b/trunk/arch/arm/mach-sa1100/jornada720.c index 17f5a43acdb7..54ecdaa373d6 100644 --- a/trunk/arch/arm/mach-sa1100/jornada720.c +++ b/trunk/arch/arm/mach-sa1100/jornada720.c @@ -1,5 +1,15 @@ /* * linux/arch/arm/mach-sa1100/jornada720.c + * + * HP Jornada720 init code + * + * Copyright (C) 2006 Filip Zyzniewski + * Copyright (C) 2005 Michael Gernoth + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * */ #include @@ -10,13 +20,13 @@ #include #include #include +#include