From b270caec784b25253f76a9acb623bee711033e02 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 21 Dec 2010 21:27:34 +0100 Subject: [PATCH] --- yaml --- r: 228821 b: refs/heads/master c: 204663c48711ddceee09df46269cd34d49d1f7be h: refs/heads/master i: 228819: 6a4f09113c39f7d30d83cadfae6def95e7d4d122 v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/radeon/r300.c | 7 +++++++ trunk/drivers/gpu/drm/radeon/radeon_drv.c | 2 +- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/[refs] b/[refs] index acf909446c42..256294cd6f7c 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: ae09f09e94d755ed45c58b695675636c0ec53f9e +refs/heads/master: 204663c48711ddceee09df46269cd34d49d1f7be diff --git a/trunk/drivers/gpu/drm/radeon/r300.c b/trunk/drivers/gpu/drm/radeon/r300.c index cde1d3480d93..36b4f7b48d6a 100644 --- a/trunk/drivers/gpu/drm/radeon/r300.c +++ b/trunk/drivers/gpu/drm/radeon/r300.c @@ -787,6 +787,13 @@ static int r300_packet0_check(struct radeon_cs_parser *p, case 15: track->cb[i].cpp = 2; break; + case 5: + if (p->rdev->family < CHIP_RV515) { + DRM_ERROR("Invalid color buffer format (%d)!\n", + ((idx_value >> 21) & 0xF)); + return -EINVAL; + } + /* Pass through. */ case 6: track->cb[i].cpp = 4; break; diff --git a/trunk/drivers/gpu/drm/radeon/radeon_drv.c b/trunk/drivers/gpu/drm/radeon/radeon_drv.c index 6fb1218f9d76..520b776b09f4 100644 --- a/trunk/drivers/gpu/drm/radeon/radeon_drv.c +++ b/trunk/drivers/gpu/drm/radeon/radeon_drv.c @@ -48,7 +48,7 @@ * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500) * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs - * 2.8.0 - pageflip support, r500 US_FORMAT regs. + * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf */ #define KMS_DRIVER_MAJOR 2 #define KMS_DRIVER_MINOR 8