From b29fd461cb18d5f636e09ca4e178f90adc089da0 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Fri, 24 Apr 2009 03:17:07 +0000 Subject: [PATCH] --- yaml --- r: 148566 b: refs/heads/master c: 97b070c8e7e82be30c8a3bf19e69b8c0c71f1fac h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/blackfin/mach-common/clocks-init.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e1f45a9cea0a..ced12eb6fb13 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5ba766752d14a741aa2d7a3c321917a310b34afb +refs/heads/master: 97b070c8e7e82be30c8a3bf19e69b8c0c71f1fac diff --git a/trunk/arch/blackfin/mach-common/clocks-init.c b/trunk/arch/blackfin/mach-common/clocks-init.c index 35393651359b..ef6870e9eea6 100644 --- a/trunk/arch/blackfin/mach-common/clocks-init.c +++ b/trunk/arch/blackfin/mach-common/clocks-init.c @@ -72,6 +72,7 @@ void init_clocks(void) #endif bfin_write_PLL_LOCKCNT(0x300); do_sync(); + /* We always write PLL_CTL thus avoiding Anomaly 05000242 */ bfin_write16(PLL_CTL, PLL_CTL_VAL); __asm__ __volatile__("IDLE;"); bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV);