From b32ec85ca1a5b87b07bd85f725df98077a2a12da Mon Sep 17 00:00:00 2001
From: Andrea Gelmini <andrea.gelmini@gelma.net>
Date: Sun, 23 May 2010 21:55:49 +0200
Subject: [PATCH] --- yaml --- r: 198549 b: refs/heads/master c:
 7b2e6a162447e217b0abe0710409c517d2b7c0b3 h: refs/heads/master i:   198547:
 a6d679761861f6cbd5323974f9ed106432e1a056 v: v3

---
 [refs]                      | 2 +-
 trunk/arch/arm/nwfpe/fpsr.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index ad1c62b5e97d..6fd505bece7b 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ff4659c1a7b207391a132bc3d11d007160a45147
+refs/heads/master: 7b2e6a162447e217b0abe0710409c517d2b7c0b3
diff --git a/trunk/arch/arm/nwfpe/fpsr.h b/trunk/arch/arm/nwfpe/fpsr.h
index 859b300d89fd..bd425dc13b61 100644
--- a/trunk/arch/arm/nwfpe/fpsr.h
+++ b/trunk/arch/arm/nwfpe/fpsr.h
@@ -30,7 +30,7 @@ one byte.
 	EXCEPTION TRAP ENABLE BYTE
 	SYSTEM CONTROL BYTE
 	CUMULATIVE EXCEPTION FLAGS BYTE
-	
+
 The FPCR is a 32 bit register consisting of bit flags.
 */