From b35c91405627838ddb620223a135f3178d804bd4 Mon Sep 17 00:00:00 2001 From: Paulo Zanoni Date: Fri, 5 Oct 2012 12:06:01 -0300 Subject: [PATCH] --- yaml --- r: 345107 b: refs/heads/master c: 1ce4292073695fd0fec74d1169bc94dadc339731 h: refs/heads/master i: 345105: 6dfba86be1dce55f819fa4c172d6992035ff13b8 345103: a9a9b73d09a046f1d7569ca42d850975be55eb6c v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_display.c | 7 +++++-- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index d33204af9cba..a469e3c523c5 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 2886e93f5d28c559b3de9c4f75547af31e14504e +refs/heads/master: 1ce4292073695fd0fec74d1169bc94dadc339731 diff --git a/trunk/drivers/gpu/drm/i915/intel_display.c b/trunk/drivers/gpu/drm/i915/intel_display.c index 709497dc807b..705ed80e1e11 100644 --- a/trunk/drivers/gpu/drm/i915/intel_display.c +++ b/trunk/drivers/gpu/drm/i915/intel_display.c @@ -5217,6 +5217,11 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, WARN(num_connectors != 1, "%d connectors attached to pipe %c\n", num_connectors, pipe_name(pipe)); + WARN_ON(I915_READ(PIPECONF(pipe)) & + (PIPECONF_ENABLE | I965_PIPECONF_ACTIVE)); + + WARN_ON(I915_READ(DSPCNTR(plane)) & DISPLAY_PLANE_ENABLE); + if (!intel_ddi_pll_mode_set(crtc, adjusted_mode->clock)) return -EINVAL; @@ -5357,8 +5362,6 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, haswell_set_pipeconf(crtc, adjusted_mode, dither); - intel_wait_for_vblank(dev, pipe); - /* Set up the display plane register */ I915_WRITE(DSPCNTR(plane), DISPPLANE_GAMMA_ENABLE); POSTING_READ(DSPCNTR(plane));