From b41e3e608eefabac480f0bd13cf576ef4d5d7e08 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Wed, 24 Jun 2009 20:30:28 +0400 Subject: [PATCH] --- yaml --- r: 156099 b: refs/heads/master c: c4673f9a32d7b02bcd2057763d3d368efe5809c3 h: refs/heads/master i: 156097: 4254fb489785e2a304ac8a9f9c16852e6987b8c5 156095: 6cdc089755b91e5e7e033e3a06c61b03ff4129ed v: v3 --- [refs] | 2 +- trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c | 13 +++++++++++++ 2 files changed, 14 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index 88e7bc1f6d71..e8264305f7db 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 5156ddce6c0a152ee7ccab2c976c6a8abc8a49b5 +refs/heads/master: c4673f9a32d7b02bcd2057763d3d368efe5809c3 diff --git a/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 60ed9c067b1d..bfb32834ab0c 100644 --- a/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/trunk/arch/powerpc/platforms/85xx/mpc85xx_mds.c @@ -233,6 +233,19 @@ static void __init mpc85xx_mds_setup_arch(void) /* Turn UCC1 & UCC2 on */ setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); + } else if (machine_is(mpc8569_mds)) { +#define BCSR7_UCC12_GETHnRST (0x1 << 2) +#define BCSR8_UEM_MARVELL_RST (0x1 << 1) + /* + * U-Boot mangles interrupt polarity for Marvell PHYs, + * so reset built-in and UEM Marvell PHYs, this puts + * the PHYs into their normal state. + */ + clrbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); + setbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); + + setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST); + clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST); } iounmap(bcsr_regs); }