From b5c6aa5c9b1818f684a9b20b1a0298f2d4ef16f4 Mon Sep 17 00:00:00 2001 From: Peter Huewe Date: Tue, 5 Feb 2013 22:32:34 +0100 Subject: [PATCH] --- yaml --- r: 354419 b: refs/heads/master c: 4b488afbc4f0b16dc9507857afb445ae7aa20af2 h: refs/heads/master i: 354417: 4dcc8275b7e7f5624991a47843ad76221be0957e 354415: 64476acde9f7edef10257fd8592a04fc7a570ab1 v: v3 --- [refs] | 2 +- trunk/drivers/staging/xgifb/vb_init.c | 16 ---------------- 2 files changed, 1 insertion(+), 17 deletions(-) diff --git a/[refs] b/[refs] index ac87b44c3b72..2fd65e4183b0 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 6a7fd2db79ab619cecb803619f8077956ec124cc +refs/heads/master: 4b488afbc4f0b16dc9507857afb445ae7aa20af2 diff --git a/trunk/drivers/staging/xgifb/vb_init.c b/trunk/drivers/staging/xgifb/vb_init.c index e19a714d2193..82170d435c5d 100644 --- a/trunk/drivers/staging/xgifb/vb_init.c +++ b/trunk/drivers/staging/xgifb/vb_init.c @@ -131,22 +131,6 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension, xgifb_reg_set(pVBInfo->P3c4, 0x30, XGI340_ECLKData[pVBInfo->ram_type].SR30); - - /* When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */ - /* Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz, - * Set SR32 D[1:0] = 10b */ - if (HwDeviceExtension->jChipType == XG42) { - if ((pVBInfo->MCLKData[pVBInfo->ram_type].SR28 == 0x1C) && - (pVBInfo->MCLKData[pVBInfo->ram_type].SR29 == 0x01) && - (((XGI340_ECLKData[pVBInfo->ram_type].SR2E == 0x1C) && - (XGI340_ECLKData[pVBInfo->ram_type].SR2F == 0x01)) || - ((XGI340_ECLKData[pVBInfo->ram_type].SR2E == 0x22) && - (XGI340_ECLKData[pVBInfo->ram_type].SR2F == 0x01)))) - xgifb_reg_set(pVBInfo->P3c4, - 0x32, - ((unsigned char) xgifb_reg_get( - pVBInfo->P3c4, 0x32) & 0xFC) | 0x02); - } } static void XGINew_DDRII_Bootup_XG27(