From b7139af3ac77d20b934aaea1d57b5239506281a6 Mon Sep 17 00:00:00 2001 From: Gertjan van Wingerde Date: Mon, 6 Feb 2012 23:45:12 +0100 Subject: [PATCH] --- yaml --- r: 290405 b: refs/heads/master c: 58b8ae14d58319bff63a30a9e1c0ebb9c07f2243 h: refs/heads/master i: 290403: aa3ceb35448bbc80e51d505afbe0f9de9dadd592 v: v3 --- [refs] | 2 +- trunk/drivers/net/wireless/rt2x00/rt2800.h | 10 ++++++---- trunk/drivers/net/wireless/rt2x00/rt2800lib.c | 7 ++++++- 3 files changed, 13 insertions(+), 6 deletions(-) diff --git a/[refs] b/[refs] index 7431752a6346..1a3cc3723122 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0cd461efcc1df6763b86b29ef4d6ee1cb923aa47 +refs/heads/master: 58b8ae14d58319bff63a30a9e1c0ebb9c07f2243 diff --git a/trunk/drivers/net/wireless/rt2x00/rt2800.h b/trunk/drivers/net/wireless/rt2x00/rt2800.h index 8aabd0dc02c3..c6648b02bf81 100644 --- a/trunk/drivers/net/wireless/rt2x00/rt2800.h +++ b/trunk/drivers/net/wireless/rt2x00/rt2800.h @@ -1819,10 +1819,12 @@ struct mac_iveiv_entry { * RFCSR 7: */ #define RFCSR7_RF_TUNING FIELD8(0x01) -#define RFCSR7_R02 FIELD8(0x07) -#define RFCSR7_R3 FIELD8(0x08) -#define RFCSR7_R45 FIELD8(0x30) -#define RFCSR7_R67 FIELD8(0xc0) +#define RFCSR7_BIT1 FIELD8(0x02) +#define RFCSR7_BIT2 FIELD8(0x04) +#define RFCSR7_BIT3 FIELD8(0x08) +#define RFCSR7_BIT4 FIELD8(0x10) +#define RFCSR7_BIT5 FIELD8(0x20) +#define RFCSR7_BITS67 FIELD8(0xc0) /* * RFCSR 11: diff --git a/trunk/drivers/net/wireless/rt2x00/rt2800lib.c b/trunk/drivers/net/wireless/rt2x00/rt2800lib.c index 135e8a40edd3..395453c41e23 100644 --- a/trunk/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/trunk/drivers/net/wireless/rt2x00/rt2800lib.c @@ -1865,7 +1865,12 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, rt2800_rfcsr_write(rt2x00dev, 27, 0x00); rt2800_rfcsr_write(rt2x00dev, 29, 0x9b); } else { - rt2800_rfcsr_write(rt2x00dev, 7, 0x14); + rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr); + rt2x00_set_field8(&rfcsr, RFCSR7_BIT2, 1); + rt2x00_set_field8(&rfcsr, RFCSR7_BIT3, 0); + rt2x00_set_field8(&rfcsr, RFCSR7_BIT4, 1); + rt2x00_set_field8(&rfcsr, RFCSR7_BITS67, 0); + rt2800_rfcsr_write(rt2x00dev, 7, rfcsr); rt2800_rfcsr_write(rt2x00dev, 9, 0xc0); rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); rt2800_rfcsr_write(rt2x00dev, 11, 0x00);