diff --git a/[refs] b/[refs] index 7b3c1d794aed..f39f334aefa1 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: 0df04f820b7ca5204329d1c235e509648fa8008d +refs/heads/master: 08d08fadde4549c7b857fa34f3696c882ed20864 diff --git a/trunk/arch/arm/mach-s5pc100/mach-smdkc100.c b/trunk/arch/arm/mach-s5pc100/mach-smdkc100.c index bfe67db34f04..f2bce11cf287 100644 --- a/trunk/arch/arm/mach-s5pc100/mach-smdkc100.c +++ b/trunk/arch/arm/mach-s5pc100/mach-smdkc100.c @@ -118,8 +118,7 @@ static struct platform_device smdkc100_lcd_powerdev = { static struct s3c_fb_pd_win smdkc100_fb_win0 = { /* this is to ensure we use win0 */ .win_mode = { - .refresh = 70, - .pixclock = (8+13+3+800)*(7+5+1+480), + .pixclock = 1000000000000ULL / ((8+13+3+800)*(7+5+1+480)*80), .left_margin = 8, .right_margin = 13, .upper_margin = 7, diff --git a/trunk/arch/arm/mach-s5pv210/Kconfig b/trunk/arch/arm/mach-s5pv210/Kconfig index 8b9566e0cc51..7601c28e240b 100644 --- a/trunk/arch/arm/mach-s5pv210/Kconfig +++ b/trunk/arch/arm/mach-s5pv210/Kconfig @@ -13,7 +13,6 @@ config CPU_S5PV210 bool select PLAT_S5P select S3C_PL330_DMA - select S5P_EXT_INT help Enable S5PV210 CPU support diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/irqs.h b/trunk/arch/arm/mach-s5pv210/include/mach/irqs.h index 3a9e42e7734b..62c5175ef291 100644 --- a/trunk/arch/arm/mach-s5pv210/include/mach/irqs.h +++ b/trunk/arch/arm/mach-s5pv210/include/mach/irqs.h @@ -17,6 +17,22 @@ /* VIC0: System, DMA, Timer */ +#define IRQ_EINT0 S5P_IRQ_VIC0(0) +#define IRQ_EINT1 S5P_IRQ_VIC0(1) +#define IRQ_EINT2 S5P_IRQ_VIC0(2) +#define IRQ_EINT3 S5P_IRQ_VIC0(3) +#define IRQ_EINT4 S5P_IRQ_VIC0(4) +#define IRQ_EINT5 S5P_IRQ_VIC0(5) +#define IRQ_EINT6 S5P_IRQ_VIC0(6) +#define IRQ_EINT7 S5P_IRQ_VIC0(7) +#define IRQ_EINT8 S5P_IRQ_VIC0(8) +#define IRQ_EINT9 S5P_IRQ_VIC0(9) +#define IRQ_EINT10 S5P_IRQ_VIC0(10) +#define IRQ_EINT11 S5P_IRQ_VIC0(11) +#define IRQ_EINT12 S5P_IRQ_VIC0(12) +#define IRQ_EINT13 S5P_IRQ_VIC0(13) +#define IRQ_EINT14 S5P_IRQ_VIC0(14) +#define IRQ_EINT15 S5P_IRQ_VIC0(15) #define IRQ_EINT16_31 S5P_IRQ_VIC0(16) #define IRQ_BATF S5P_IRQ_VIC0(17) #define IRQ_MDMA S5P_IRQ_VIC0(18) @@ -118,20 +134,13 @@ #define IRQ_MDNIE3 S5P_IRQ_VIC3(8) #define IRQ_VIC_END S5P_IRQ_VIC3(31) -#define S5P_EINT_16_31_BASE (IRQ_VIC_END + 1) +#define S5P_IRQ_EINT_BASE (IRQ_VIC_END + 1) -#define EINT_MODE S3C_GPIO_SFN(0xf) - -#define IRQ_EINT(x) ((x) < 16 ? ((x) + S5P_IRQ_VIC0(0)) \ - : ((x) + S5P_EINT_16_31_BASE)) +#define S5P_EINT(x) ((x) + S5P_IRQ_EINT_BASE) +#define IRQ_EINT(x) S5P_EINT(x) /* Set the default NR_IRQS */ -#define NR_IRQS (IRQ_EINT(31) + 1) - -#define EINT_GPIO_0(x) S5PV210_GPH0(x) -#define EINT_GPIO_1(x) S5PV210_GPH1(x) -#define EINT_GPIO_2(x) S5PV210_GPH2(x) -#define EINT_GPIO_3(x) S5PV210_GPH3(x) +#define NR_IRQS (IRQ_EINT(31) + 1) #endif /* ASM_ARCH_IRQS_H */ diff --git a/trunk/arch/arm/mach-s5pv210/include/mach/regs-gpio.h b/trunk/arch/arm/mach-s5pv210/include/mach/regs-gpio.h deleted file mode 100644 index 6d068091c36c..000000000000 --- a/trunk/arch/arm/mach-s5pv210/include/mach/regs-gpio.h +++ /dev/null @@ -1,44 +0,0 @@ -/* linux/arch/arm/mach-s5pv210/include/mach/regs-gpio.h - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5PV210 - GPIO (including EINT) register definitions - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#ifndef __ASM_ARCH_REGS_GPIO_H -#define __ASM_ARCH_REGS_GPIO_H __FILE__ - -#include - -#define S5PV210_EINT30CON (S5P_VA_GPIO + 0xE00) -#define S5P_EINT_CON(x) (S5PV210_EINT30CON + ((x) * 0x4)) - -#define S5PV210_EINT30FLTCON0 (S5P_VA_GPIO + 0xE80) -#define S5P_EINT_FLTCON(x) (S5PV210_EINT30FLTCON0 + ((x) * 0x4)) - -#define S5PV210_EINT30MASK (S5P_VA_GPIO + 0xF00) -#define S5P_EINT_MASK(x) (S5PV210_EINT30MASK + ((x) * 0x4)) - -#define S5PV210_EINT30PEND (S5P_VA_GPIO + 0xF40) -#define S5P_EINT_PEND(x) (S5PV210_EINT30PEND + ((x) * 0x4)) - -#define eint_offset(irq) ((irq) < IRQ_EINT16_31 ? ((irq) - IRQ_EINT(0)) \ - : ((irq) - S5P_EINT_16_31_BASE)) - -#define EINT_REG_NR(x) (eint_offset(x) >> 3) - -#define eint_irq_to_bit(irq) (1 << (eint_offset(irq) & 0x7)) - -/* values for S5P_EXTINT0 */ -#define S5P_EXTINT_LOWLEV (0x00) -#define S5P_EXTINT_HILEV (0x01) -#define S5P_EXTINT_FALLEDGE (0x02) -#define S5P_EXTINT_RISEEDGE (0x03) -#define S5P_EXTINT_BOTHEDGE (0x04) - -#endif /* __ASM_ARCH_REGS_GPIO_H */ diff --git a/trunk/arch/arm/plat-s5p/Kconfig b/trunk/arch/arm/plat-s5p/Kconfig index c2361132d867..92bd75607b43 100644 --- a/trunk/arch/arm/plat-s5p/Kconfig +++ b/trunk/arch/arm/plat-s5p/Kconfig @@ -24,8 +24,3 @@ config PLAT_S5P select SAMSUNG_IRQ_UART help Base platform code for Samsung's S5P series SoC. - -config S5P_EXT_INT - bool - help - Use the external interrupts (other than GPIO interrupts.) diff --git a/trunk/arch/arm/plat-s5p/Makefile b/trunk/arch/arm/plat-s5p/Makefile index 25941a5d3bf6..0ec09a9c36bd 100644 --- a/trunk/arch/arm/plat-s5p/Makefile +++ b/trunk/arch/arm/plat-s5p/Makefile @@ -16,5 +16,3 @@ obj-y += dev-uart.o obj-y += cpu.o obj-y += clock.o obj-y += irq.o -obj-$(CONFIG_S5P_EXT_INT) += irq-eint.o -obj-y += setup-i2c0.o diff --git a/trunk/arch/arm/plat-s5p/irq-eint.c b/trunk/arch/arm/plat-s5p/irq-eint.c deleted file mode 100644 index eaa70aa0127b..000000000000 --- a/trunk/arch/arm/plat-s5p/irq-eint.c +++ /dev/null @@ -1,213 +0,0 @@ -/* linux/arch/arm/plat-s5p/irq-eint.c - * - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * S5P - IRQ EINT support - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. -*/ - -#include -#include -#include -#include -#include -#include - -#include - -#include - -#include -#include -#include - -#include -#include - -static inline void s5p_irq_eint_mask(unsigned int irq) -{ - u32 mask; - - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); - mask |= eint_irq_to_bit(irq); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); -} - -static void s5p_irq_eint_unmask(unsigned int irq) -{ - u32 mask; - - mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(irq))); - mask &= ~(eint_irq_to_bit(irq)); - __raw_writel(mask, S5P_EINT_MASK(EINT_REG_NR(irq))); -} - -static inline void s5p_irq_eint_ack(unsigned int irq) -{ - __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); -} - -static void s5p_irq_eint_maskack(unsigned int irq) -{ - /* compiler should in-line these */ - s5p_irq_eint_mask(irq); - s5p_irq_eint_ack(irq); -} - -static int s5p_irq_eint_set_type(unsigned int irq, unsigned int type) -{ - int offs = eint_offset(irq); - int shift; - u32 ctrl, mask; - u32 newvalue = 0; - - switch (type) { - case IRQ_TYPE_EDGE_RISING: - newvalue = S5P_EXTINT_RISEEDGE; - break; - - case IRQ_TYPE_EDGE_FALLING: - newvalue = S5P_EXTINT_RISEEDGE; - break; - - case IRQ_TYPE_EDGE_BOTH: - newvalue = S5P_EXTINT_BOTHEDGE; - break; - - case IRQ_TYPE_LEVEL_LOW: - newvalue = S5P_EXTINT_LOWLEV; - break; - - case IRQ_TYPE_LEVEL_HIGH: - newvalue = S5P_EXTINT_HILEV; - break; - - default: - printk(KERN_ERR "No such irq type %d", type); - return -EINVAL; - } - - shift = (offs & 0x7) * 4; - mask = 0x7 << shift; - - ctrl = __raw_readl(S5P_EINT_CON(EINT_REG_NR(irq))); - ctrl &= ~mask; - ctrl |= newvalue << shift; - __raw_writel(ctrl, S5P_EINT_CON(EINT_REG_NR(irq))); - - if ((0 <= offs) && (offs < 8)) - s3c_gpio_cfgpin(EINT_GPIO_0(offs & 0x7), EINT_MODE); - - else if ((8 <= offs) && (offs < 16)) - s3c_gpio_cfgpin(EINT_GPIO_1(offs & 0x7), EINT_MODE); - - else if ((16 <= offs) && (offs < 24)) - s3c_gpio_cfgpin(EINT_GPIO_2(offs & 0x7), EINT_MODE); - - else if ((24 <= offs) && (offs < 32)) - s3c_gpio_cfgpin(EINT_GPIO_3(offs & 0x7), EINT_MODE); - - else - printk(KERN_ERR "No such irq number %d", offs); - - return 0; -} - -static struct irq_chip s5p_irq_eint = { - .name = "s5p-eint", - .mask = s5p_irq_eint_mask, - .unmask = s5p_irq_eint_unmask, - .mask_ack = s5p_irq_eint_maskack, - .ack = s5p_irq_eint_ack, - .set_type = s5p_irq_eint_set_type, -#ifdef CONFIG_PM - .set_wake = s3c_irqext_wake, -#endif -}; - -/* s5p_irq_demux_eint - * - * This function demuxes the IRQ from the group0 external interrupts, - * from EINTs 16 to 31. It is designed to be inlined into the specific - * handler s5p_irq_demux_eintX_Y. - * - * Each EINT pend/mask registers handle eight of them. - */ -static inline void s5p_irq_demux_eint(unsigned int start) -{ - u32 status; - u32 mask = __raw_readl(S5P_EINT_MASK(EINT_REG_NR(start))); - unsigned int irq; - - status = __raw_readl(S5P_EINT_PEND(EINT_REG_NR(start))); - status &= ~mask; - status &= 0xff; - - while (status) { - irq = fls(status); - generic_handle_irq(irq - 1 + start); - status &= ~(1 << irq); - } -} - -static void s5p_irq_demux_eint16_31(unsigned int irq, struct irq_desc *desc) -{ - s5p_irq_demux_eint(IRQ_EINT(16)); - s5p_irq_demux_eint(IRQ_EINT(24)); -} - -static inline void s5p_irq_vic_eint_mask(unsigned int irq) -{ - s5p_irq_eint_mask(irq); -} - -static void s5p_irq_vic_eint_unmask(unsigned int irq) -{ - s5p_irq_eint_unmask(irq); -} - -static inline void s5p_irq_vic_eint_ack(unsigned int irq) -{ - __raw_writel(eint_irq_to_bit(irq), S5P_EINT_PEND(EINT_REG_NR(irq))); -} - -static void s5p_irq_vic_eint_maskack(unsigned int irq) -{ - s5p_irq_vic_eint_mask(irq); - s5p_irq_vic_eint_ack(irq); -} - -static struct irq_chip s5p_irq_vic_eint = { - .name = "s5p_vic_eint", - .mask = s5p_irq_vic_eint_mask, - .unmask = s5p_irq_vic_eint_unmask, - .mask_ack = s5p_irq_vic_eint_maskack, - .ack = s5p_irq_vic_eint_ack, - .set_type = s5p_irq_eint_set_type, -#ifdef CONFIG_PM - .set_wake = s3c_irqext_wake, -#endif -}; - -int __init s5p_init_irq_eint(void) -{ - int irq; - - for (irq = IRQ_EINT(0); irq <= IRQ_EINT(15); irq++) - set_irq_chip(irq, &s5p_irq_vic_eint); - - for (irq = IRQ_EINT(16); irq <= IRQ_EINT(31); irq++) { - set_irq_chip(irq, &s5p_irq_eint); - set_irq_handler(irq, handle_level_irq); - set_irq_flags(irq, IRQF_VALID); - } - - set_irq_chained_handler(IRQ_EINT16_31, s5p_irq_demux_eint16_31); - return 0; -} - -arch_initcall(s5p_init_irq_eint);