From b7b5a08cb8b771f175c2cc113f447720ce10a1b8 Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Sat, 27 Jun 2009 15:22:00 +0200 Subject: [PATCH] --- yaml --- r: 163603 b: refs/heads/master c: 9b05706a744da939655525eeeae23f1989b434ce h: refs/heads/master i: 163601: 0b5e0789a17a5864380ae6db620c0a5d8dd3fdd6 163599: 777df07cb28431b99d1a907d8909fa7807a832db v: v3 --- [refs] | 2 +- trunk/arch/score/include/asm/irq.h | 10 --------- trunk/arch/score/kernel/irq.c | 33 +++++++++++++++++++++--------- 3 files changed, 24 insertions(+), 21 deletions(-) diff --git a/[refs] b/[refs] index 8f699ff5c6e6..2b958bb363f3 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: c6067472252c1d6155c7c01c93e0d580342cdb29 +refs/heads/master: 9b05706a744da939655525eeeae23f1989b434ce diff --git a/trunk/arch/score/include/asm/irq.h b/trunk/arch/score/include/asm/irq.h index 401f6704848c..6edd2a2adef7 100644 --- a/trunk/arch/score/include/asm/irq.h +++ b/trunk/arch/score/include/asm/irq.h @@ -18,16 +18,6 @@ #define irq_canonicalize(irq) (irq) -#define P_INT_PNDL 0x95F50000 -#define P_INT_PNDH 0x95F50004 -#define P_INT_PRIORITY_M 0x95F50008 -#define P_INT_PRIORITY_SG0 0x95F50010 -#define P_INT_PRIORITY_SG1 0x95F50014 -#define P_INT_PRIORITY_SG2 0x95F50018 -#define P_INT_PRIORITY_SG3 0x95F5001C -#define P_INT_MASKL 0x95F50020 -#define P_INT_MASKH 0x95F50024 - #define IRQ_TIMER (7) /* Timer IRQ number of SPCT6600 */ #endif /* _ASM_SCORE_IRQ_H */ diff --git a/trunk/arch/score/kernel/irq.c b/trunk/arch/score/kernel/irq.c index 55474e8e9725..47647dde09ca 100644 --- a/trunk/arch/score/kernel/irq.c +++ b/trunk/arch/score/kernel/irq.c @@ -29,6 +29,19 @@ #include +/* the interrupt controller is hardcoded at this address */ +#define SCORE_PIC ((u32 __iomem __force *)0x95F50000) + +#define INT_PNDL 0 +#define INT_PNDH 1 +#define INT_PRIORITY_M 2 +#define INT_PRIORITY_SG0 4 +#define INT_PRIORITY_SG1 5 +#define INT_PRIORITY_SG2 6 +#define INT_PRIORITY_SG3 7 +#define INT_MASKL 8 +#define INT_MASKH 9 + /* * handles all normal device IRQs */ @@ -44,11 +57,11 @@ static void score_mask(unsigned int irq_nr) unsigned int irq_source = 63 - irq_nr; if (irq_source < 32) - __raw_writel((__raw_readl((void *)P_INT_MASKL) | \ - (1 << irq_source)), (void *)P_INT_MASKL); + __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) | \ + (1 << irq_source)), SCORE_PIC + INT_MASKL); else - __raw_writel((__raw_readl((void *)P_INT_MASKH) | \ - (1 << (irq_source - 32))), (void *)P_INT_MASKH); + __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) | \ + (1 << (irq_source - 32))), SCORE_PIC + INT_MASKH); } static void score_unmask(unsigned int irq_nr) @@ -56,11 +69,11 @@ static void score_unmask(unsigned int irq_nr) unsigned int irq_source = 63 - irq_nr; if (irq_source < 32) - __raw_writel((__raw_readl((void *)P_INT_MASKL) & \ - ~(1 << irq_source)), (void *)P_INT_MASKL); + __raw_writel((__raw_readl(SCORE_PIC + INT_MASKL) & \ + ~(1 << irq_source)), SCORE_PIC + INT_MASKL); else - __raw_writel((__raw_readl((void *)P_INT_MASKH) & \ - ~(1 << (irq_source - 32))), (void *)P_INT_MASKH); + __raw_writel((__raw_readl(SCORE_PIC + INT_MASKH) & \ + ~(1 << (irq_source - 32))), SCORE_PIC + INT_MASKH); } struct irq_chip score_irq_chip = { @@ -88,8 +101,8 @@ void __init init_IRQ(void) memcpy((void *)target_addr, \ interrupt_exception_vector, IRQ_VECTOR_SIZE); - __raw_writel(0xffffffff, (void *)P_INT_MASKL); - __raw_writel(0xffffffff, (void *)P_INT_MASKH); + __raw_writel(0xffffffff, SCORE_PIC + INT_MASKL); + __raw_writel(0xffffffff, SCORE_PIC + INT_MASKH); __asm__ __volatile__( "mtcr %0, cr3\n\t"