From b7f1a1d6bda6ff748e5aceb1109e75331d35c55f Mon Sep 17 00:00:00 2001
From: Tony Lindgren <tony@atomide.com>
Date: Tue, 19 Jan 2010 17:01:33 +0100
Subject: [PATCH] --- yaml --- r: 179613 b: refs/heads/master c:
 1f667c690be3ab71036c436d8391105eee23f65b h: refs/heads/master i:   179611:
 e98f25740fc11aff4620c6fbfe806de7a97ebf40 v: v3

---
 [refs]                      | 2 +-
 trunk/arch/arm/mm/proc-v7.S | 9 ++++++++-
 2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/[refs] b/[refs]
index 137931d54491..b8f517b4ffd3 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: ad3e6c0b1fad31282a8384903ed811671d840a9c
+refs/heads/master: 1f667c690be3ab71036c436d8391105eee23f65b
diff --git a/trunk/arch/arm/mm/proc-v7.S b/trunk/arch/arm/mm/proc-v7.S
index 3a285218fd15..d2a80747c6fe 100644
--- a/trunk/arch/arm/mm/proc-v7.S
+++ b/trunk/arch/arm/mm/proc-v7.S
@@ -45,7 +45,14 @@ ENTRY(cpu_v7_proc_init)
 ENDPROC(cpu_v7_proc_init)
 
 ENTRY(cpu_v7_proc_fin)
-	mov	pc, lr
+	stmfd	sp!, {lr}
+	cpsid	if				@ disable interrupts
+	bl	v7_flush_kern_cache_all
+	mrc	p15, 0, r0, c1, c0, 0		@ ctrl register
+	bic	r0, r0, #0x1000			@ ...i............
+	bic	r0, r0, #0x0006			@ .............ca.
+	mcr	p15, 0, r0, c1, c0, 0		@ disable caches
+	ldmfd	sp!, {pc}
 ENDPROC(cpu_v7_proc_fin)
 
 /*