From b8494d15418c41e19ed1f825d652dc1f6364a45e Mon Sep 17 00:00:00 2001 From: "Kevin D. Kissell" Date: Fri, 27 Jul 2007 18:45:25 +0100 Subject: [PATCH] --- yaml --- r: 63462 b: refs/heads/master c: c3a005f4b6a7752608e75d016ef8d07c55285e48 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/arch/mips/mips-boards/malta/malta_int.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/[refs] b/[refs] index e7ce7b381cf2..49772703242a 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: efaa534ed191662270e3be143c8a038a7492ce8f +refs/heads/master: c3a005f4b6a7752608e75d016ef8d07c55285e48 diff --git a/trunk/arch/mips/mips-boards/malta/malta_int.c b/trunk/arch/mips/mips-boards/malta/malta_int.c index c78d48349600..97aeb8c4e601 100644 --- a/trunk/arch/mips/mips-boards/malta/malta_int.c +++ b/trunk/arch/mips/mips-boards/malta/malta_int.c @@ -330,6 +330,18 @@ void __init arch_init_irq(void) (0x100 << MIPSCPU_INT_I8259A)); setup_irq_smtc (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction, (0x100 << MIPSCPU_INT_COREHI)); + /* + * Temporary hack to ensure that the subsidiary device + * interrupts coing in via the i8259A, but associated + * with low IRQ numbers, will restore the Status.IM + * value associated with the i8259A. + */ + { + int i; + + for (i = 0; i < 16; i++) + irq_hwmask[i] = (0x100 << MIPSCPU_INT_I8259A); + } #else /* Not SMTC */ setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_I8259A, &i8259irq); setup_irq (MIPS_CPU_IRQ_BASE+MIPSCPU_INT_COREHI, &corehi_irqaction);