From b95ec6d6767a805dcdca37aab2526a6cb053b981 Mon Sep 17 00:00:00 2001
From: Chris Wilson <chris@chris-wilson.co.uk>
Date: Fri, 29 Oct 2010 18:11:26 +0100
Subject: [PATCH] --- yaml --- r: 228671 b: refs/heads/master c:
 e380f60b22eddec7825224b8d788572c82b63161 h: refs/heads/master i:   228669:
 c860b605a24976dc4d71176fd946056e3200ea8b   228667:
 22d33fc8bbf9e791988df008450bdd361a43edda   228663:
 5f05c36c165cf21dc404eeba0da448ea29324316   228655:
 84fa8e952ead0cc2c5e8a5f41854d49a7aaeeabc   228639:
 77f99f02c9547ebd5ef08c16876146db11734f17   228607:
 a77bbaa93009277b92d4b3866a6f1c2853918c88 v: v3

---
 [refs]                             |  2 +-
 trunk/drivers/char/agp/intel-gtt.c | 37 ++++++++++++++++++++++++------
 2 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/[refs] b/[refs]
index 0eb6d2208fa5..d521072877d6 100644
--- a/[refs]
+++ b/[refs]
@@ -1,2 +1,2 @@
 ---
-refs/heads/master: c584fe47e4d92934c10e5d7f932ee042587dbcff
+refs/heads/master: e380f60b22eddec7825224b8d788572c82b63161
diff --git a/trunk/drivers/char/agp/intel-gtt.c b/trunk/drivers/char/agp/intel-gtt.c
index 5dc1f5db55a7..9c86dac41da7 100644
--- a/trunk/drivers/char/agp/intel-gtt.c
+++ b/trunk/drivers/char/agp/intel-gtt.c
@@ -922,10 +922,11 @@ static void i830_write_entry(dma_addr_t addr, unsigned int entry,
 	writel(addr | pte_flags, intel_private.gtt + entry);
 }
 
-static void intel_enable_gtt(void)
+static bool intel_enable_gtt(void)
 {
 	u32 gma_addr;
 	u16 gmch_ctrl;
+	u8 __iomem *reg;
 
 	if (INTEL_GTT_GEN == 2)
 		pci_read_config_dword(intel_private.pcidev, I810_GMADDR,
@@ -936,13 +937,34 @@ static void intel_enable_gtt(void)
 
 	intel_private.gma_bus_addr = (gma_addr & PCI_BASE_ADDRESS_MEM_MASK);
 
-	pci_read_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, &gmch_ctrl);
+	if (INTEL_GTT_GEN >= 6)
+	    return true;
+
+	pci_read_config_word(intel_private.bridge_dev,
+			     I830_GMCH_CTRL, &gmch_ctrl);
 	gmch_ctrl |= I830_GMCH_ENABLED;
-	pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl);
+	pci_write_config_word(intel_private.bridge_dev,
+			      I830_GMCH_CTRL, gmch_ctrl);
 
-	writel(intel_private.PGETBL_save|I810_PGETBL_ENABLED,
-	       intel_private.registers+I810_PGETBL_CTL);
-	readl(intel_private.registers+I810_PGETBL_CTL);	/* PCI Posting. */
+	pci_read_config_word(intel_private.bridge_dev,
+			     I830_GMCH_CTRL, &gmch_ctrl);
+	if ((gmch_ctrl & I830_GMCH_ENABLED) == 0) {
+		dev_err(&intel_private.pcidev->dev,
+			"failed to enable the GTT: GMCH_CTRL=%x\n",
+			gmch_ctrl);
+		return false;
+	}
+
+	reg = intel_private.registers+I810_PGETBL_CTL;
+	writel(intel_private.PGETBL_save|I810_PGETBL_ENABLED, reg);
+	if ((readl(reg) & I810_PGETBL_ENABLED) == 0) {
+		dev_err(&intel_private.pcidev->dev,
+			"failed to enable the GTT: PGETBL=%x [expected %x|1]\n",
+			readl(reg), intel_private.PGETBL_save);
+		return false;
+	}
+
+	return true;
 }
 
 static int i830_setup(void)
@@ -981,7 +1003,8 @@ static int intel_fake_agp_configure(void)
 {
 	int i;
 
-	intel_enable_gtt();
+	if (!intel_enable_gtt())
+	    return -EIO;
 
 	agp_bridge->gart_bus_addr = intel_private.gma_bus_addr;