From ba42b0e0b5a09fcf84558f9adaf0c3cde2b87d98 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Sat, 14 Apr 2012 22:14:26 +0100 Subject: [PATCH] --- yaml --- r: 307160 b: refs/heads/master c: 8aaa81a166d80ac9bf2813984e5b4c2503d0fe08 h: refs/heads/master v: v3 --- [refs] | 2 +- trunk/drivers/gpu/drm/i915/intel_sprite.c | 5 +++-- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/[refs] b/[refs] index 6a577ba7dd5f..ff7d8f0be29f 100644 --- a/[refs] +++ b/[refs] @@ -1,2 +1,2 @@ --- -refs/heads/master: f681fa235f931bcf41f6c8fa22aadde9d8833eec +refs/heads/master: 8aaa81a166d80ac9bf2813984e5b4c2503d0fe08 diff --git a/trunk/drivers/gpu/drm/i915/intel_sprite.c b/trunk/drivers/gpu/drm/i915/intel_sprite.c index 10dd1b6ec5f3..749d04356306 100644 --- a/trunk/drivers/gpu/drm/i915/intel_sprite.c +++ b/trunk/drivers/gpu/drm/i915/intel_sprite.c @@ -219,7 +219,7 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, struct drm_i915_private *dev_priv = dev->dev_private; struct intel_plane *intel_plane = to_intel_plane(plane); int pipe = intel_plane->pipe, pixel_size; - u32 dvscntr, dvsscale = 0; + u32 dvscntr, dvsscale; dvscntr = I915_READ(DVSCNTR(pipe)); @@ -275,7 +275,8 @@ ilk_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb, intel_update_sprite_watermarks(dev, pipe, crtc_w, pixel_size); - if (crtc_w != src_w || crtc_h != src_h) + dvsscale = 0; + if (IS_GEN5(dev) || crtc_w != src_w || crtc_h != src_h) dvsscale = DVS_SCALE_ENABLE | (src_w << 16) | src_h; I915_WRITE(DVSSTRIDE(pipe), fb->pitches[0]);